NXP Semiconductors LPC5528JEV98Y

Overview

LPC5528JEV98Y from NXP Semiconductors is a 32-bit Arm Cortex-M33 microcontroller operating at up to 150 MHz, featuring 512 KB on-chip flash, 256 KB SRAM, and full-speed + high-speed USB interfaces. It integrates a 16-bit 1.0 Msamples/sec ADC, SCTimer/PWM, PRINCE flash encryption, and supports secure boot with RSA-2048/4096 verification - deployed in industrial IoT edge nodes requiring real-time control and firmware integrity.

For engineers reviewing the LPC5528JEV98Y datasheet, LPC5528JEV98Y pinout, LPC5528JEV98Y application, or LPC5528JEV98Y equivalent, key selection considerations include VFBGA98 package compatibility, absence of CASPER crypto co-processor and PUF controller versus LPC55S28JEV98Y, SDIO support, GPIO count (64), and secure boot capability limited to signature verification without hardware-accelerated asymmetric cryptography.

Technical Context

The LPC5528JEV98Y implements an Arm Cortex-M33 core with MPU, FPU, and DSP extensions but omits the CASPER crypto co-processor and Physical Unclonable Function (PUF) controller found in S-series variants. Its security architecture relies on ROM-based secure boot with RSASSA-PKCS1-v1_5 signature verification using SHA256 digests and RSA-2048/4096 keys stored in protected flash.

It features nine Flexcomm interfaces configurable as USART, SPI, I2C, or I2S; dual USB controllers (FS + HS) with on-chip PHYs; a 24-bit Multi-Rate Timer (MRT); Windowed Watchdog Timer (WWDT); and a 32-bit RTC clocked by 32.768 kHz crystal or FRO. Power management includes deep power-down mode with RAM retention and wake-up via RTC or Micro-Tick Timer.

Key Specifications

Pinout & Package

VFBGA98 package: thin fine-pitch ball grid array, 98 balls, 7 mm × 7 mm body, 0.5 mm pitch, SOT1982-1 footprint. Compatible with standard reflow profiles and automated optical inspection (AOI) for high-volume manufacturing.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar microcontroller applications.

Compared with LPC5528JEV98Y, LPC55S28JEV98Y adds hardware crypto acceleration and PUF-based key generation, while LPC5526JEV98Y reduces memory resources without altering security or peripheral capabilities - enabling tiered product families across performance, security, and cost dimensions.

Availability

LPC5528JEV98Y is available at Aetrix Electronics and suitable for industrial IoT gateways, smart metering systems, and medical sensor hubs requiring stable component supply, long-term lifecycle support, and traceable sourcing.

Supply support for LPC5528JEV98Y includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

NXP Semiconductors is a global semiconductor leader specializing in secure, connected, and intelligent edge solutions for automotive, industrial, and IoT markets.

The LPC552x series targets cost-sensitive, security-aware embedded applications where hardware-accelerated cryptography is optional - delivering robust MCU functionality with flexible memory, rich analog/peripheral integration, and certified secure boot.

FAQ

Does the LPC5528JEV98Y include the CASPER crypto co-processor?

No, the LPC5528JEV98Y does not include the CASPER crypto co-processor. This hardware accelerator is exclusive to the LPC55S2x series. The LPC5528JEV98Y supports software-based cryptographic operations and relies on its ROM-based secure boot with RSA-2048/4096 signature verification for firmware integrity, but lacks dedicated hardware for elliptic curve cryptography or FFT acceleration.

What is the maximum ADC sample rate supported by the LPC5528JEV98Y?

The LPC5528JEV98Y supports a maximum ADC sample rate of 1.0 Msamples/sec. Its 16-bit successive approximation register (SAR) ADC enables simultaneous conversions on two channels within a differential pair, making it suitable for high-fidelity signal acquisition in industrial and medical applications where timing correlation between channels is critical.

Is the LPC5528JEV98Y pin-compatible with the LPC55S28JEV98Y?

Yes, the LPC5528JEV98Y and LPC55S28JEV98Y share identical VFBGA98 packaging (SOT1982-1), pin count (98), and pinout mapping. All signal names, power domains, and reset configurations match per the datasheet's pin description table - enabling drop-in replacement in existing PCB layouts when cryptographic acceleration is not required.

Does the LPC5528JEV98Y support PRINCE flash encryption?

Yes, the LPC5528JEV98Y includes the PRINCE module for real-time AES-128 encryption and decryption of on-chip flash. This feature operates transparently during read/write cycles, protecting firmware assets without CPU intervention, and is fully functional despite the absence of CASPER or PUF hardware - ensuring asset confidentiality in field-deployed devices.

What debug interfaces are available on the LPC5528JEV98Y?

The LPC5528JEV98Y supports Serial Wire Debug (SWD) via SWCLK and SWO pins, with eight breakpoints and four watchpoints. It also includes JTAG boundary scan (TRST, TCK, TMS, TDI, TDO) on dedicated pins, though JTAG is disabled during normal debug operation and reserved for boundary scan testing only - SWD remains the primary debug interface for development and production programming.