NXP Semiconductors LPC55S16JBD100K
- Part No.:
- LPC55S16JBD100K
- Manufacturer:
- NXP Semiconductors
- Category:
- Microcontrollers
- Package:
- 100-LQFP Exposed Pad
- Datasheet:
-
LPC55S16JBD100K.pdf
- Description:
- IC MCU 32BIT 256KB FLSH 100LQFP
- Quantity:
- Payment:

- Shipping:

Inventory:450
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Product details
Overview
LPC55S16JBD100K from NXP Semiconductors is a 32-bit Arm Cortex-M33 microcontroller with TrustZone security, PRINCE flash encryption, CASPER crypto co-processor, 256 KB flash, 96 KB SRAM, CAN FD, USB HS/FS, and a 16-bit 2.0 Msamples/sec ADC - deployed in secure industrial gateways requiring real-time control and cryptographic integrity.
For engineers reviewing the LPC55S16JBD100K datasheet, LPC55S16JBD100K pinout, LPC55S16JBD100K application, or LPC55S16JBD100K equivalent, key selection criteria include TrustZone-enforced memory isolation, PRINCE-enabled over-the-air firmware updates, CASPER-accelerated ECC operations, and HLQFP100 package compatibility with high-pin-count industrial PCB layouts.
Technical Context
The LPC55S16JBD100K implements Arm TrustZone to enforce hardware-isolated secure and non-secure execution environments, with PRINCE performing real-time AES-128 encryption/decryption of flash reads and writes. Its CASPER co-processor offloads elliptic curve cryptography (ECC) operations including point multiplication and modular arithmetic.
It integrates two DMA controllers (23-channel DMA0 and 10-channel DMA1), a programmable logic unit (PLU) for custom state-machine logic, and a flexible Flexcomm interface subsystem supporting up to nine concurrent serial peripherals - each configurable as USART, SPI, I2C, or I2S with independent FIFOs and clocking.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core | Arm Cortex-M33 @ 150 MHz with FPU, MPU, and TrustZone for secure partitioning |
| Memory | 256 KB on-chip flash with PRINCE encryption; 96 KB SRAM (16 KB code + 64 KB system + 16 KB USB) |
| Crypto Acceleration | CASPER co-processor for ECC acceleration; AES-256, SHA2, TRNG, PUF, and DICE-compliant secure boot |
| Analog | 16-bit ADC at 2.0 Msamples/sec with simultaneous dual-channel conversion; integrated temperature sensor & comparator |
| Serial Interfaces | 9 Flexcomm interfaces (USART/SPI/I2C/I2S); USB 2.0 HS/FS with crystal-less FS mode; CAN FD with dedicated DMA |
| Timers & Logic | 5x 32-bit general-purpose timers; SCTimer/PWM with 10 outputs/8 inputs; PLU for combinatorial/sequential logic |
| Package | HLQFP100 (14 × 14 × 0.5 mm, 0.5 mm pitch) with 64 GPIO pins and JTAG/SWD debug support |
Pinout & Package
HLQFP100 package with 100 leads, 0.5 mm pitch, and 14 mm × 14 mm body size. Pin functions are software-configurable via IOCON registers; default reset state disables pull-ups/pull-downs on most pins except designated debug and boot pins (e.g., PIO0_5 determines boot source).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| PIO0_0–PIO0_14 | General-purpose I/O / Secure GPIO / Analog input | Configurable digital I/O; some pins support ACMP0_A/B, ADC0_1, or secure GPIO; default reset state varies per pin (e.g., PIO0_2/PIO0_11 have internal pull-down) |
| PIO1_0–PIO1_31 | General-purpose I/O / Flexcomm / Timer / SCTimer | Supports multiple peripheral functions including CTIMER capture/match, SCTimer GPI/GPO, and Flexcomm SCK/SDA/MOSI/WS |
| VDD/VSS | Power supply / Ground | 1.8–3.6 V single-supply operation; separate analog/digital domains; internal DC-DC converter supported |
| XTAL_IN/XTAL_OUT | Clock input/output | Supports 12–32 MHz crystal oscillator; optional bypass mode for external clock up to 25 MHz |
| SWDIO/SWCLK | Debug interface | Serial Wire Debug (SWD) with 8 breakpoints and 4 watchpoints; SWO trace output available on PIO0_8 |
Key Features
| Feature | Design Value |
|---|---|
| TrustZone Security | Hardware-enforced isolation between secure/non-secure firmware, enabling certified secure boot and runtime attestation |
| PRINCE Flash Encryption | Real-time AES-128 encryption/decryption of flash data during read/write - no performance penalty or software overhead |
| CASPER Crypto Engine | Hardware acceleration for ECC scalar multiplication and modular arithmetic, reducing signature verification time by >10× vs. software-only |
| Flexcomm Serial Subsystem | Nine independently configurable serial interfaces sharing minimal footprint; each supports FIFO, fractional baud rate, and timeout detection |
| Secure Boot Architecture | RSASSA-PKCS1-v1_5 signature verification using SHA256 digest; supports RSA-2048/4096 keys, x.509 certificate chain, and anti-rollback via image key revocation |
| ADC Performance | 16-bit resolution at 2.0 Msamples/sec with simultaneous sampling on differential pairs - enables precise motor current sensing and power quality monitoring |
Applications
| Industrial PLC Controller | Secure Edge Gateway |
|---|---|
Use Scenario: Real-time deterministic control of I/O modules, motion axes, and fieldbus communication in factory automation systems. IC Role / Device Role / Timing Role: Main application processor executing control algorithms, managing CAN FD fieldbus, and synchronizing multi-axis PWM outputs via SCTimer/PWM. Use Value: TrustZone isolates safety-critical control firmware from network-facing services; PRINCE ensures encrypted firmware updates without interrupting runtime operation. | Use Scenario: Aggregating and securing data from heterogeneous sensors and legacy protocols before forwarding to cloud infrastructure. IC Role / Device Role / Timing Role: Secure host MCU handling TLS offload via CASPER, encrypted local storage via PRINCE, and dual-mode USB (HS for bulk transfer, FS for HID-class programming). Use Value: PUF-generated keys eliminate key storage vulnerabilities; DICE-compliant identity enables zero-touch device onboarding in IoT deployments. |
| Medical Diagnostic Device | Automotive Body Control Module |
Use Scenario: Signal acquisition and processing in portable ultrasound or ECG analyzers requiring high-fidelity analog front-end integration. IC Role / Device Role / Timing Role: High-speed ADC controller with simultaneous dual-channel sampling, temperature-compensated reference, and real-time FFT via DSP instructions. Use Value: 16-bit 2.0 Msamples/sec ADC meets EN 60601-2-27 dynamic range requirements; secure boot prevents unauthorized firmware modification in regulated environments. | Use Scenario: Centralized vehicle subsystem management including lighting, door locks, HVAC, and diagnostics over CAN FD backbone. IC Role / Device Role / Timing Role: CAN FD node with dedicated DMA, windowed watchdog timer (WWDT), and low-power deep-sleep wake-up via RTC alarm or GPIO edge. Use Value: -40 °C to +105 °C operating range and brown-out detection ensure reliability in under-hood environments; secure GPIO prevents tampering with critical actuator signals. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar secure microcontroller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| LPC55S28JBD100 | Higher flash (512 KB) and SRAM (256 KB); adds second USB HS PHY and enhanced PRINCE key management | Better suited for complex OTA update stacks with dual-bank firmware and secure bootloader staging | Select when >256 KB flash or dual-USB-HS is required; same HLQFP100 pinout and software compatibility |
| RA6M5GFP100AA00 | Arm Cortex-M33 @ 200 MHz; 1 MB flash, 384 KB SRAM; Renesas Secure Crypto Engine (SCE9); no PRINCE or CASPER | Stronger raw compute throughput and larger memory, but lacks real-time flash encryption and ECC acceleration | Prefer for high-throughput data processing where flash encryption is handled externally or via software stack |
Compared with LPC55S16JBD100K, LPC55S28JBD100 offers scalable memory and identical security architecture for future-proof designs, while RA6M5GFP100AA00 trades hardware crypto acceleration for higher CPU performance and memory - making LPC55S16JBD100K optimal for cost-sensitive, crypto-intensive edge nodes.
Availability
LPC55S16JBD100K is available at Aetrix Electronics and suitable for industrial PLC controllers, secure edge gateways, medical diagnostic devices, and automotive body control modules requiring stable component supply across extended product lifecycles.
Supply support for LPC55S16JBD100K includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
NXP Semiconductors is a global semiconductor company headquartered in Eindhoven, Netherlands, specializing in secure connectivity solutions for automotive, industrial, and IoT markets.
The LPC55S1x series is designed for resource-constrained, security-critical embedded applications - integrating Arm TrustZone, PRINCE, CASPER, and DICE to enable certified secure boot, runtime attestation, and encrypted firmware updates in industrial and medical edge devices.
FAQ
What is the maximum operating frequency of the LPC55S16JBD100K core?
The LPC55S16JBD100K features an Arm Cortex-M33 core rated for operation up to 150 MHz. This frequency is achievable using internal PLLs driven by the 96 MHz Free Running Oscillator (FRO) or external crystal sources. The core includes a floating-point unit (FPU) and memory protection unit (MPU), and its performance is validated across the full -40 °C to +105 °C temperature range with 1.8–3.6 V supply.
Does the LPC55S16JBD100K support secure boot with public-key verification?
Yes, the LPC55S16JBD100K supports secure boot using RSASSA-PKCS1-v1_5 signatures over SHA256 digests, with validation of RSA-2048 and RSA-4096 public keys stored in x.509 certificates. Root of Trust keys are hashed and stored in protected flash, and anti-rollback is enforced via image key revocation using the certificate Serial Number field - all implemented in ROM bootloader without software dependency.
How does PRINCE encryption work on the LPC55S16JBD100K?
PRINCE on the LPC55S16JBD100K performs real-time AES-128 encryption of data written to flash and decryption of data read from flash - transparently handled by hardware with zero CPU intervention. Encrypted regions are defined in the Protected Flash Region (PFR), and keys are derived from the PUF or supplied securely. This enables secure over-the-air updates without exposing decrypted firmware in memory or requiring external encryption ICs.
What analog capabilities does the LPC55S16JBD100K provide?
The LPC55S16JBD100K integrates a 16-bit ADC capable of 2.0 Msamples/sec with simultaneous sampling on differential channel pairs, five analog comparator inputs with selectable references, and an on-die temperature sensor routed to the ADC. It supports up to 10 single-ended or five differential ADC channels, with internal and external trigger sources - enabling precision current sensing, power quality analysis, and thermal monitoring in real-time control systems.
Is the LPC55S16JBD100K pin-compatible with other LPC55S1x variants in HLQFP100?
Yes, the LPC55S16JBD100K shares identical pinout, package dimensions (HLQFP100, 14 × 14 × 0.5 mm), and electrical characteristics with other LPC55S1x family members in the same HLQFP100 package, including LPC55S14JBD100 and LPC55S28JBD100. Firmware and PCB layout are interchangeable across these variants, allowing memory-scaling upgrades without hardware redesign.
LPC55S16JBD100K Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Package/Case:
- 100-LQFP Exposed Pad
- Series:
- LPC55S1x
- Packaging:
- Tray
- Product Status:
- Active
- Programmable:
- -
- Core Processor:
- ARM® Cortex®-M33
- Core Size:
- 32-Bit Single-Core
- Speed:
- 150MHz
- Connectivity:
- CAN FD, Flexcomm, I2C, SPI, UART/USART, USB
- Peripherals:
- Brown-out Detect/Reset, DMA, I2S, POR, PWM, RNG, WDT
- Number of I/O:
- 64
- Program Memory Size:
- 256KB (256K x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- -
- RAM Size:
- 96K x 8
- Voltage - Supply (Vcc/Vdd):
- 1.8V ~ 3.6V
- Data Converters:
- A/D 10x16b SAR
- Oscillator Type:
- External, Internal
- Operating Temperature:
- -40°C ~ 105°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
LPC55S16JBD100K FAQ
1.How can I place an order for LPC55S16JBD100K through Aetrix?
Please submit a Request for Quotation (RFQ) for LPC55S16JBD100K on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LPC55S16JBD100K reliable?
The price and inventory of LPC55S16JBD100K are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LPC55S16JBD100K is usually 5 days.
3.What payment methods are accepted for LPC55S16JBD100K?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LPC55S16JBD100K transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LPC55S16JBD100K?
LPC55S16JBD100K orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LPC55S16JBD100K order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LPC55S16JBD100K?
For technical support, including LPC55S16JBD100K datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LPC55S16JBD100K requirements.
6.How does Aetrix verify that LPC55S16JBD100K is sourced from the original manufacturer or authorized distributors?
All LPC55S16JBD100K products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LPC55S16JBD100K meets industry standards.
7.What is the process for return or replacement of LPC55S16JBD100K?
All LPC55S16JBD100K units undergo pre-shipment inspection (PSI). If there is an issue with LPC55S16JBD100K, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LPC55S16JBD100K part is unused and in its original packaging.
Return procedure for LPC55S16JBD100K:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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