NXP Semiconductors LPC55S16JBD100Y

Overview

LPC55S16JBD100Y from NXP Semiconductors is a 32-bit Arm Cortex-M33 microcontroller with TrustZone security, PRINCE flash encryption, CASPER crypto acceleration, 256 KB on-chip flash, 96 KB SRAM, CAN FD, USB HS/FS, and a 16-bit 2.0 Msamples/sec ADC - deployed in secure industrial gateways requiring real-time control, encrypted firmware updates, and multi-protocol connectivity.

For engineers reviewing the LPC55S16JBD100Y datasheet, LPC55S16JBD100Y pinout, LPC55S16JBD100Y application, or LPC55S16JBD100Y equivalent, key selection criteria include TrustZone-enabled secure boot, PRINCE-encrypted flash execution, CASPER-accelerated ECC, 100-pin HLQFP package compatibility, and dual USB (HS + FS) with crystal-less FS operation.

Technical Context

The LPC55S16JBD100Y implements Arm TrustZone to isolate secure and non-secure execution environments, with hardware-enforced memory protection via MPU and secure boot using RSA-2048/4096 signatures validated against up to four revocable Root of Trust keys stored in protected flash. Its CASPER co-processor offloads elliptic curve cryptography (ECC), while PRINCE enables real-time AES-256 encryption/decryption of flash reads and writes.

It integrates two DMA controllers (23+10 channels), nine Flexcomm interfaces configurable as USART/SPI/I2C/I2S, SCTimer/PWM with 16 capture/match registers, and a dual-domain power architecture supporting deep power-down wake-up via RTC (1 ms resolution) or Micro-Tick Timer. The 16-bit ADC supports simultaneous differential conversions at 2.0 Msamples/sec with internal temperature sensor and comparator inputs.

Key Specifications

Pinout & Package

Package: HLQFP100 (plastic low-profile quad flat package, 100 leads, 14 × 14 × 0.5 mm body, 0.5 mm pitch).

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar secure microcontroller applications.

Compared with LPC55S06JBD100, the LPC55S16JBD100Y provides double flash capacity, PUF-based key derivation, and CASPER-accelerated ECC-critical for TLS 1.3 handshakes and zero-touch provisioning. Versus RA6M5GFP100AA00, it delivers unique PRINCE-encrypted flash execution and DICE-compliant device identity, essential for regulated IoT deployments requiring immutable firmware integrity.

Availability

LPC55S16JBD100Y is available at Aetrix Electronics and suitable for industrial PLC edge nodes, secure smart metering gateways, medical diagnostic sensor hubs, automotive body control modules, and medical-grade portable devices requiring stable component supply across extended temperature ranges and long product lifecycles.

Supply support for LPC55S16JBD100Y includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

NXP Semiconductors is a global semiconductor leader specializing in secure connectivity solutions for automotive, industrial, and IoT applications, with deep expertise in Arm-based microcontrollers and hardware security IP.

The LPC55S1x series is designed for resource-constrained, safety- and security-critical embedded systems requiring certified secure boot, real-time encrypted flash execution, and multi-protocol connectivity in harsh environments.

FAQ

What is the maximum operating frequency of the LPC55S16JBD100Y?

The LPC55S16JBD100Y features an Arm Cortex-M33 core capable of running at up to 150 MHz. This frequency is achievable using internal PLLs driven by the 96 MHz Free Running Oscillator (FRO) or external crystal sources, with full support for dynamic voltage and frequency scaling (DVFS) to optimize power versus performance in real-time applications. The LPC55S16JBD100Y maintains timing integrity across its full −40 °C to +105 °C operating range.

Does the LPC55S16JBD100Y support secure boot with public key infrastructure?

Yes, the LPC55S16JBD100Y supports secure boot using RSASSA-PKCS1-v1_5 signatures of SHA256 digests, with RSA-2048 and RSA-4096 public key validation. It stores up to four revocable Root of Trust keys in protected flash, enforces anti-rollback via x509 certificate serial numbers, and complies with Trusted Computing Group DICE Specification v2.0. The LPC55S16JBD100Y validates all boot images against this chain before execution.

What package type and pin count does the LPC55S16JBD100Y use?

The LPC55S16JBD100Y uses the HLQFP100 package: a 100-pin plastic low-profile quad flat package with 14 × 14 × 0.5 mm body dimensions and 0.5 mm lead pitch. This package provides 64 GPIOs, dedicated debug pins (SWDIO/SWCLK), multiple power/ground pairs, and thermal pad support for industrial thermal management. The LPC55S16JBD100Y's pinout is fully documented in NXP's LPC55S1x/LPC551x data sheet Rev. 1.8.

How does the PRINCE module function in the LPC55S16JBD100Y?

The PRINCE module in the LPC55S16JBD100Y performs real-time AES-256 encryption of data written to on-chip flash and decryption of encrypted data during read operations-without software intervention or performance penalty. It protects application code and configuration assets from physical extraction, enables secure over-the-air updates, and allows encrypted regions to be booted directly. The LPC55S16JBD100Y supports multiple independently encrypted flash regions with separate keys managed by the secure subsystem.

Can the LPC55S16JBD100Y operate without an external crystal?

Yes, the LPC55S16JBD100Y can operate entirely from internal oscillators: a 96 MHz FRO (±2% accuracy over −40 °C to +105 °C), a 32 kHz FRO for RTC, and a 1 MHz low-power FRO. USB Full-Speed supports crystal-less operation using a software library (TN00065), eliminating the need for external crystals in cost-sensitive or space-constrained designs. The LPC55S16JBD100Y retains full functionality-including secure boot and CAN FD timing-using only internal clocks.