NXP Semiconductors LPC55S26JBD64E

Overview

LPC55S26JBD64E from NXP Semiconductors is a 32-bit Arm Cortex-M33 microcontroller with secure boot, PRINCE flash encryption, CASPER crypto co-processor, 256 KB on-chip flash, 144 KB SRAM, and dual USB (FS + HS) support - deployed in industrial IoT edge nodes requiring real-time control and cryptographic integrity.

For engineers reviewing the LPC55S26JBD64E datasheet, LPC55S26JBD64E pinout, LPC55S26JBD64E application, or LPC55S26JBD64E equivalent, key selection criteria include its HTQFP64 package (64-pin, 10 × 10 mm), 150 MHz CPU frequency, 36 GPIOs, integrated PUF/SHA2/AES engines, and support for SDIO, SCTimer/PWM, and Flexcomm serial peripherals.

Technical Context

The LPC55S26JBD64E implements an Arm Cortex-M33 core with MPU, FPU, DSP, and ETM, running at up to 150 MHz using PLL0/PLL1 clock sources derived from internal FRO (12 MHz or 1 MHz), external crystal (16–32 MHz), or RTC oscillator (32.768 kHz). Its security architecture integrates PRINCE for real-time flash encryption, CASPER for ECC acceleration, and PUF-based key generation.

Peripherals include nine Flexcomm interfaces (configurable as USART/SPI/I²C/I²S), a 16-bit 1.0 Msamples/sec ADC with simultaneous differential conversion, SCTimer/PWM with 16 capture/match registers, and dual USB controllers (full-speed + high-speed) with on-chip PHYs - all accessible via AHB/APB interconnect and managed by two DMA controllers (23 + 10 channels).

Key Specifications

Pinout & Package

Package: HTQFP64 (plastic low-profile quad flat package, 64 leads, 10 × 10 × 0.5 mm pitch, SOT855-5).

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar microcontroller applications.

Compared with LPC55S26JBD64E, LPC55S28JBD64 offers expanded memory for larger firmware images, while LPC5526JBD64 removes security hardware to lower cost - making LPC55S26JBD64E the optimal balance of security, performance, and footprint for certified edge devices.

Availability

LPC55S26JBD64E is available at Aetrix Electronics and suitable for industrial IoT gateways, medical sensor hubs, and automotive diagnostic tools requiring stable component supply, long-term lifecycle assurance, and traceable sourcing.

Supply support for LPC55S26JBD64E includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

NXP Semiconductors is a global semiconductor leader specializing in secure connectivity solutions for automotive, industrial, and IoT markets.

The LPC55S2x product line delivers Arm Cortex-M33 microcontrollers with hardware-enforced security, optimized for edge devices needing certified secure boot, real-time control, and cryptographic processing in compact packages.

FAQ

What is the maximum operating frequency of the LPC55S26JBD64E?

The LPC55S26JBD64E operates at a maximum CPU frequency of 150 MHz, achieved using PLL0 or PLL1 clock sources derived from internal FRO (12 MHz or 1 MHz), external crystal (16–32 MHz), or the 32.768 kHz RTC oscillator. This frequency is sustained across the full industrial temperature range (−40 °C to +105 °C) with voltage supply between 1.8 V and 3.6 V.

Does the LPC55S26JBD64E support secure boot with public-key cryptography?

Yes, the LPC55S26JBD64E supports secure boot using RSASSA-PKCS1-v1_5 signatures of SHA256 digests, validated against RSA-2048 or RSA-4096 public keys stored in x509 certificates. It enforces anti-rollback via image key revocation and stores up to four Root of Trust public key hashes in protected flash.

How many GPIO pins does the LPC55S26JBD64E provide in its HTQFP64 package?

The LPC55S26JBD64E in HTQFP64 package provides 36 general-purpose I/O pins. These include configurable functions such as ADC inputs, comparator inputs, Flexcomm peripheral signals, and secure GPIO capability. Pin multiplexing is controlled via IOCON registers, with default reset state disabling pull-ups/pull-downs except on designated debug and boot pins.

What USB capabilities does the LPC55S26JBD64E offer?

The LPC55S26JBD64E integrates both USB 2.0 full-speed and high-speed host/device controllers with on-chip PHYs. Full-speed mode supports crystal-less operation using software library TN00063, while high-speed mode uses a dedicated on-chip PHY. Both controllers include dedicated DMA support and operate independently with separate endpoints and buffers.

Is the LPC55S26JBD64E compatible with the LPC55S28JBD64 in terms of pinout and software?

Yes, the LPC55S26JBD64E is pin-compatible with LPC55S28JBD64 in the HTQFP64 package, sharing identical pin assignments, peripheral mappings, and register layout. Software developed for LPC55S28JBD64 runs unmodified on LPC55S26JBD64E, though flash/SRAM size differences require linker script adjustment for memory allocation.