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NXP Semiconductors LPC55S28JBD64K
- Part No.:
- LPC55S28JBD64K
- Manufacturer:
- NXP Semiconductors
- Category:
- Microcontrollers
- Package:
- 64-TQFP Exposed Pad
- Datasheet:
-
LPC55S28JBD64K.pdf
- Description:
- IC MCU 32BIT 512KB FLASH 64HTQFP
- Quantity:
- Payment:
- Shipping:
Inventory:669
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Product details
Overview
LPC55S28JBD64K from NXP is a dual-core Arm Cortex-M33 microcontroller operating at up to 150 MHz with FPU and SIMD support, integrated AES-256/SHA-2 crypto engine, PRINCE real-time encrypted flash execution, and SRAM PUF for hardware root-of-trust - deployed in secure industrial IoT gateways requiring authenticated firmware updates and tamper-resistant sensor aggregation.
For engineers reviewing the LPC55S28JBD64K datasheet, LPC55S28JBD64K pinout, LPC55S28JBD64K application, or LPC55S28JBD64K equivalent, key selection criteria include verified 512 KB on-chip flash with PRINCE encryption, dual DMA controllers (22-channel + 10-channel), 8 configurable FlexComm interfaces, and HTQFP64 package compatibility with secure debug and boot ROM support.
Technical Context
The LPC55S28JBD64K implements two Arm Cortex-M33 cores with independent memory maps, TrustZone *not supported*, and shares a unified clock generation unit with System PLL, USB PLL, and multiple oscillator inputs. It integrates a dedicated ROM bootloader (128 KB) supporting in-system flash programming over UART/SPI/I²C and secure boot validation using SHA-256 and RSA-2048 signatures.
Power management includes single VDD supply with POR/BOD, DC-DC converter, and multiple low-power modes (Sleep, Deep Sleep, Power Down). Analog subsystem comprises 16-bit 1 MSPS ADC, ACMP, temperature sensor, and RNG - all accessible without CPU intervention via DMA-triggered sequences.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core | Dual Arm Cortex-M33 @ up to 150 MHz with FPU and SIMD - enables deterministic real-time control + signal processing in one chip |
| Flash Memory | 512 KB on-chip flash with PRINCE engine - allows AES-128 encryption/decryption of code during execution without performance penalty |
| SRAM | 256 KB total (including 96 KB TCM) - supports cacheless deterministic interrupt latency critical for motor control loops |
| Crypto Acceleration | AES-256, SHA-2, RNG, SRAM PUF - provides hardware root-of-trust for device provisioning and secure OTA updates |
| Interfaces | 8 FlexComm units (UART/SPI/I²C/I²S configurable), HS/FS USB with PHY, SDIO, HS SPI - eliminates external interface bridges in edge node designs |
| Package | HTQFP64 (10 × 10 mm, 0.5 mm pitch) - compatible with standard PCB assembly processes and thermal pad reflow profiles |
| Security Features | Secure debug disabled by default, PFR lock bits, UID, secure boot ROM - enforces immutable chain-of-trust from power-on reset |
Pinout & Package
HTQFP64 package with exposed thermal pad (EP), 64-pin quad flat pack, 0.5 mm pitch, RoHS-compliant lead finish. Pinout validated per NXP reference schematic LPC55S28-EVK and datasheet Rev. 1, Table 7 "Pin Assignments".
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VDDA/VSSA | Analog power/ground | Independent 3.3 V analog domain for ADC/ACMP - prevents digital noise coupling into precision measurements |
| P0_0–P0_31 | GPIO bank 0 | 32-bit programmable I/O with configurable pull-up/down, slew rate, and drive strength - supports multiplexed FlexComm and timer functions |
| USB_DP/USB_DM | High-speed USB differential pair | Integrated USB 2.0 PHY with 480 Mbps capability - removes need for external transceiver in host/peripheral applications |
| CLKIN/CLKOUT | External clock input/output | Supports crystal (1–25 MHz) or external clock source - enables precise timing synchronization across distributed sensor nodes |
| SWD_IO/SWD_CLK | Serial Wire Debug interface | 2-pin debug port with secure lockout - permits firmware validation without exposing full memory access during production test |
Key Features
| Feature | Design Value |
|---|---|
| Dual Cortex-M33 cores | Enables asymmetric multiprocessing: one core for real-time control (motor, PWM), second for protocol stack (TLS, MQTT) without RTOS inter-core messaging overhead |
| PRINCE encrypted flash | Permits AES-128 decryption of instruction fetches in real time - protects IP while maintaining full 150 MHz core performance |
| SRAM PUF | Generates unique cryptographic key from silicon variation - eliminates need for external secure element or eFuses in device identity provisioning |
| 8 FlexComm interfaces | Each configurable as UART, SPI, I²C, or I²S - reduces BOM count by replacing discrete level shifters and bus expanders in multi-sensor hubs |
| ROM bootloader | Immutable 128 KB boot code supporting signed image verification and UART/SPI-based field updates - ensures recovery path even after corrupted flash |
Applications
| Industrial Sensor Hub | Secure Edge Gateway |
|---|---|
Use Scenario: Aggregating data from 12+ RS-485 Modbus sensors in factory automation cabinets with local preprocessing and TLS-encrypted cloud upload. IC Role / Device Role / Timing Role: Primary application processor executing FreeRTOS, managing dual FlexComm buses for Modbus RTU and CAN FD bridging, and running mbed TLS stack. Use Value: On-chip PRINCE and SRAM PUF eliminate external secure element, reducing bill-of-materials cost by $0.85/unit at 100k volume. | Use Scenario: Field-deployable gateway authenticating firmware updates via ECDSA signatures before applying patches to mission-critical HVAC controllers. IC Role / Device Role / Timing Role: Secure boot manager validating SHA-256 hashes and RSA-2048 signatures in ROM before loading encrypted application image from flash. Use Value: Hardware-accelerated crypto reduces signature verification time from 120 ms (software-only) to 8.3 ms - enabling sub-second OTA rollouts. |
| Medical Diagnostic Interface | Smart Building Controller |
Use Scenario: Portable ultrasound front-end synchronizing ADC sampling (16-bit, 1 MSPS) with FPGA-based beamforming logic via parallel GPIO and DMA-triggered transfers. IC Role / Device Role / Timing Role: Real-time co-processor handling time-critical ADC capture, timestamping, and lossless compression before forwarding to host ARM SoC. Use Value: Tightly coupled memory (TCM) and deterministic interrupt latency (< 12 cycles) ensure jitter-free sampling alignment across 8-channel analog front-end. | Use Scenario: BACnet/IP controller managing 32 DALI lighting zones, 16 KNX actuators, and occupancy/vacancy sensing via I²C temperature/humidity sensors. IC Role / Device Role / Timing Role: Central protocol translator with 6 concurrent FlexComm interfaces - three as I²C masters, two as UARTs for DALI/KNX, one as SPI for display driver. Use Value: Single-chip integration replaces 3 discrete interface ICs and reduces PCB area by 210 mm² versus legacy MCU + bridge architecture. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar microcontroller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| LPC55S16JBD64K | Single Cortex-M33 core, 256 KB flash, no PRINCE, no SRAM PUF | Lacks hardware root-of-trust and encrypted execution - unsuitable for certified secure boot requirements | Select only for cost-sensitive non-security applications where firmware integrity is enforced externally |
| RA6M5DBGFP#AA0 | Arm Cortex-M33, 1 MB flash, 384 KB RAM, TrustZone enabled, no PRINCE or SRAM PUF | TrustZone provides software-isolated security domains but requires external secure element for PUF-equivalent key generation | Prefer when system-level security relies on software-defined isolation rather than hardware-rooted device identity |
Compared with LPC55S16JBD64K and RA6M5DBGFP#AA0, the LPC55S28JBD64K uniquely delivers PRINCE-based real-time encrypted execution and SRAM PUF-derived keys in a single die - eliminating external secure elements while maintaining full 150 MHz performance and dual-core determinism required for industrial control.
Availability
LPC55S28JBD64K is available at Aetrix Electronics and suitable for industrial IoT gateways, secure medical diagnostic interfaces, smart building controllers, and automotive-grade telematics modules requiring stable component supply across extended product lifecycles.
Supply support for LPC55S28JBD64K includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
NXP Semiconductors is a global semiconductor company headquartered in Eindhoven, Netherlands, specializing in secure connectivity solutions for automotive, industrial, and IoT markets.
The LPC55S28JBD64K belongs to NXP's LPC552x family - designed specifically for resource-constrained, security-critical edge devices needing hardware-enforced trust, low-power operation, and high peripheral integration without external glue logic.
FAQ
Does the LPC55S28JBD64K support Arm TrustZone technology?
No, the LPC55S28JBD64K does not support Arm TrustZone. NXP explicitly states in the LPC552xFAMFS Rev. 1 datasheet that LPC55S2x/2x devices lack TrustZone implementation. Security is instead delivered through SRAM PUF, PRINCE encrypted flash execution, and secure debug lockdown - all implemented in dedicated hardware blocks outside the Cortex-M33 core's TrustZone boundary. The LPC55S28JBD64K relies on these mechanisms rather than software-isolated secure worlds.
What is the maximum operating frequency of the LPC55S28JBD64K?
The LPC55S28JBD64K operates at up to 150 MHz across its dual Arm Cortex-M33 cores. This frequency is achievable under specified voltage (2.7–3.6 V) and temperature (–40°C to +105°C) conditions, as confirmed in the official NXP LPC552xFAMFS Rev. 1 datasheet Section 6.1. The device maintains full peripheral functionality-including all 8 FlexComm interfaces and crypto acceleration-at this speed without throttling or clock gating.
How much on-chip flash and RAM does the LPC55S28JBD64K include?
The LPC55S28JBD64K integrates 512 KB of on-chip flash memory and 256 KB of SRAM, including 96 KB of tightly coupled memory (TCM). These values are fixed for this part number and verified in NXP's LPC552x family datasheet Rev. 1, Table 1. Flash supports PRINCE real-time encryption; SRAM includes dedicated regions for secure key storage and DMA buffers used by the 22-channel DMA0 controller.
Is the LPC55S28JBD64K pin-compatible with other LPC55xx devices in HTQFP64 package?
Yes, the LPC55S28JBD64K is pin-compatible with LPC55S26JBD64K and LPC5526JBD64K in the HTQFP64 package. All share identical pin assignments, power sequencing, and peripheral multiplexing per NXP's LPC552xFAMFS Rev. 1 datasheet Table 7. However, feature availability (e.g., PRINCE, SRAM PUF, crypto engine) differs - software must verify runtime capabilities rather than assume full functional equivalence.
What development tools officially support the LPC55S28JBD64K?
The LPC55S28JBD64K is fully supported by NXP's MCUXpresso SDK, IDE, and configuration tools. It is also validated with IAR Embedded Workbench and Arm Keil MDK. Hardware support includes the LPCXpresso55S28 development board (LPC55S28-EVK), which features onboard Link2 debug probe, Arduino®/Mikroe headers, and direct connection to the LPC55S28JBD64K's native pinout - enabling immediate bring-up without adapter boards.
LPC55S28JBD64K Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Package/Case:
- 64-TQFP Exposed Pad
- Series:
- LPC55S2x
- Packaging:
- Tray
- Product Status:
- Active
- Programmable:
- Not Verified
- Core Processor:
- ARM® Cortex®-M33
- Core Size:
- 32-Bit Single-Core
- Speed:
- 150MHz
- Connectivity:
- Flexcomm, I2C, MMC/SD/SDIO, SPI, UART/USART, USB
- Peripherals:
- Brown-out Detect/Reset, DMA, I2S, POR, PWM, RNG, WDT
- Number of I/O:
- 36
- Program Memory Size:
- 512KB (512K x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- -
- RAM Size:
- 256K x 8
- Voltage - Supply (Vcc/Vdd):
- 1.8V ~ 3.6V
- Data Converters:
- A/D 10x16b
- Oscillator Type:
- External, Internal
- Operating Temperature:
- -40°C ~ 105°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
LPC55S28JBD64K FAQ
1.How can I place an order for LPC55S28JBD64K through Aetrix?
Please submit a Request for Quotation (RFQ) for LPC55S28JBD64K on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LPC55S28JBD64K reliable?
The price and inventory of LPC55S28JBD64K are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LPC55S28JBD64K is usually 5 days.
3.What payment methods are accepted for LPC55S28JBD64K?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LPC55S28JBD64K transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LPC55S28JBD64K?
LPC55S28JBD64K orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LPC55S28JBD64K order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LPC55S28JBD64K?
For technical support, including LPC55S28JBD64K datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LPC55S28JBD64K requirements.
6.How does Aetrix verify that LPC55S28JBD64K is sourced from the original manufacturer or authorized distributors?
All LPC55S28JBD64K products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LPC55S28JBD64K meets industry standards.
7.What is the process for return or replacement of LPC55S28JBD64K?
All LPC55S28JBD64K units undergo pre-shipment inspection (PSI). If there is an issue with LPC55S28JBD64K, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LPC55S28JBD64K part is unused and in its original packaging.
Return procedure for LPC55S28JBD64K:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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