NXP Semiconductors LPC55S28JBD64Y

Overview

LPC55S28JBD64Y from NXP Semiconductors is a 32-bit Arm Cortex-M33 microcontroller with CASPER crypto co-processor, 512 KB flash, 256 KB SRAM, PRINCE real-time flash encryption, and dual USB (FS + HS) support. It operates up to 150 MHz and targets secure embedded applications including industrial control, IoT edge nodes, and smart sensors requiring cryptographic acceleration and low-power operation.

For engineers reviewing the LPC55S28JBD64Y datasheet, LPC55S28JBD64Y pinout, LPC55S28JBD64Y application, or LPC55S28JBD64Y equivalent, key selection considerations include its HTQFP64 package with 36 GPIOs, secure boot with RSA-2048/4096, PUF-based key generation, SHA2/AES hardware acceleration, and dual USB host/device capability with crystal-less FS mode.

Technical Context

The LPC55S28JBD64Y implements an Arm Cortex-M33 core with MPU, FPU, DSP, and ETM, running at up to 150 MHz using PLL0/PLL1 clock sources derived from internal FRO (12 MHz), external crystal (16–32 MHz), or RTC oscillator. Its security architecture integrates PRINCE for on-the-fly flash encryption, CASPER for ECC acceleration, PUF for silicon fingerprinting, and dedicated HASH-AES/SHA2 engines with DMA support.

Peripherals include nine Flexcomm interfaces (configurable as USART/SPI/I2C/I2S), SCTimer/PWM with 16 capture/match registers, 16-bit 1.0 Msamples/sec ADC with simultaneous differential conversion, SDIO interface supporting SDR25 (52 MHz), and dual USB controllers (full-speed with crystal-less operation and high-speed with integrated PHY).

Key Specifications

Pinout & Package

HTQFP64 package (SOT855-5): 64-pin thin quad flat package, 10 mm × 10 mm body, 0.4 mm pitch, exposed thermal pad. Pinout conforms to NXP's standard LPC55S2x pin mapping for HTQFP64 variant.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar secure microcontroller applications.

Compared with LPC55S16JBD64 and RA6M5GFPMXXFA, the LPC55S28JBD64Y uniquely combines PRINCE flash encryption, CASPER ECC acceleration, and PUF-based key generation in a 64-pin package - making it optimal for resource-constrained, cryptographically intensive edge devices requiring certified secure boot and firmware IP protection.

Availability

LPC55S28JBD64Y is available at Aetrix Electronics and suitable for industrial control systems, secure IoT gateways, and medical sensor hubs requiring stable component supply, long-term lifecycle assurance, and traceable sourcing.

Supply support for LPC55S28JBD64Y includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

NXP Semiconductors is a global semiconductor leader focused on secure connectivity solutions for automotive, industrial, and IoT markets, with expertise in Arm-based microcontrollers and edge AI processing.

The LPC55S2x product line delivers high-performance, secure Arm Cortex-M33 MCUs targeting applications demanding cryptographic acceleration, real-time responsiveness, and robust functional safety - especially where firmware IP protection and secure remote updates are mandatory.

FAQ

What is the maximum operating frequency of the LPC55S28JBD64Y?

The LPC55S28JBD64Y operates at a maximum CPU frequency of 150 MHz, achieved using PLL0 or PLL1 clock sources driven by internal FRO (12 MHz), external crystal (16–32 MHz), or RTC oscillator. This frequency is sustained across the full −40 °C to +105 °C temperature range with appropriate voltage supply (1.8–3.6 V).

Does the LPC55S28JBD64Y support crystal-less USB full-speed device operation?

Yes, the LPC55S28JBD64Y supports crystal-less USB full-speed device mode using its internal 48 MHz clock derived from the FRO. This eliminates the need for an external 12 MHz crystal on the USB device path, reducing BOM cost and PCB layout complexity while maintaining USB-IF compliance.

How does the PRINCE module protect firmware in the LPC55S28JBD64Y?

The PRINCE module performs real-time AES-128 encryption of data written to on-chip flash and decryption of encrypted data read from flash. Keys are managed securely within the device, and encrypted regions remain inaccessible to debug interfaces - ensuring firmware IP protection and enabling secure over-the-air updates without exposing plaintext code.

What security features differentiate the LPC55S28JBD64Y from the LPC5528JBD64Y?

The LPC55S28JBD64Y includes CASPER crypto co-processor, PRINCE flash encryption, PUF, and full HASH-AES/SHA2 acceleration, while the LPC5528JBD64Y omits CASPER, PRINCE, PUF, and HASH-AES - retaining only basic secure boot and USB functionality. The 'S' suffix denotes the full security feature set required for TBSA-compliant deployments.

Can the LPC55S28JBD64Y's ADC perform simultaneous conversions on differential channel pairs?

Yes, the 16-bit ADC in the LPC55S28JBD64Y supports simultaneous conversions on two ADC input channels belonging to the same differential pair - enabling precise phase-aligned sampling for applications such as motor current sensing or audio signal acquisition without inter-channel skew.