NXP Semiconductors LPC55S69JBD64K

Overview

LPC55S69JBD64K from NXP Semiconductors is a dual-core ARM Cortex-M33 microcontroller with TrustZone security, designed for secure embedded control in industrial IoT edge nodes. It integrates a 150 MHz primary core (CPU0), 640 KB on-chip flash, 320 KB SRAM, PRINCE real-time flash encryption, CASPER crypto accelerator, and PowerQuad DSP engine. It supports USB HS/FS, SDIO, nine Flexcomm serial interfaces, and a 16-bit 1.0 Msamples/sec ADC - enabling secure motor control, sensor fusion, and OTA-updatable gateways.

For engineers reviewing the LPC55S69JBD64K datasheet, LPC55S69JBD64K pinout, LPC55S69JBD64K application, or LPC55S69JBD64K equivalent, key selection criteria include dual-core TrustZone isolation, PRINCE-encrypted flash for firmware IP protection, hardware-accelerated ECC/SHA/AES via CASPER, PowerQuad-enabled CMSIS-DSP execution, and HTQFP64 package compatibility with constrained PCB layouts.

Technical Context

The LPC55S69JBD64K implements two ARM Cortex-M33 cores: CPU0 (150 MHz, with FPU, MPU, TrustZone, ETM) handles secure application execution and system management, while CPU1 (150 MHz, no FPU/MPU/TrustZone) offloads deterministic real-time tasks. Its security stack includes PUF-generated keys, AES-256 engine, SHA-2, TRNG, and DICE-compliant secure boot using RSA-2048/4096 signatures and x.509 certificate validation.

Peripherals are routed through a multilayer AHB matrix and dual DMA controllers (DMA0: 23 channels; DMA1: 10 channels). The 36 GPIO pins support secure I/O, pin interrupts, group interrupts (GINT), and PLU-based logic programmability. Clocking uses dual FROs (96 MHz ±1%, 32 kHz ±2%), PLLs, and crystal oscillators (16–32 MHz & 32.768 kHz), with integrated capacitor banks for CL tuning.

Key Specifications

Pinout & Package

Package: HTQFP64 (plastic low-profile quad flat package, 64 leads, body 10 × 10 × 0.5 mm, pitch 0.5 mm, SOT855-5).

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar dual-core secure microcontroller applications.

Compared with LPC55S66JBD64 and RA6M5GFPMXXFA, the LPC55S69JBD64K uniquely delivers integrated PRINCE flash encryption, CASPER-accelerated ECC, and PowerQuad DSP in a 64-pin footprint - making it optimal for space-constrained, high-security, real-time signal processing applications where firmware IP protection and deterministic crypto performance are mandatory.

Availability

LPC55S69JBD64K is available at Aetrix Electronics and suitable for industrial motor control, secure edge gateways, smart energy metering, and medical sensor hubs requiring stable component supply across long-lifecycle deployments.

Supply support for LPC55S69JBD64K includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

NXP Semiconductors is a global semiconductor leader focused on secure connectivity solutions for automotive, industrial, and IoT markets, with deep expertise in ARM-based microcontrollers and hardware security.

The LPC55S6x product line targets secure, real-time embedded applications demanding TrustZone isolation, hardware-accelerated cryptography, and deterministic DSP - specifically engineered for industrial edge intelligence and certified device endpoints.

FAQ

What is the maximum operating frequency of the LPC55S69JBD64K?

The LPC55S69JBD64K operates at a maximum CPU frequency of 150 MHz for both its primary (CPU0) and secondary (CPU1) ARM Cortex-M33 cores. This specification applies to device revision 1B, confirmed in the official NXP ordering information table and supported by internal PLL and FRO clocking architecture capable of sustaining full-speed operation across the −40 °C to +105 °C temperature range.

Does the LPC55S69JBD64K support secure boot with cryptographic verification?

Yes, the LPC55S69JBD64K supports robust secure boot using RSASSA-PKCS1-v1_5 signatures of SHA256 digests, validated against RSA-2048 or RSA-4096 public keys stored in x.509 certificates. It enforces anti-rollback via image key revocation and establishes Root of Trust by storing SHA-256 hashes of up to four RoT keys in protected flash - all implemented in hardware without software dependency.

What differentiates the LPC55S69JBD64K from the LPC55S66JBD64?

The LPC55S69JBD64K includes 640 KB flash and 320 KB SRAM versus 256 KB flash and 144 KB SRAM in the LPC55S66JBD64. Crucially, only the LPC55S69JBD64K integrates PRINCE flash encryption, CASPER crypto acceleration, and PowerQuad DSP hardware - making it uniquely capable of real-time encrypted firmware execution and hardware-accelerated ECC/SHA operations.

Which package type does the LPC55S69JBD64K use, and how many GPIOs are available?

The LPC55S69JBD64K uses the HTQFP64 package (SOT855-5, 10 × 10 × 0.5 mm). It provides 36 general-purpose I/O pins, each configurable as secure GPIO, analog input, or peripheral function via IOCON registers - with up to eight supporting pin interrupts and two supporting group interrupts (GINT) for logical combination triggering.

Can the LPC55S69JBD64K perform simultaneous analog-to-digital conversions?

Yes, the LPC55S69JBD64K's 16-bit ADC supports simultaneous conversions on two input channels belonging to the same differential pair - for example, converting both CH1A and CH1B at 1.0 Msamples/sec. This capability is explicitly documented in the analog peripherals section and enables accurate phase-current measurement in motor control applications.