NXP Semiconductors LPC55S69JEV98E
- Part No.:
- LPC55S69JEV98E
- Manufacturer:
- NXP Semiconductors
- Category:
- Microcontrollers
- Package:
- 98-VFBGA
- Datasheet:
-
LPC55S69JEV98E.pdf
- Description:
- IC MCU 32BIT 640KB FLASH
- Quantity:
- Payment:

- Shipping:

Inventory:260
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Product details
Overview
LPC55S69JEV98E from NXP Semiconductors is a dual-core Arm Cortex-M33 microcontroller with TrustZone security, CASPER crypto accelerator, and PowerQuad DSP engine. It delivers up to 150 MHz operation (rev 1B), integrates 640 KB flash and 320 KB SRAM, and supports secure boot, PRINCE flash encryption, and USB HS/FS interfaces - deployed in industrial IoT gateways requiring real-time control and cryptographic integrity.
For engineers reviewing the LPC55S69JEV98E datasheet, LPC55S69JEV98E pinout, LPC55S69JEV98E application, or LPC55S69JEV98E equivalent, key selection considerations include dual-M33 core partitioning for secure/non-secure execution, hardware-accelerated ECC via CASPER, PRINCE-enabled over-the-air firmware updates, and VFBGA98 package compatibility with high-density PCB layouts.
Technical Context
The LPC55S69JEV98E implements two independent Arm Cortex-M33 cores: CPU0 (with MPU, FPU, TrustZone, ETM) for secure application execution, and CPU1 (no MPU/FPU/TrustZone) for real-time offload tasks. Both cores operate up to 150 MHz in device revision 1B.
Security is enforced through hardware-rooted primitives: PRINCE encrypts/decrypts flash on-the-fly, CASPER accelerates ECC operations, PUF generates 64–4096-bit keys from SRAM fingerprinting, and SHA2/AES engines support secure boot verification using RSA-2048/4096 signatures and x.509 certificate chains.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core | Dual Arm Cortex-M33 (CPU0 + CPU1), rev r0p3; CPU0 includes TrustZone, FPU, MPU - enables secure/non-secure domain isolation. |
| Max Clock Frequency | 150 MHz (device revision 1B only); requires PLL0/PLL1 configuration from FRO12MHz, crystal, or RTC oscillator. |
| Memory | 640 KB on-chip flash with PRINCE encryption; 320 KB SRAM (272 KB contiguous system bus + 32 KB code bus + 16 KB USB SRAM). |
| Security Engines | CASPER for ECC acceleration; PowerQuad for CMSIS-DSP fixed/floating-point functions; PUF for key generation; SHA2/AES-256 for secure boot. |
| Analog Peripherals | 16-bit ADC with 1.0 Msamples/sec sampling rate, simultaneous dual-channel conversion, five differential input pairs. |
| Serial Interfaces | Nine Flexcomm peripherals (USART/SPI/I2C/I2S configurable); USB 2.0 HS/FS host/device with on-chip PHY; SDIO supporting SDR25 (52 MHz). |
| Package | VFBGA98 (7 mm × 7 mm, 0.5 mm pitch); 98-ball fine-pitch BGA with thermal pad - optimized for compact industrial modules. |
Pinout & Package
VFBGA98 package: 7 mm × 7 mm body, 0.5 mm ball pitch, thermally enhanced construction with exposed die paddle. Compatible with standard reflow profiles for lead-free assembly.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| PIO0_0 / ACMP0_A | GPIO / Analog Comparator Input A | Configurable digital I/O or comparator input; analog mode requires DIGIMODE=0 and ANAMODE=1 in IOCON. |
| PIO0_11 / ADC0_9 | GPIO / ADC Channel 1B (differential negative) | Single-ended ADC input CH9 or negative leg of differential pair CH1A/CH1B - supports simultaneous sampling with CH1A. |
| PIO0_12 / ADC0_10 | GPIO / ADC Channel 2B (differential negative) | Single-ended ADC input CH10 or negative leg of differential pair CH2A/CH2B - enables dual-differential acquisition. |
| FC3_SCK | Flexcomm 3 Clock | Shared clock for USART/SPI/I2S operation; supports fractional baud-rate generation and timeout detection. |
| SWCLK | Serial Wire Debug Clock | Default debug interface clock after reset; enables JTAG boundary scan and SWD programming without external debugger clock source. |
Key Features
| Feature | Design Value |
|---|---|
| TrustZone-enabled dual-core architecture | Hardware-isolated secure (CPU0) and non-secure (CPU1) execution environments - eliminates software-only privilege separation risks. |
| PRINCE real-time flash encryption | On-the-fly AES-128 encryption/decryption of flash reads/writes - enables secure OTA updates without exposing decrypted firmware in memory. |
| CASPER crypto co-processor | Hardware acceleration for Elliptic Curve Cryptography (ECC) scalar multiplication - reduces ECDSA signature time by >10× vs. software-only M33. |
| PowerQuad DSP accelerator | Fixed/floating-point CMSIS-DSP function execution (e.g., FFT, FIR) with dedicated DMA - offloads CPU0/CPU1 for deterministic real-time signal processing. |
| Secure boot with DICE v2.0 | Device Identifier Composition Engine compliance ensures cryptographically verifiable device identity and attestation - required for zero-trust edge deployments. |
Applications
| Industrial PLC Controller | Secure Edge Gateway |
|---|---|
Use Scenario: Real-time motion control with encrypted fieldbus communication in factory automation systems. IC Role / Device Role / Timing Role: LPC55S69JEV98E serves as main controller executing safety-critical logic on CPU0 (TrustZone-secured), while CPU1 handles EtherCAT frame processing and timestamp synchronization. Use Value: Dual-core deterministic timing + PRINCE-encrypted firmware prevents unauthorized firmware injection during maintenance cycles. |
Use Scenario: Aggregating sensor data from BLE/Zigbee subnets and forwarding to cloud via TLS-secured MQTT. IC Role / Device Role / Timing Role: LPC55S69JEV98E acts as root-of-trust anchor: CASPER signs sensor attestations, PUF-derived keys protect TLS handshakes, and PowerQuad compresses telemetry payloads. Use Value: Hardware-accelerated crypto reduces TLS handshake latency by 65% versus software-only M33 implementations. |
| Medical Wearable Hub | Smart Energy Meter |
Use Scenario: Multi-sensor physiological monitoring (ECG, SpO₂, temperature) with HIPAA-compliant local data storage. IC Role / Device Role / Timing Role: LPC55S69JEV98E runs certified RTOS on CPU0 for FDA-regulated algorithms; ADC simultaneously samples ECG/SpO₂ channels at 1 MS/s with PRINCE-encrypted flash logging. Use Value: Simultaneous dual-channel ADC conversion + secure flash ensures audit-ready waveform capture without external memory exposure. |
Use Scenario: Revenue-grade energy metering with tamper detection, firmware validation, and secure remote firmware updates. IC Role / Device Role / Timing Role: LPC55S69JEV98E performs metrology calculations on CPU1 while CPU0 validates SB2-signed firmware images and enforces anti-rollback policies via PFR-managed RoT keys. Use Value: Secure boot with four revocable Root-of-Trust keys prevents persistent malware persistence after field update failures. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-core secure microcontroller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| LPC55S66JEV98 | Same VFBGA98 package and dual-M33 architecture, but reduced memory: 256 KB flash / 144 KB SRAM; no PowerQuad or CASPER. | Suitable for cost-sensitive secure boot applications without DSP/crypto acceleration requirements. | Select when full crypto/DSP acceleration is unnecessary and BOM cost reduction is prioritized over future feature scalability. |
| RA6M5GFP | Renesas RA6M5 with Arm Cortex-M33, 1MB flash, 384KB SRAM, but lacks PRINCE, CASPER, and PowerQuad; uses TrustZone + SCE9 security module. | Targets high-memory industrial HMI where extended peripheral sets (CAN FD, Ethernet) outweigh crypto acceleration needs. | Choose when CAN FD or Ethernet MAC integration is mandatory and NXP-specific security IP (PRINCE/CASPER) is not required. |
Compared with LPC55S66JEV98 and RA6M5GFP, the LPC55S69JEV98E uniquely combines PRINCE flash encryption, CASPER ECC acceleration, and PowerQuad DSP in a VFBGA98 footprint - enabling secure, real-time signal processing in space-constrained edge nodes without external crypto co-processors.
Availability
LPC55S69JEV98E is available at Aetrix Electronics and suitable for industrial IoT gateways, medical wearable hubs, smart energy meters, and secure PLC controllers requiring stable component supply across multi-year production cycles.
Supply support for LPC55S69JEV98E includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
NXP Semiconductors is a global semiconductor leader focused on secure connectivity solutions for automotive, industrial, and IoT markets, with deep expertise in Arm-based microcontrollers and hardware security IP.
The LPC55S6x product line was designed specifically for resource-constrained edge devices demanding hardware-enforced security, real-time determinism, and cryptographic agility - targeting applications where software-only security is insufficient.
FAQ
What is the maximum operating frequency of the LPC55S69JEV98E?
The LPC55S69JEV98E operates at up to 150 MHz when using device revision 1B silicon. This maximum frequency requires proper PLL configuration sourced from the internal FRO12MHz, external crystal (16–32 MHz), or RTC oscillator. Revision 0A parts are limited to 100 MHz. The LPC55S69JEV98E datasheet specifies that this performance level is validated across the full industrial temperature range of −40 °C to +105 °C.
Does the LPC55S69JEV98E support secure boot with public-key cryptography?
Yes, the LPC55S69JEV98E supports secure boot using RSASSA-PKCS1-v1_5 signatures over SHA256 digests, with support for RSA-2048 and RSA-4096 public keys. It validates images using x.509 certificates and stores up to four revocable Root-of-Trust keys in protected flash. The LPC55S69JEV98E implements DICE v2.0 for device identity composition, ensuring cryptographically verifiable attestation during boot.
How does the PRINCE module function in the LPC55S69JEV98E?
The PRINCE module in the LPC55S69JEV98E provides real-time AES-128 encryption and decryption of on-chip flash memory. It encrypts data automatically during flash writes and decrypts during reads - transparent to software execution. This enables secure over-the-air firmware updates without exposing decrypted code in RAM. The LPC55S69JEV98E uses PRINCE to protect application assets such as cryptographic keys and proprietary algorithms stored in flash.
What analog capabilities does the LPC55S69JEV98E provide?
The LPC55S69JEV98E integrates a 16-bit ADC with 1.0 Msamples/sec maximum sampling rate, supporting simultaneous conversions on two channels within a differential pair. It offers five differential input pairs (10 single-ended channels), internal/external trigger inputs, and an integrated temperature sensor. The LPC55S69JEV98E also includes a five-input analog comparator with selectable internal/external reference voltage sources.
Is the LPC55S69JEV98E pin-compatible with other LPC55S6x variants in the VFBGA98 package?
Yes, the LPC55S69JEV98E shares identical pinout and package dimensions (VFBGA98, SOT1982-1) with LPC55S66JEV98 and all other JE*V98-marked LPC55S6x devices. Signal mapping, power domains, and reset behavior are consistent across these variants, enabling drop-in replacement where memory and peripheral requirements align. The LPC55S69JEV98E maintains full mechanical and electrical compatibility within the VFBGA98 family.
LPC55S69JEV98E Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Package/Case:
- 98-VFBGA
- Series:
- LPC55S6x
- Packaging:
- Tray
- Product Status:
- Active
- Programmable:
- -
- Core Processor:
- ARM® Cortex®-M33
- Core Size:
- 32-Bit Dual-Core
- Speed:
- 150MHz
- Connectivity:
- Flexcomm, I2C, MMC/SD/SDIO, SPI, UART/USART, USB
- Peripherals:
- Brown-out Detect/Reset, DMA, I2S, POR, PWM, RNG, WDT
- Number of I/O:
- 64
- Program Memory Size:
- 640KB (640K x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- -
- RAM Size:
- 320K x 8
- Voltage - Supply (Vcc/Vdd):
- 1.8V ~ 3.6V
- Data Converters:
- A/D 10x16b SAR
- Oscillator Type:
- Internal
- Operating Temperature:
- -40°C ~ 105°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
LPC55S69JEV98E FAQ
1.How can I place an order for LPC55S69JEV98E through Aetrix?
Please submit a Request for Quotation (RFQ) for LPC55S69JEV98E on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LPC55S69JEV98E reliable?
The price and inventory of LPC55S69JEV98E are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LPC55S69JEV98E is usually 5 days.
3.What payment methods are accepted for LPC55S69JEV98E?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LPC55S69JEV98E transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LPC55S69JEV98E?
LPC55S69JEV98E orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LPC55S69JEV98E order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LPC55S69JEV98E?
For technical support, including LPC55S69JEV98E datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LPC55S69JEV98E requirements.
6.How does Aetrix verify that LPC55S69JEV98E is sourced from the original manufacturer or authorized distributors?
All LPC55S69JEV98E products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LPC55S69JEV98E meets industry standards.
7.What is the process for return or replacement of LPC55S69JEV98E?
All LPC55S69JEV98E units undergo pre-shipment inspection (PSI). If there is an issue with LPC55S69JEV98E, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LPC55S69JEV98E part is unused and in its original packaging.
Return procedure for LPC55S69JEV98E:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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