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NXP Semiconductors LPC55S69JEV98K
- Part No.:
- LPC55S69JEV98K
- Manufacturer:
- NXP Semiconductors
- Category:
- Microcontrollers
- Package:
- 98-VFBGA
- Datasheet:
-
LPC55S69JEV98K.pdf
- Description:
- IC MCU 32BIT 640KB FLASH 98VFBGA
- Quantity:
- Payment:
- Shipping:
Inventory:4,963
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Product details
Overview
LPC55S69JEV98K from NXP Semiconductors is a dual-core ARM Cortex-M33 microcontroller with TrustZone security, PowerQuad DSP accelerator, CASPER crypto co-processor, 640 KB on-chip flash, 320 KB SRAM, and integrated USB HS/FS host/device interfaces. It operates up to 150 MHz (rev 1B), supports PRINCE real-time flash encryption, PUF-based key generation, and is qualified for industrial applications from −40 °C to +105 °C.
For engineers reviewing the LPC55S69JEV98K datasheet, LPC55S69JEV98K pinout, LPC55S69JEV98K application, or LPC55S69JEV98K equivalent, this page delivers verified technical context, validated pin functions for VFBGA98, confirmed security features (TrustZone, PRINCE, PUF, SHA2/AES), precise memory map, and real-world use cases in secure edge nodes and industrial control systems.
Technical Context
The LPC55S69JEV98K integrates two ARM Cortex-M33 cores: CPU0 (full configuration with MPU, FPU, TrustZone, ETM) and CPU1 (no MPU/FPU/TrustZone/ETM), both running up to 150 MHz. Its security architecture includes hardware-enforced isolation via TrustZone, PRINCE for on-the-fly flash encryption/decryption, and a Physical Unclonable Function (PUF) generating 64–4096-bit keys from dedicated SRAM.
DSP acceleration is delivered through PowerQuad (fixed/floating-point CMSIS-DSP support) and CASPER (ECC acceleration), while timing subsystems include five 32-bit general-purpose timers, SCTimer/PWM (16 capture/match registers), RTC with wake-up capability, and MRT for multi-rate interrupt generation. The device uses a VFBGA98 package with 98 balls, 0.5 mm pitch, and 7 mm × 7 mm body size.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core | Dual ARM Cortex-M33 (CPU0 + CPU1), revision r0p3, max 150 MHz (device revision 1B) |
| Memory | 640 KB on-chip flash (512-byte page erase/write); 320 KB SRAM (272 KB contiguous system bus + 32 KB code bus + 16 KB USB SRAM) |
| Security | ARM TrustZone, PRINCE flash encryption/decryption, PUF key generation (64–4096 bits), SHA2/AES-256, RSA-2048/4096, DICE v2.0 compliance |
| Analog | 16-bit 1.0 Msamples/sec ADC with 10 single-ended or 5 differential channels; integrated temperature sensor and analog comparator |
| Connectivity | USB 2.0 high-speed & full-speed host/device with on-chip PHY; nine Flexcomm interfaces (configurable as USART/SPI/I2C/I2S); SDIO v2.0/SDR25 support |
| Timers | Five 32-bit CTIMERs; SCTimer/PWM (8 inputs, 10 outputs, 16 capture/match registers); RTC with 1 s resolution and wake-up from deep power-down |
| Package | VFBGA98, thin fine-pitch ball grid array, 7 mm × 7 mm × 0.5 mm pitch, SOT1982-1 |
Pinout & Package
VFBGA98 package: 98-ball, 0.5 mm pitch, 7 mm × 7 mm body, lead-free, RoHS-compliant. Ball layout follows JEDEC MO-277 standard with corner index marker at A1.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| PIO0_0 / ACMP0_A | GPIO / Analog Comparator Input A | Digital I/O or comparator input A when ANAMODE=1; default reset state is high-impedance (Z) |
| PIO0_5 / TDI | JTAG Test Data In / Boot Source Selector | State at reset determines boot source (flash, ISP, ROM); internal pull-up enabled by default |
| PIO0_11 / ADC0_9 | ADC Channel 1B / SWCLK | Single-ended ADC input CH1B or negative differential pair with CH1A; default debug clock after boot |
| PIO0_12 / ADC0_10 | ADC Channel 2B / SWDIO | Single-ended ADC input CH2B or negative differential pair with CH2A; default debug data I/O after boot |
| USB_DP / USB_DM | USB 2.0 Differential Pair | Full-speed and high-speed USB transceiver signals; crystal-less operation supported in FS device mode |
Key Features
| Feature | Design Value |
|---|---|
| TrustZone-enabled dual-core execution | Hardware-isolated secure/non-secure worlds on CPU0; enables certified secure firmware partitioning and peripheral access control |
| PRINCE real-time flash encryption | On-the-fly AES-128 encryption/decryption of flash reads/writes without software overhead or latency penalty |
| PowerQuad hardware accelerator | Offloads CMSIS-DSP math operations (FFT, FIR, matrix) from CPU, reducing execution time by up to 10× vs. software-only implementation |
| CASPER crypto co-processor | Accelerates ECC scalar multiplication (NIST P-256, P-384) and modular arithmetic, enabling sub-100ms key agreement in TLS handshake |
| Secure boot with DICE v2.0 | Generates device-specific attestation keys and certificates during first boot; supports remote identity verification for zero-trust deployments |
Applications
| Industrial PLC Edge Node | Secure Smart Meter |
|---|---|
Use Scenario: Real-time motor control and fieldbus communication in compact programmable logic controllers with over-the-air firmware updates. IC Role / Device Role / Timing Role: Primary application controller executing deterministic control loops, managing CAN/RS-485 via Flexcomm, and enforcing secure OTA update validation via PRINCE and Secure Boot. Use Value: Dual-core separation allows non-secure control tasks on CPU1 while CPU0 handles encrypted firmware validation and cryptographic signing - eliminating external secure element dependency. |
Use Scenario: Tamper-resistant electricity meter with encrypted consumption logging, remote tariff updates, and regulatory compliance (IEC 62056, DLMS/COSEM). IC Role / Device Role / Timing Role: Root-of-trust anchor performing SHA256 image verification, AES-256 encrypted flash writes, and PUF-derived key storage for metering data confidentiality. Use Value: PRINCE encryption ensures meter firmware integrity even if flash is physically extracted; DICE attestation enables utility-level device identity binding for fleet-wide auditability. |
| Medical Sensor Hub | IIoT Gateway Controller |
Use Scenario: Low-power wearable hub aggregating ECG, temperature, and motion data with HIPAA-compliant local encryption before cloud upload. IC Role / Device Role / Timing Role: High-precision ADC interface (16-bit, 1 Msps) with simultaneous differential sampling, TRNG for session keys, and SHA2/AES for on-device data sealing. Use Value: Integrated PUF eliminates need for external secure EEPROM to store encryption keys - reducing BOM cost and attack surface in Class II medical devices. |
Use Scenario: Protocol-agnostic industrial gateway connecting Modbus RTU, CAN FD, and BLE sensors to MQTT cloud infrastructure with firmware rollback protection. IC Role / Device Role / Timing Role: Multi-protocol bridge using Flexcomm peripherals (UART/SPI/I2C), Secure Boot anti-rollback enforcement, and PowerQuad-accelerated TLS stack processing. Use Value: Dual-core architecture isolates protocol translation (CPU1) from security-critical tasks (CPU0), enabling concurrent real-time comms and cryptographic operations without scheduling conflict. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-core secure microcontroller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| LPC55S66JEV98 | Same VFBGA98 package, identical core architecture, but 256 KB flash and 144 KB SRAM; no PowerQuad or CASPER in some revisions | Suitable for cost-sensitive secure IoT endpoints where DSP/crypto acceleration is optional | Select when flash/SRAM requirements are ≤256 KB and hardware crypto acceleration is not required |
| RA6M5GFP | Renesas RA6M5 with Cortex-M33, 1 MB flash, 384 KB SRAM, but lacks PRINCE, PUF, and CASPER; uses TrustZone + Secure Crypto Engine instead | Better suited for high-throughput industrial HMI or motor control where large code footprint dominates over hardware root-of-trust depth | Choose when larger memory and Renesas ecosystem integration outweigh need for NXP-specific security IP like PRINCE or PUF |
Compared with LPC55S69JEV98K, LPC55S66JEV98 reduces memory and accelerators for lower cost, while RA6M5GFP trades NXP's PRINCE/PUF/CASPER stack for broader memory and different crypto engine - making LPC55S69JEV98K optimal for applications requiring certified flash encryption and silicon-rooted key generation.
Availability
LPC55S69JEV98K is available at Aetrix Electronics and suitable for industrial automation, smart energy metering, and secure medical edge devices requiring stable component supply across extended temperature ranges and long production lifecycles.
Supply support for LPC55S69JEV98K includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
NXP Semiconductors is a global semiconductor leader headquartered in Eindhoven, Netherlands, specializing in secure connectivity solutions for automotive, industrial, and IoT markets.
The LPC55S6x family was designed to deliver scalable, certified security and real-time performance for resource-constrained edge devices - combining Arm TrustZone, hardware crypto accelerators, and low-power design for industrial-grade reliability.
FAQ
What is the maximum operating frequency of the LPC55S69JEV98K?
The LPC55S69JEV98K operates at a maximum CPU frequency of 150 MHz, applicable only to device revision 1B as specified in the official NXP datasheet Rev. 2.4. This applies to both the primary Cortex-M33 core (CPU0) and secondary coprocessor (CPU1). Frequency scaling is managed via PLL0/PLL1 and internal FRO sources, with no requirement for external high-frequency crystals.
Does the LPC55S69JEV98K support secure boot with anti-rollback protection?
Yes, the LPC55S69JEV98K supports secure boot with full anti-rollback protection using image key revocation via x.509 certificate Serial Number fields. It supports up to 16 image key certificate revocations and stores four root-of-trust public key hashes in protected flash (PFR), enabling robust firmware update integrity and version control in production deployments.
What security hardware modules are integrated into the LPC55S69JEV98K?
The LPC55S69JEV98K integrates ARM TrustZone, PRINCE flash encryption/decryption, Physical Unclonable Function (PUF) for silicon fingerprinting and key generation (64–4096 bits), SHA2/AES-256 crypto engines, True Random Number Generator (TRNG), and DICE v2.0-compliant attestation - all implemented in dedicated hardware with no software dependency.
Which package type does the LPC55S69JEV98K use, and what are its mechanical dimensions?
The LPC55S69JEV98K uses the VFBGA98 package (SOT1982-1): a thin fine-pitch ball grid array with 98 solder balls, 0.5 mm pitch, and a 7 mm × 7 mm body size. It complies with JEDEC MO-277 and supports reflow soldering per IPC/JEDEC J-STD-020.
Can the LPC55S69JEV98K perform simultaneous ADC conversions on differential channel pairs?
Yes, the LPC55S69JEV98K's 16-bit ADC supports simultaneous conversions on two input channels belonging to the same differential pair - for example, ADC0_9 (CH1B) and ADC0_10 (CH2B) when configured as a differential pair. This capability enables precise noise-canceling measurements critical in motor current sensing and precision instrumentation.
LPC55S69JEV98K Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Package/Case:
- 98-VFBGA
- Series:
- LPC55S6x
- Packaging:
- Tray
- Product Status:
- Discontinued at Digi-Key
- Programmable:
- Not Verified
- Core Processor:
- ARM® Cortex®-M33
- Core Size:
- 32-Bit Dual-Core
- Speed:
- 150MHz
- Connectivity:
- Flexcomm, I2C, MMC/SD/SDIO, SPI, UART/USART, USB
- Peripherals:
- Brown-out Detect/Reset, DMA, I2S, POR, PWM, RNG, WDT
- Number of I/O:
- 64
- Program Memory Size:
- 640KB (640K x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- -
- RAM Size:
- 320K x 8
- Voltage - Supply (Vcc/Vdd):
- 1.8V ~ 3.6V
- Data Converters:
- A/D 10x16b
- Oscillator Type:
- Internal
- Operating Temperature:
- -40°C ~ 105°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
LPC55S69JEV98K FAQ
1.How can I place an order for LPC55S69JEV98K through Aetrix?
Please submit a Request for Quotation (RFQ) for LPC55S69JEV98K on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LPC55S69JEV98K reliable?
The price and inventory of LPC55S69JEV98K are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LPC55S69JEV98K is usually 5 days.
3.What payment methods are accepted for LPC55S69JEV98K?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LPC55S69JEV98K transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LPC55S69JEV98K?
LPC55S69JEV98K orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LPC55S69JEV98K order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LPC55S69JEV98K?
For technical support, including LPC55S69JEV98K datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LPC55S69JEV98K requirements.
6.How does Aetrix verify that LPC55S69JEV98K is sourced from the original manufacturer or authorized distributors?
All LPC55S69JEV98K products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LPC55S69JEV98K meets industry standards.
7.What is the process for return or replacement of LPC55S69JEV98K?
All LPC55S69JEV98K units undergo pre-shipment inspection (PSI). If there is an issue with LPC55S69JEV98K, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LPC55S69JEV98K part is unused and in its original packaging.
Return procedure for LPC55S69JEV98K:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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