NXP Semiconductors LPC55S69JEV98Y
- Part No.:
- LPC55S69JEV98Y
- Manufacturer:
- NXP Semiconductors
- Category:
- Microcontrollers
- Package:
- 98-VFBGA
- Datasheet:
-
LPC55S69JEV98Y.pdf
- Description:
- IC MCU 32BIT 640KB FLASH
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
LPC55S69JEV98Y from NXP Semiconductors is a dual-core Arm Cortex-M33 microcontroller with TrustZone security, 640 KB flash, 320 KB SRAM, and hardware accelerators (CASPER crypto, PowerQuad DSP), deployed in secure IoT edge nodes, industrial gateways, and automotive body control modules requiring real-time processing and cryptographic integrity.
For engineers reviewing the LPC55S69JEV98Y datasheet, LPC55S69JEV98Y pinout, LPC55S69JEV98Y application, or LPC55S69JEV98Y equivalent, this page delivers verified core architecture details, validated VFBGA98 package mapping, confirmed dual-CPU timing behavior, and precise security feature implementation-enabling rapid secure firmware architecture decisions without cross-referencing external documents.
Technical Context
The LPC55S69JEV98Y integrates two independent Arm Cortex-M33 cores: CPU0 (150 MHz, with FPU, MPU, TrustZone, ETM) for secure application execution, and CPU1 (150 MHz, no FPU/MPU/TrustZone) for deterministic real-time tasks. Its CASPER co-processor accelerates ECC operations, while PowerQuad executes CMSIS-DSP functions at fixed/floating-point precision using dedicated hardware paths.
Security is enforced via PRINCE flash encryption, PUF-generated keys, SHA2/AES engines, and DICE-compliant device identity. Clocking combines FROs (96/12/1 MHz, ±1% accuracy), 32.768 kHz RTC oscillator, and dual PLLs enabling full-speed USB HS operation without external crystals.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Architecture | Dual Arm Cortex-M33: CPU0 (150 MHz, FPU/MPU/TrustZone), CPU1 (150 MHz, no FPU/MPU/TrustZone) |
| Memory | 640 KB on-chip flash (512-byte page erase), 320 KB SRAM (272 KB contiguous system bus + 32 KB code bus + 16 KB USB SRAM) |
| Security Engines | PRINCE real-time flash encryption/decryption, CASPER ECC accelerator, PowerQuad CMSIS-DSP hardware, PUF key generation (64–4096 bits) |
| Analog Peripherals | 16-bit ADC (1.0 Msamples/sec, 10 SE / 5 diff channels, simultaneous conversion support), integrated temp sensor, 5-input comparator |
| Serial Interfaces | Nine Flexcomm peripherals (configurable as USART/SPI/I2C/I2S), USB 2.0 FS+HS host/device with crystal-less FS mode, SDIO/SDMMC with DMA |
| Timers & Logic | Five 32-bit CTIMERs, SCTimer/PWM (8 inputs/10 outputs), RTC (32.768 kHz source), MRT, WWDT, PLU for state-machine logic |
| Package & Environment | VFBGA98 (7 mm × 7 mm, 0.5 mm pitch), -40 °C to +105 °C operating range, single 1.8–3.6 V supply with internal DC-DC converter |
Pinout & Package
VFBGA98 package: 98-ball thin fine-pitch BGA, 7 mm × 7 mm body, 0.5 mm ball pitch, top-side marking "LPC55S6x" / "JEV98" / date code / revision "1B".
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| PIO0_0 / ACMP0_A | GPIO / Analog Comparator Input A | Digital I/O default; analog input when DIGIMODE=0 & ANAMODE=1; enables differential sensing with PIO0_9 |
| PIO0_11 / ADC0_9 | GPIO / ADC Channel 1B | Single-ended ADC input or negative differential pair with PIO0_10; supports simultaneous sampling with channel 1A |
| FC3_SCK | Flexcomm 3 Clock | Configurable clock for SPI/USART/I2S; shared with PIO0_2 and PIO0_6 in alternate functions |
| SWCLK | Serial Wire Debug Clock | Default debug clock after boot; requires external pull-up; used with SWDIO for JTAG-less programming and trace |
| VDD | Main Power Supply | 1.8–3.6 V input feeding internal DC-DC converter and LDOs; decoupling required per datasheet layout guidelines |
| RST_N | Active-Low Reset Input | Asynchronous reset signal; internal POR/BOD ensures reliable startup across voltage and temperature ranges |
Key Features
| Feature | Design Value |
|---|---|
| TrustZone-enabled dual-core isolation | Hardware-enforced memory and peripheral partitioning between secure/non-secure worlds on CPU0; CPU1 operates outside TrustZone for RTOS offload |
| PRINCE real-time flash encryption | On-the-fly AES-128 encryption/decryption of flash reads/writes; enables secure OTA updates without software overhead or flash wear penalty |
| PowerQuad hardware DSP acceleration | Fixed/floating-point CMSIS-DSP function execution (e.g., FFT, FIR) at up to 150 MHz without CPU intervention; reduces latency in motor control/audio preprocessing |
| PUF-based key generation | Dedicated SRAM-based Physical Unclonable Function generates cryptographically strong keys (64–4096 bits); eliminates need for external secure element or key storage |
| Crystal-less USB Full-Speed | USB FS device mode operates without external 12 MHz crystal using internal FRO and software calibration; reduces BOM cost and PCB footprint |
Applications
| Industrial PLC Edge Node | Secure Automotive Body Controller |
|---|---|
Use Scenario: Localized logic execution and sensor fusion in distributed I/O modules, communicating via CAN FD to central controller. IC Role / Device Role / Timing Role: Dual-core runtime: CPU0 runs secure Modbus TCP stack and encrypted data logging; CPU1 handles real-time PWM for valve actuation and ADC sampling at 1 MS/s. Use Value: TrustZone isolates firmware updates from control loops; PRINCE prevents flash tampering; PowerQuad accelerates vibration analysis FFTs without CPU load. |
Use Scenario: Central gateway managing door locks, lighting, and seat position memory with over-the-air update capability. IC Role / Device Role / Timing Role: Secure boot validates SB2-format firmware images; PUF-derived keys encrypt EEPROM-stored user preferences; SCTimer/PWM drives multi-channel LED dimming. Use Value: DICE-compliant device identity enables OEM fleet authentication; CASPER accelerates ECDSA signature verification for signed OTA packages. |
| Medical Wearable Sensor Hub | Smart Grid Communication Module |
Use Scenario: Aggregating ECG, SpO₂, and motion data from multiple sensors before transmitting via BLE or cellular modem. IC Role / Device Role / Timing Role: CPU0 hosts TLS 1.3 stack and secure bootloader; CPU1 performs real-time filtering and peak detection on ADC streams using PowerQuad-accelerated FIR kernels. Use Value: SHA2/AES engine enables authenticated encryption of patient data; TRNG supplies entropy for session keys; low-power deep-sleep modes extend battery life. |
Use Scenario: Substation terminal unit (RTU) collecting meter readings and executing grid protection logic with remote configuration. IC Role / Device Role / Timing Role: PRINCE-encrypted flash stores certified firmware images; RTC with alarm timer triggers scheduled diagnostics; SDIO interface logs events to removable microSD card. Use Value: Anti-rollback prevents downgrade attacks during field updates; secure GPIO pins isolate critical trip circuits from software faults; -40°C to +105°C rating ensures outdoor reliability. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-core secure microcontroller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| LPC55S66JEV98 | Same VFBGA98 package and dual-M33 architecture but with 256 KB flash and 144 KB SRAM; lacks PowerQuad and CASPER in some revisions | Suitable for cost-sensitive designs where crypto acceleration and large buffer memory are not required | Select LPC55S66JEV98 only if application firmware fits within 256 KB flash and does not require hardware ECC or CMSIS-DSP offload |
| RA6M5GFP | Renesas RA6M5 with Cortex-M33, 1 MB flash, 384 KB SRAM, but no CASPER co-processor or PRINCE; uses TrustZone + SCE7 security accelerator | Better suited for high-throughput communication stacks (Ethernet, USB HS) but lacks on-the-fly flash encryption | Choose RA6M5GFP when Ethernet MAC or larger code size dominates requirements, and PRINCE-level flash protection is not mandated |
Compared with LPC55S66JEV98 and RA6M5GFP, the LPC55S69JEV98 uniquely combines VFBGA98 packaging with 640 KB flash, PRINCE encryption, and dedicated CASPER/PowerQuad hardware-making it the only option among the three that satisfies simultaneous requirements for compact form factor, secure firmware updates, and real-time DSP offload.
Availability
LPC55S69JEV98Y is available at Aetrix Electronics and suitable for industrial automation, automotive body electronics, and medical wearable design requiring stable component supply, long-term lifecycle assurance, and traceable sourcing for safety-critical deployments.
Supply support for LPC55S69JEV98Y includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
NXP Semiconductors is a global semiconductor leader specializing in secure connectivity solutions for automotive, industrial, and IoT markets, with headquarters in Eindhoven, Netherlands.
The LPC55S6x product line targets resource-constrained edge devices needing hardware-enforced security, real-time responsiveness, and energy efficiency-designed specifically for secure firmware execution, cryptographic services, and sensor-driven control in harsh environments.
FAQ
What is the maximum operating frequency of the LPC55S69JEV98Y?
The LPC55S69JEV98Y operates at up to 150 MHz on both CPU0 and CPU1 cores, but only in device revision 1B (indicated by '1B' in the top-side marking). Revision 0A parts are limited to 100 MHz. This frequency is sustained using internal PLLs fed from the 96 MHz FRO or external oscillators, with no requirement for high-frequency external crystals.
Does the LPC55S69JEV98Y support crystal-less USB Full-Speed operation?
Yes, the LPC55S69JEV98Y supports crystal-less USB Full-Speed device mode using its internal 96 MHz Free Running Oscillator (FRO) with software calibration, as documented in NXP Technical Note TN00063. This eliminates the need for an external 12 MHz crystal, reducing BOM cost and PCB area while maintaining USB compliance.
How does the PRINCE module function in the LPC55S69JEV98Y?
The PRINCE module in the LPC55S69JEV98Y performs real-time AES-128 encryption of data written to flash and decryption of data read from flash, using keys stored in protected memory. It operates transparently to software, enabling secure firmware updates and IP protection without modifying application code or increasing flash access latency.
What are the secure boot capabilities of the LPC55S69JEV98Y?
The LPC55S69JEV98Y implements secure boot using RSASSA-PKCS1-v1_5 signatures over SHA256 digests, supporting RSA-2048 and RSA-4096 public keys in x509 format. It enforces anti-rollback via image key revocation and establishes root-of-trust using four configurable RoT keys stored in protected flash, compliant with TBSA and DICE v2.0 standards.
Which package type does the LPC55S69JEV98Y use, and what are its mechanical dimensions?
The LPC55S69JEV98Y uses the VFBGA98 package: a 7 mm × 7 mm thin fine-pitch ball grid array with 98 solder balls arranged in a 10×10 grid (corner balls omitted), 0.5 mm pitch, and 0.4 mm ball diameter. Its SOT1982-1 variant designation confirms compatibility with standard BGA reflow profiles and automated optical inspection.
LPC55S69JEV98Y Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Package/Case:
- 98-VFBGA
- Series:
- LPC55S6x
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
- -
- Core Processor:
- ARM® Cortex®-M33
- Core Size:
- 32-Bit Dual-Core
- Speed:
- 150MHz
- Connectivity:
- Flexcomm, I2C, MMC/SD/SDIO, SPI, UART/USART, USB
- Peripherals:
- Brown-out Detect/Reset, DMA, I2S, POR, PWM, RNG, WDT
- Number of I/O:
- 64
- Program Memory Size:
- 640KB (640K x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- -
- RAM Size:
- 320K x 8
- Voltage - Supply (Vcc/Vdd):
- 1.8V ~ 3.6V
- Data Converters:
- A/D 10x16b SAR
- Oscillator Type:
- Internal
- Operating Temperature:
- -40°C ~ 105°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
LPC55S69JEV98Y FAQ
1.How can I place an order for LPC55S69JEV98Y through Aetrix?
Please submit a Request for Quotation (RFQ) for LPC55S69JEV98Y on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LPC55S69JEV98Y reliable?
The price and inventory of LPC55S69JEV98Y are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LPC55S69JEV98Y is usually 5 days.
3.What payment methods are accepted for LPC55S69JEV98Y?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LPC55S69JEV98Y transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LPC55S69JEV98Y?
LPC55S69JEV98Y orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LPC55S69JEV98Y order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LPC55S69JEV98Y?
For technical support, including LPC55S69JEV98Y datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LPC55S69JEV98Y requirements.
6.How does Aetrix verify that LPC55S69JEV98Y is sourced from the original manufacturer or authorized distributors?
All LPC55S69JEV98Y products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LPC55S69JEV98Y meets industry standards.
7.What is the process for return or replacement of LPC55S69JEV98Y?
All LPC55S69JEV98Y units undergo pre-shipment inspection (PSI). If there is an issue with LPC55S69JEV98Y, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LPC55S69JEV98Y part is unused and in its original packaging.
Return procedure for LPC55S69JEV98Y:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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