Texas Instruments LPC662AIMX/NOPB
- Part No.:
- LPC662AIMX/NOPB
- Manufacturer:
- Texas Instruments
- Category:
- Instrumentation, Op Amps, Buffer Amps
- Package:
- 8-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
LPC662AIMX/NOPB.pdf
- Description:
- IC CMOS 2 CIRCUIT 8SOIC
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
LPC662AIMX/NOPB from Texas Instruments (formerly National Semiconductor) is a low-power CMOS dual operational amplifier optimized for single-supply operation across +5V to +15V, delivering rail-to-rail output swing, ultra-low input bias current (2 fA), and 3 mV input offset voltage. It serves as a precision signal-conditioning IC in high-impedance sensor interfaces and micropower analog front-ends for industrial instrumentation and battery-powered data acquisition systems.
For engineers reviewing the LPC662AIMX/NOPB datasheet, LPC662AIMX/NOPB pinout, LPC662AIMX/NOPB application, or LPC662AIMX/NOPB equivalent, key selection considerations include its guaranteed 0.11 V/µs slew rate at 15V, 120 dB open-loop gain into 100 kΩ, −40°C to +85°C industrial temperature range, SOIC-8 packaging, and compatibility with rail-to-rail input common-mode range including ground.
Technical Context
The LPC662AIMX/NOPB employs a non-conventional topology where the output is taken directly from the integrator stage-enabling rail-to-rail swing without a traditional unity-gain buffer-while embedding dual feed-forward compensation (Cf and Cff) for stability under capacitive loads up to 100 pF when combined with series output resistance.
Its compound integrator features push-pull sourcing/sinking capability, delivering ≥16 mA output current while maintaining >70 dB CMRR and PSRR across frequency. Input stage design achieves 2 fA bias current and 1.3 µV/°C offset drift by leveraging advanced double-poly silicon-gate CMOS process technology.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Supply Voltage Range | +4.75V to +15.5V - supports single-supply operation down to 5V logic rails and up to 15V industrial analog buses. |
| Input Offset Voltage | 3 mV max - enables accurate DC-coupled amplification in precision current-to-voltage converters without trimming. |
| Input Bias Current | 2 fA typical - preserves signal integrity in photodiode, piezoelectric, or high-value resistor networks (>1 GΩ). |
| Slew Rate | 0.11 V/µs - sufficient for <1 kHz small-signal bandwidth in active filters and sample-and-hold circuits. |
| Open-Loop Gain | 120 dB into 100 kΩ - ensures <0.01% gain error in unity-gain buffers and high-precision inverting configurations. |
| Output Swing | Within 60 mV of rails (at 100 kΩ load, VS = 5V) - maintains full dynamic range in low-voltage ADC driver stages. |
| Quiescent Current | 140 µA max per amplifier - enables micropower operation in always-on sensor nodes with <1 µA standby current budgets. |
Pinout & Package
Package: 8-pin SOIC (D), 3.9 mm × 4.9 mm body, 1.27 mm pitch, RoHS-compliant matte tin lead finish, MSL Level-1.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 | Inverting Input (Amplifier A) | High-impedance node accepting differential feedback; requires guard ring layout for sub-pA leakage control. |
| 2 | Non-Inverting Input (Amplifier A) | DC-coupled input capable of operating at ground potential; enables true single-supply transducer interfacing. |
| 3 | Output (Amplifier A) | Rail-to-rail sourcing/sinking output; stable with ≥500 Ω resistive or ≤100 pF capacitive loads when compensated. |
| 4 | V− (Ground / Negative Supply) | Reference node for single-supply operation; must be connected to system ground or negative rail with low-impedance path. |
| 5 | Non-Inverting Input (Amplifier B) | Independent high-Z input identical to Pin 2; supports dual-channel signal conditioning without crosstalk (130 dB isolation). |
| 6 | Inverting Input (Amplifier B) | Matches Pin 1 functionality; allows independent configuration of second amplifier for composite functions (e.g., instrumentation amp). |
| 7 | Output (Amplifier B) | Electrically isolated from Amp A output; usable for dual-path filtering or differential drive with matched thermal drift. |
| 8 | V+ (Positive Supply) | Primary power connection; accepts 4.75–15.5V; internal regulation ensures stable biasing across supply range. |
Key Features
| Feature | Design Value |
|---|---|
| Rail-to-rail output swing | Delivers full-scale output within 60 mV of V+ or V− at 100 kΩ load, maximizing ADC utilization in 3.3V/5V systems. |
| Micropower operation | 140 µA max total supply current enables >1-year battery life in coin-cell-powered environmental sensors. |
| Input common-mode range includes ground | Allows direct interface to grounded transducers (e.g., thermocouples, strain gauges) without level-shifting circuitry. |
| Ultra-low input bias current (2 fA) | Minimizes voltage error across >10 GΩ source impedances, critical for electrometer-grade pH and ion-selective electrodes. |
| Specified performance into 5 kΩ and 100 kΩ loads | Guarantees 120 dB gain and 0.11 V/µs slew rate under realistic load conditions-not just high-Z test setups. |
Applications
| High-Impedance Buffer | Precision Current-to-Voltage Converter |
|---|---|
|
Use Scenario: Amplifying output of a 10 GΩ photodiode in low-light optical sensing. IC Role / Device Role / Timing Role: High-Z buffer isolating detector capacitance from downstream circuitry while preserving signal fidelity. Use Value: 2 fA input bias current prevents >20 mV offset error across 10 GΩ source impedance, enabling sub-nA photocurrent resolution. |
Use Scenario: Converting nanoamp-level leakage current from insulation resistance testers. IC Role / Device Role / Timing Role: Transimpedance amplifier with programmable gain via feedback resistor selection. Use Value: 3 mV max VOS and 1.3 µV/°C drift ensure <1 µV/°C measurement drift over industrial temperature range. |
| Long-Term Integrator | Active Filter |
|
Use Scenario: Building a 100-second time-constant integrator for energy metering accumulators. IC Role / Device Role / Timing Role: Low-drift integrator core using capacitor feedback and precision reference input. Use Value: Sub-fA input leakage limits integration error to <0.1% over 100 s, outperforming bipolar op amps by 3 orders of magnitude. |
Use Scenario: Implementing a 10 Hz bandpass filter in portable ECG front-end. IC Role / Device Role / Timing Role: Dual-amplifier biquad topology providing Q = 2.1 and −8.8 V/V gain. Use Value: 0.01% THD at 1 kHz ensures clean biopotential waveform reproduction without harmonic distortion artifacts. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual low-power operational amplifier applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| LMC662IMX/NOPB | Same die, identical electrical specs; differs only in branding and TI's post-acquisition part numbering. | No functional difference; fully interchangeable in all designs using LPC662AIMX/NOPB. | Select LMC662IMX/NOPB if sourcing from TI's current production line with updated traceability and packaging documentation. |
| TLV2462IDR | Higher quiescent current (550 µA vs. 140 µA), lower input bias current (1 pA vs. 2 fA), no guaranteed rail-to-rail input. | Better AC performance (1.5 MHz GBW, 1.5 V/µs slew) but unsuitable for ultra-high-Z DC-coupled applications. | Choose TLV2462IDR only when higher speed and drive capability outweigh micropower and femtoamp bias requirements. |
Compared with LMC662IMX/NOPB, LPC662AIMX/NOPB offers identical performance but reflects legacy National Semiconductor branding and qualification history; versus TLV2462IDR, it trades bandwidth for femtoamp bias current and rail-to-rail input capability-making it irreplaceable in electrometer and long-integration applications.
Availability
LPC662AIMX/NOPB is available at Aetrix Electronics and suitable for industrial instrumentation, battery-powered sensor nodes, and precision analog front-ends requiring stable component supply across extended product lifecycles.
Supply support for LPC662AIMX/NOPB includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments acquired National Semiconductor in 2011 and maintains full production, qualification, and technical support for legacy National analog products including the LPC662 series.
The LPC662AIMX/NOPB belongs to National's precision micropower CMOS op-amp family, designed specifically for ultra-low-input-bias-current signal conditioning in single-supply, high-impedance measurement systems.
FAQ
What is the maximum capacitive load the LPC662AIMX/NOPB can drive without oscillation?
The LPC662AIMX/NOPB remains stable with capacitive loads up to 100 pF when used in unity-gain follower configuration with a 50–100 Ω series resistor at the output and a 5–10 pF feedback capacitor from inverting input to output. Without this compensation, oscillation may occur above ~30 pF depending on gain and PCB layout parasitics. The device's internal topology avoids instability with resistive loads down to 500 Ω, as confirmed in the datasheet's stability curves.
Does the LPC662AIMX/NOPB support true rail-to-rail input operation?
No-the LPC662AIMX/NOPB features rail-to-rail *output* swing and an input common-mode range that *includes ground*, but its input does not extend to the positive rail. The input common-mode voltage range is specified as −0.1 V to (V+ − 2.3 V) at 25°C, meaning it operates correctly when inputs are near ground or moderately below V+, but not up to V+. This distinction is critical for single-supply applications where input signals approach V+.
Can the LPC662AIMX/NOPB be used in a dual-supply configuration?
Yes-the LPC662AIMX/NOPB operates with split supplies ranging from ±2.375V to ±7.75V (total 4.75V to 15.5V), as confirmed by its absolute maximum rating of ±16V differential supply and operating range specification. Its input common-mode range includes ground, and output swings rail-to-rail relative to both supplies, making it suitable for traditional ±5V or ±7.5V analog signal chains where low power and low bias current are required.
What is the thermal resistance (θJA) of the LPC662AIMX/NOPB in SOIC-8 package?
The LPC662AIMX/NOPB in SOIC-8 (package drawing D) has a junction-to-ambient thermal resistance (θJA) of 165°C/W, as documented in the "Thermal Resistance (θJA)" table of the datasheet. This value assumes standard JEDEC 2-layer board mounting; actual thermal performance improves with copper pour and thermal vias. At maximum 140 µA per amplifier (280 µA total), power dissipation is ~1.4 mW at 5V, resulting in negligible self-heating (<0.25°C rise).
Is the LPC662AIMX/NOPB qualified for automotive applications?
No-the LPC662AIMX/NOPB is rated for the industrial temperature range (−40°C to +85°C) and carries no AEC-Q200 qualification. While it meets functional specifications across that range, it lacks automotive-specific reliability testing, failure analysis reporting, and PPAP documentation. For automotive use, consider TI's TLVx365 or OPAx320 families, which offer AEC-Q100 Grade 2 qualification and similar low-power, low-bias-current performance.
LPC662AIMX/NOPB Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 8-SOIC (0.154", 3.90mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Amplifier Type:
- CMOS
- Number of Circuits:
- 2
- Output Type:
- Push-Pull, Rail-to-Rail
- Slew Rate:
- 0.11V/µs
- Gain Bandwidth Product:
- 350 kHz
- -3db Bandwidth:
- -
- Current - Input Bias:
- 0.002 pA
- Voltage - Input Offset:
- 1 mV
- Current - Supply:
- 86µA (x2 Channels)
- Current - Output / Channel:
- 40 mA
- Voltage - Supply Span (Min):
- 4.75 V
- Voltage - Supply Span (Max):
- 15.5 V
- Operating Temperature:
- -40°C ~ 85°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-SOIC
LPC662AIMX/NOPB FAQ
1.How can I place an order for LPC662AIMX/NOPB through Aetrix?
Please submit a Request for Quotation (RFQ) for LPC662AIMX/NOPB on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LPC662AIMX/NOPB reliable?
The price and inventory of LPC662AIMX/NOPB are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LPC662AIMX/NOPB is usually 5 days.
3.What payment methods are accepted for LPC662AIMX/NOPB?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LPC662AIMX/NOPB transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LPC662AIMX/NOPB?
LPC662AIMX/NOPB orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LPC662AIMX/NOPB order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LPC662AIMX/NOPB?
For technical support, including LPC662AIMX/NOPB datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LPC662AIMX/NOPB requirements.
6.How does Aetrix verify that LPC662AIMX/NOPB is sourced from the original manufacturer or authorized distributors?
All LPC662AIMX/NOPB products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LPC662AIMX/NOPB meets industry standards.
7.What is the process for return or replacement of LPC662AIMX/NOPB?
All LPC662AIMX/NOPB units undergo pre-shipment inspection (PSI). If there is an issue with LPC662AIMX/NOPB, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LPC662AIMX/NOPB part is unused and in its original packaging.
Return procedure for LPC662AIMX/NOPB:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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