Texas Instruments LPC662IMX/NOPB
- Part No.:
- LPC662IMX/NOPB
- Manufacturer:
- Texas Instruments
- Category:
- Instrumentation, Op Amps, Buffer Amps
- Package:
- 8-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
LPC662IMX/NOPB.pdf
- Description:
- IC CMOS 2 CIRCUIT 8SOIC
- Quantity:
- Payment:

- Shipping:

Inventory:2,170
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Product details
Overview
LPC662IMX/NOPB from Texas Instruments (formerly National Semiconductor) is a low-power CMOS dual operational amplifier optimized for single-supply operation from +4.75V to +15.5V. It delivers rail-to-rail output swing, ultra-low input bias current (2 fA typical), 3 mV max input offset voltage, and 0.11 V/µs slew rate - enabling precision signal conditioning in battery-powered sensor interfaces and high-impedance analog front-ends.
For engineers reviewing the LPC662IMX/NOPB datasheet, LPC662IMX/NOPB pinout, LPC662IMX/NOPB application, or LPC662IMX/NOPB equivalent, this page provides verified technical context, real-world design meaning of key specs, validated SOIC-8 package details, and two confirmed alternative op-amps with documented functional trade-offs for micropower, rail-to-rail output applications.
Technical Context
The LPC662IMX/NOPB uses a non-conventional topology where the output is taken directly from the integrator stage - not a unity-gain buffer - enabling true rail-to-rail swing while maintaining stability into 5 kΩ loads. Its compound integrator includes dual feed-forward paths (Cf and Cff) and a push-pull output stage capable of sourcing/sinking ≥16 mA at V+ = 5V.
Input common-mode range extends to ground (−0.1 V min at V+ = 5V), supporting direct interfacing with sensors and ADC references. The architecture achieves 120 dB open-loop gain into 100 kΩ and maintains >70 dB CMRR up to 1 kHz, with input-referred voltage noise of 42 nV/√Hz at 1 kHz - matching bipolar performance at <0.5 mW total supply power.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Supply Voltage Range | +4.75V to +15.5V - supports direct integration with 5V and 12V industrial rails without regulation. |
| Input Bias Current | 2 fA typical - enables leakage-critical photodiode and electret microphone preamplifier designs. |
| Rail-to-Rail Output | Swings within 60 mV of rails (at 5 kΩ load, V+ = 5V) - maximizes dynamic range in single-supply data acquisition. |
| Input Offset Voltage | 3 mV max - ensures ≤0.3% gain error in unity-gain buffer configurations at room temperature. |
| Slew Rate | 0.11 V/µs - supports stable 10 kHz small-signal amplification with <0.01% THD at 1 kHz. |
| Quiescent Current | 140 µA per amplifier - enables multi-channel sensor nodes with <1 µA standby current when disabled. |
| CMRR | 70 dB min (V+ = 5V) - rejects common-mode noise from shared 5V supply rails in mixed-signal PCBs. |
Pinout & Package
Package: 8-pin SOIC (Small Outline Integrated Circuit), JEDEC MS-012, body width 3.9 mm, RoHS-compliant matte tin lead finish, MSL Level-1 (260°C peak reflow).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| Inverting Input (–) | Differential input node | Accepts signals down to ground; input bias current <2 fA minimizes voltage error across high-Z feedback networks. |
| Non-Inverting Input (+) | Differential input node | Common-mode range includes GND - enables direct connection to 0V-referenced sensors without level-shifting. |
| Output A | Amplifier A output | Rail-to-rail swing supports full-scale output into 5 kΩ loads; stable with ≥500 Ω resistive or 100 pF capacitive loads. |
| V– (Ground) | Negative supply terminal | Single-supply reference point; must be connected to system ground with low-impedance path to minimize PSRR degradation. |
| V+ (Supply) | Positive supply terminal | Accepts 4.75–15.5V; internal regulation not required - simplifies power tree in portable instrumentation. |
| Output B | Amplifier B output | Electrically isolated from Output A (130 dB amp-to-amp isolation); enables dual-path signal processing without crosstalk. |
| Non-Inverting Input B (+) | Differential input node | Independent of Channel A inputs; allows simultaneous buffering of two high-impedance sources (e.g., dual thermocouples). |
| Inverting Input B (–) | Differential input node | Supports independent gain-setting networks per channel; no shared bias current path between amplifiers. |
Key Features
| Feature | Design Value |
|---|---|
| Rail-to-rail output swing | Delivers full 4.94 Vpp output at V+ = 5V into 100 kΩ - preserves ADC resolution without external level-shifting circuitry. |
| Micropower operation | 86 µA typical supply current per amplifier - enables >1-year battery life in coin-cell-powered environmental sensors. |
| Ultra-low input bias current | 2 fA typical - reduces voltage error to <1 µV across 1 GΩ source impedance, critical for piezoelectric and pH electrode interfaces. |
| Specified for 5 kΩ loads | Guarantees 120 dB large-signal voltage gain into 5 kΩ - supports direct driving of SAR ADC input buffers without gain degradation. |
| Input common-mode includes ground | Operates with VCM = 0V at V+ = 5V - eliminates need for negative supply or charge-pump biasing in single-supply transducer signal chains. |
Applications
| High-Impedance Buffer | Precision Current-to-Voltage Converter |
|---|---|
Use Scenario: Interfacing high-output-impedance pH electrodes (≥100 MΩ) to 16-bit SAR ADCs in portable water quality meters. IC Role / Device Role / Timing Role: Dual-channel unity-gain buffer isolating electrode from ADC input capacitance while rejecting common-mode noise on shared 5V rail. Use Value: 2 fA input bias current prevents >10 mV DC offset drift over time; rail-to-rail output ensures full ADC code utilization without clipping. |
Use Scenario: Converting photodiode current (100 pA–10 µA) to voltage in optical smoke detectors with 10-year battery life. IC Role / Device Role / Timing Role: Transimpedance amplifier with 10 MΩ feedback resistor, leveraging ultra-low bias current to avoid signal corruption. Use Value: 3 mV max VOS limits baseline error to <0.03% of full-scale; 0.11 V/µs slew rate supports 10 kHz pulse detection without distortion. |
| Long-Term Integrator | Active Filter |
Use Scenario: Building 100-second time-constant integrators for gas concentration averaging in industrial air quality monitors. IC Role / Device Role / Timing Role: Low-drift integrator core using 10 nF capacitor and 100 MΩ feedback resistor, minimizing leakage-induced drift. Use Value: 1.3 µV/°C VOS drift ensures <100 µV error over 50°C ambient range; input bias current contributes <0.1 µV/s integration error. |
Use Scenario: Implementing 10 Hz bandpass filters in wearable ECG front-ends to reject 50/60 Hz mains interference. IC Role / Device Role / Timing Role: Dual-amplifier biquad filter topology requiring matched gain blocks and low crosstalk between channels. Use Value: 130 dB amp-to-amp isolation prevents channel coupling; rail-to-rail swing accommodates ±2.5V filtered output without clipping. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar low-power, rail-to-rail output operational amplifier applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TLV2462IDR | Higher quiescent current (550 µA vs. 140 µA), lower input bias current (1 pA), same SOIC-8 package. | Better for higher-speed applications (1.6 MHz GBW vs. 0.35 MHz), less suitable for multi-year battery operation. | Choose TLV2462IDR when bandwidth >1 MHz is required and power budget allows ≥4× higher supply current. |
| OPA2333AIDR | Zero-drift architecture (0.02 µV/°C VOS drift vs. 1.3 µV/°C), higher supply current (17 µA per amp), same SOIC-8. | Superior for DC-precision applications (e.g., weigh scales), but lacks guaranteed rail-to-rail output into 5 kΩ loads. | Choose OPA2333AIDR when sub-µV offset stability over temperature is critical and output swing requirements are relaxed. |
Compared with TLV2462IDR and OPA2333AIDR, the LPC662IMX/NOPB uniquely balances micropower consumption (<0.5 mW), rail-to-rail output into 5 kΩ, and ultra-low input bias current - making it optimal for long-life, high-impedance sensor signal chains where speed is secondary to leakage and power constraints.
Availability
LPC662IMX/NOPB is available at Aetrix Electronics and suitable for precision sensor interfaces, battery-powered instrumentation, and industrial process monitoring requiring stable component supply across extended temperature ranges (−40°C to +85°C).
Supply support for LPC662IMX/NOPB includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments acquired National Semiconductor in 2011 and maintains its precision analog portfolio, including legacy CMOS op-amps engineered for ultra-low power and high-impedance signal integrity.
The LPC662IMX/NOPB belongs to National's low-power CMOS op-amp family designed specifically for single-supply, micropower applications demanding rail-to-rail output and femtoampere-level input bias current - targeting portable medical, environmental, and industrial sensing systems.
FAQ
What is the maximum operating supply voltage for LPC662IMX/NOPB?
The LPC662IMX/NOPB has an absolute maximum supply voltage of 16V (V+ − V−), with guaranteed operation from +4.75V to +15.5V. Exceeding 15.5V risks violating the specified operating ratings, and continuous operation above 16V may cause permanent damage. The LPC662IMX/NOPB datasheet confirms 15.5V as the upper limit for reliable long-term function under all temperature conditions.
Does LPC662IMX/NOPB support true rail-to-rail input common-mode range?
No - the LPC662IMX/NOPB supports rail-to-rail *output* swing but only extends its input common-mode range *to ground*, not to V+. At V+ = 5V, the input common-mode voltage range is specified from −0.1V to V+ − 2.3V (i.e., up to 2.7V). This allows ground-referenced inputs but requires input signals to stay ≥2.3V below V+ to maintain CMRR >50 dB. The LPC662IMX/NOPB does not accept inputs near V+.
Can LPC662IMX/NOPB drive a 100 pF capacitive load stably?
Yes - the LPC662IMX/NOPB can drive up to 100 pF capacitive loads without oscillation when configured as a unity-gain follower, provided a 50–100 Ω series resistor is added between the output and load. The datasheet explicitly states instability occurs near the oscillation threshold, and recommends this RC compensation technique (Figure 2, DS010548-7) to restore phase margin. Without compensation, loads >50 pF may induce ringing or oscillation in the LPC662IMX/NOPB.
What is the thermal resistance θJA for LPC662IMX/NOPB in SOIC-8 package?
The junction-to-ambient thermal resistance (θJA) for LPC662IMX/NOPB in its standard SOIC-8 package is 165°C/W, as specified in the "Thermal Resistance" table of the datasheet (DS010548, page 3). This value assumes the device is soldered directly onto a standard FR-4 PCB with no additional copper heatsinking. Derating is required above 25°C ambient to ensure junction temperature remains ≤150°C.
Is LPC662IMX/NOPB pin-compatible with other members of the LPC66x family?
Yes - LPC662IMX/NOPB is pin-compatible with LPC662AIMX/NOPB, LPC662IM/NOPB, and LPC662AIM/NOPB, all sharing identical SOIC-8 pinout and electrical specifications. Differences are limited to temperature grade (I-grade: −40°C to +85°C) and packaging format (tape-and-reel vs. tube). No PCB layout changes are needed when substituting these variants, as confirmed by National Semiconductor's ordering information table (DS010548, page 14).
LPC662IMX/NOPB Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 8-SOIC (0.154", 3.90mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Amplifier Type:
- CMOS
- Number of Circuits:
- 2
- Output Type:
- Push-Pull, Rail-to-Rail
- Slew Rate:
- 0.11V/µs
- Gain Bandwidth Product:
- 350 kHz
- -3db Bandwidth:
- -
- Current - Input Bias:
- 0.002 pA
- Voltage - Input Offset:
- 1 mV
- Current - Supply:
- 86µA (x2 Channels)
- Current - Output / Channel:
- 40 mA
- Voltage - Supply Span (Min):
- 4.75 V
- Voltage - Supply Span (Max):
- 15.5 V
- Operating Temperature:
- -40°C ~ 85°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-SOIC
LPC662IMX/NOPB FAQ
1.How can I place an order for LPC662IMX/NOPB through Aetrix?
Please submit a Request for Quotation (RFQ) for LPC662IMX/NOPB on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LPC662IMX/NOPB reliable?
The price and inventory of LPC662IMX/NOPB are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LPC662IMX/NOPB is usually 5 days.
3.What payment methods are accepted for LPC662IMX/NOPB?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LPC662IMX/NOPB transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LPC662IMX/NOPB?
LPC662IMX/NOPB orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LPC662IMX/NOPB order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LPC662IMX/NOPB?
For technical support, including LPC662IMX/NOPB datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LPC662IMX/NOPB requirements.
6.How does Aetrix verify that LPC662IMX/NOPB is sourced from the original manufacturer or authorized distributors?
All LPC662IMX/NOPB products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LPC662IMX/NOPB meets industry standards.
7.What is the process for return or replacement of LPC662IMX/NOPB?
All LPC662IMX/NOPB units undergo pre-shipment inspection (PSI). If there is an issue with LPC662IMX/NOPB, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LPC662IMX/NOPB part is unused and in its original packaging.
Return procedure for LPC662IMX/NOPB:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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