NXP Semiconductors LPC802M001JDH20J

Overview

LPC802M001JDH20J from NXP Semiconductors is a 32-bit ARM Cortex-M0+ microcontroller operating at up to 15 MHz, featuring 16 KB flash, 2 KB SRAM, a 12-bit ADC with 12-channel input, an analog comparator, and two USARTs - deployed in sensor gateways and portable industrial controls where low-power operation and flexible I/O routing are critical.

For engineers reviewing the LPC802M001JDH20J datasheet, LPC802M001JDH20J pinout, LPC802M001JDH20J application, or LPC802M001JDH20J equivalent, this page delivers verified package mapping (TSSOP20), confirmed 17 GPIO count, validated dual-voltage I/O exclusion, exact ADC sample rate (480 kS/s), and real-world wake-up timer behavior in deep-sleep mode - all essential for schematic validation and firmware bring-up.

Technical Context

The LPC802M001JDH20J implements a fixed-function ARM Cortex-M0+ core (r0p1) with single-cycle I/O port and nested vectored interrupt controller (NVIC), paired with a programmable switch matrix that dynamically routes movable peripherals-including USART, SPI, I2C, and timer match/capture signals-to any non-power GPIO pin. Its memory subsystem integrates 16 KB EEPROM-based flash with Code Read Protection and 2 KB SRAM, while the clock system relies on a ±1% trimmed Free Running Oscillator (FRO) at 9/12/15 MHz.

Power management includes four reduced-power modes (sleep, deep-sleep, power-down, deep power-down), with wake-up capability from deep-sleep via USART/SPI/I2C activity and from deep power-down via eight dedicated GPIO pins. The analog subsystem comprises a 12-bit ADC supporting two independent conversion sequences and an analog comparator with four inputs and selectable internal/external reference voltage.

Key Specifications

Pinout & Package

TSSOP20 package (SOT360-1), 20-pin plastic thin shrink small outline, 4.4 mm body width, thermal pad not present - compatible with standard reflow profiles and automated assembly.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar low-cost 32-bit microcontroller applications.

Compared with STM32G030F6P6 and EFM32HG322F64G, the LPC802M001JDH20J uniquely combines analog comparator integration, switch matrix I/O routing, and TSSOP20 packaging - enabling compact, cost-sensitive designs requiring mixed-signal autonomy and layout simplification without sacrificing ARM ecosystem compatibility.

Availability

LPC802M001JDH20J is available at Aetrix Electronics and suitable for industrial sensor gateways, portable climate control units, and fire & security panel nodes requiring stable component supply across extended production lifecycles.

Supply support for LPC802M001JDH20J includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

NXP Semiconductors is a global semiconductor leader specializing in secure connectivity solutions for automotive, industrial, and IoT markets, with over 40 years of embedded systems expertise.

The LPC800 series targets cost-sensitive, low-power 32-bit applications - designed to replace legacy 8/16-bit MCUs with ARM Cortex-M0+ efficiency, integrated analog peripherals, and flexible I/O architecture.

FAQ

What is the maximum operating frequency of the LPC802M001JDH20J?

The LPC802M001JDH20J operates at a maximum CPU frequency of 15 MHz using its internal Free Running Oscillator (FRO), which is factory-trimmed to ±1 % accuracy across 0 °C to 70 °C. This frequency is fixed and cannot be overclocked; higher-speed variants are not available in the LPC802 family. The LPC802M001JDH20J maintains deterministic timing for real-time tasks within this constraint.

Does the LPC802M001JDH20J support dual I/O voltage domains?

No, the LPC802M001JDH20J does not support dual I/O voltage domains. Only the LPC802M011JDH20 variant includes VDDIO for independent left-side I/O supply. The LPC802M001JDH20J uses a single VDD supply for all I/O pins and core logic, operating across 1.71 V–3.6 V. Its switch matrix provides level-shifting functionality only in software-configured signal routing, not hardware voltage domain separation.

How many ADC channels does the LPC802M001JDH20J support, and what is the maximum sample rate?

The LPC802M001JDH20J supports up to 12 ADC input channels (ADC_0 through ADC_11) with 12-bit resolution and a maximum sample rate of 480 kS/s. It allows two independent conversion sequences triggered by internal or external events. All ADC inputs are mapped to specific GPIO pins (e.g., PIO0_0, PIO0_1, PIO0_7), and analog mode disables digital I/O functionality on those pins.

Which pins on the LPC802M001JDH20J can wake the device from deep power-down mode?

Eight GPIO pins on the LPC802M001JDH20J support wake-up from deep power-down mode: PIO0_4, PIO0_8, PIO0_9, PIO0_10, PIO0_11, PIO0_13, PIO0_15, and PIO0_17. These pins must be externally pulled HIGH before entering deep power-down; a LOW-going pulse as short as 50 ns triggers wake-up. No other pins - including RESET - function in deep power-down mode.

Is the LPC802M001JDH20J pin-compatible with other LPC802 variants in TSSOP20 packaging?

Yes, the LPC802M001JDH20J shares identical pinout and package (TSSOP20, SOT360-1) with LPC802M011JDH20, but differs in dual-supply capability: LPC802M011JDH20 adds VDDIO on pin 3, while LPC802M001JDH20J leaves that pin as no-connect. All GPIO, peripheral, and power pin assignments match exactly - allowing direct substitution where dual-voltage I/O is not required.