NXP Semiconductors LPC802M011JDH20FP

Overview

LPC802M011JDH20FP from NXP Semiconductors is a 32-bit ARM Cortex-M0+ microcontroller operating at up to 15 MHz, featuring 16 KB flash, 2 KB SRAM, a 12-bit ADC with 12-channel input, an analog comparator, and dual I/O power supply (VDD/VDDIO) for level-shifting-designed for low-cost industrial sensor nodes and portable control systems.

For engineers reviewing the LPC802M011JDH20FP datasheet, LPC802M011JDH20FP pinout, LPC802M011JDH20FP application, or LPC802M011JDH20FP equivalent, key selection criteria include its TSSOP20 dual-supply pinout, switch-matrix configurable peripherals, 17 GPIOs (16 usable), wake-up capability from deep power-down on eight pins, and ROM-based ISP/IAP support via USART.

Technical Context

The LPC802M011JDH20FP implements an ARM Cortex-M0+ core (r0p1) with single-cycle I/O, NVIC, and SysTick timer, paired with a multilayer AHB matrix and APB peripheral bridge. Its clock system centers on a ±1% trimmed Free Running Oscillator (FRO) offering selectable 9/12/15 MHz outputs, plus a 1 MHz low-power oscillator.

Dual I/O voltage domains (VDD and VDDIO) enable hardware-level signal translation between off-chip voltage domains; the switch matrix routes up to two signals across domains using LVLSHFT_INx/LVLSHFT_OUTx functions. Peripheral routing-including USART0/1, SPI0, I2C0, CTIMER0 match/capture, and comparator output-is fully reassignable to non-power pins via software configuration.

Key Specifications

Pinout & Package

TSSOP20 package (SOT360-1), 20-pin plastic thin shrink small outline, 4.4 mm body width, with exposed thermal pad not present (non-HVQFN). Dual supply configuration includes dedicated VDDIO pin (Pin 2) for left-side I/O domain, VDD (Pin 15) for right-side I/O and core regulator, and VSS (Pin 16) as common ground.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar low-cost 32-bit microcontroller applications.

Compared with LPC802M001JDH20, the LPC802M011JDH20FP provides essential level-shifting capability for mixed-voltage systems; versus LPC804M011JDH20, it offers identical dual-supply functionality at lower memory cost-ideal for stable, resource-constrained designs.

Availability

LPC802M011JDH20FP is available at Aetrix Electronics and suitable for industrial sensor gateways, portable climate controllers, and gaming peripheral interfaces requiring stable component supply, long-term lifecycle assurance, and consistent dual-supply TSSOP20 packaging.

Supply support for LPC802M011JDH20FP includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

NXP Semiconductors is a global semiconductor leader focused on secure connectivity solutions for automotive, industrial, and IoT applications.

The LPC800 series targets cost-sensitive, low-power embedded control with ARM Cortex-M0+ cores, emphasizing flexible I/O, integrated analog, and simplified debug-designed for rapid prototyping and high-volume manufacturing.

FAQ

What is the maximum operating frequency of the LPC802M011JDH20FP?

The LPC802M011JDH20FP operates at a maximum CPU frequency of 15 MHz using its internal Free Running Oscillator (FRO), which is factory-trimmed to ±1% accuracy across 0°C to 70°C and full supply range. This frequency is fixed-not user-adjustable-and serves as the primary system clock source unless overridden by an external CLKIN signal.

Does the LPC802M011JDH20FP support in-system programming (ISP)?

Yes, the LPC802M011JDH20FP supports In-System Programming via its built-in ROM bootloader, accessible through USART0 or USART1. The device enters ISP mode when PIO0_12 is held LOW during reset. No external programmer is required-firmware updates can be performed in the field using standard UART communication and NXP's ISP tools.

How many GPIO pins are available on the LPC802M011JDH20FP in TSSOP20 package?

The LPC802M011JDH20FP provides 16 general-purpose I/O pins (PIO0_0 to PIO0_17, excluding VDD, VDDIO, VSS, RESET, and NC pins). Two pins (PIO0_16 and PIO0_17) are shared with ADC/ACMP functions but remain fully usable as GPIO when analog features are disabled via the switch matrix and IOCON registers.

What distinguishes the LPC802M011JDH20FP from the LPC802M001JDH20?

The LPC802M011JDH20FP includes a dedicated VDDIO pin enabling true dual I/O voltage domains-allowing level shifting between separate off-chip voltage rails-while the LPC802M001JDH20 uses a single VDD supply for all I/O. Both share identical flash, SRAM, peripherals, and TSSOP20 footprint, but only the M011 variant supports hardware-level signal translation.

Can the LPC802M011JDH20FP wake up from deep power-down mode using external interrupts?

Yes, the LPC802M011JDH20FP supports wake-up from deep power-down mode on eight specific GPIO pins (PIO0_4, PIO0_8, PIO0_9, PIO0_10, PIO0_11, PIO0_13, PIO0_15, PIO0_17). A LOW-going pulse as short as 50 ns on any of these pins exits deep power-down and resumes execution; no other pins or peripherals (including USART/SPI/I2C) can trigger wake-up in this mode.