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NXP Semiconductors LPC804M101JDH20FP

Part No.:
LPC804M101JDH20FP
Manufacturer:
NXP Semiconductors
Category:
Microcontrollers
Package:
20-TSSOP (0.173", 4.40mm Width)
Datasheet:
AetrixLPC804M101JDH20FP.pdf
Description:
IC MCU 32BIT 32KB FLASH 20TSSOP
Quantity:
Payment:
Payment
Shipping:
Shipping

Inventory:3,490

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Product details

Overview

LPC804M101JDH20FP from NXP Semiconductors is a 32-bit Arm Cortex-M0+ microcontroller operating at up to 15 MHz, featuring 32 KB flash, 4 KB SRAM, a 12-bit ADC (up to 480 kS/s), a 10-bit DAC, and a Capacitive Touch Interface - deployed in sensor gateways and portable wearables requiring compact, low-power control with analog sensing and human interface capability.

For engineers reviewing the LPC804M101JDH20FP datasheet, LPC804M101JDH20FP pinout, LPC804M101JDH20FP application, or LPC804M101JDH20FP equivalent, key selection criteria include its TSSOP20 package with 17 GPIOs, dual I²C/USART interfaces, switch-matrix–configured peripherals, and support for deep-sleep wake-up on USART/SPI/I²C activity - critical for battery-constrained edge nodes.

Technical Context

The LPC804M101JDH20FP integrates an Arm Cortex-M0+ core (r0p1) with single-cycle I/O and NVIC, coupled to a multilayer AHB matrix and APB-peripheral bridge. Its clock system centers on a ±1% trimmed Free Running Oscillator (9/12/15 MHz), supplemented by a 1 MHz low-power oscillator and programmable clock output divider.

Analog subsystem includes a 12-bit ADC with two independent sequences and 12-channel input mux, a 5-input analog comparator with internal/external reference, and a 10-bit DAC - all accessible via the flexible switch matrix. Digital logic extends to a Programmable Logic Unit (PLU) for small state machines and a pattern-match engine for GPIO-triggered interrupts.

Key Specifications

ParameterValue and Actual Design Meaning
CPU CoreArm Cortex-M0+, revision r0p1, 15 MHz max - enables deterministic real-time control with <1 µs interrupt latency.
Memory32 KB on-chip flash (EEPROM-based), 4 KB SRAM - supports in-application programming (IAP) and bootloader-driven ISP via USART.
Analog Peripherals12-bit ADC (480 kS/s, 12 inputs, dual sequences), 10-bit DAC, 5-input comparator - enables simultaneous sensor acquisition and analog feedback in compact systems.
Digital Interfaces2× I²C (400 kbit/s), 2× USART (fractional baud), 1× SPI - routed flexibly via switch matrix to any non-power pin.
Timers & Control32-bit CTIMER (4 match, 3 capture, PWM), 4-channel MRT, self-wake-up timer (WKT), windowed watchdog - provides precise timing, low-power scheduling, and safety monitoring.
Power & Packaging1.71–3.6 V supply, -40°C to +105°C operation, TSSOP20 (4.4 mm body) - suitable for industrial and portable environments with space-constrained PCB layouts.
GPIO & Logic17 configurable GPIOs (5 high-drive @ 20 mA), switch matrix, PLU, pattern-match engine - allows hardware-level signal routing and combinatorial logic without external components.

Pinout & Package

TSSOP20 package (SOT360-1), 4.4 mm body width, 0.65 mm pitch, thermally enhanced plastic shrink small-outline construction - optimized for automated assembly and moderate thermal dissipation in dense layouts.

Pin/TerminalCircuit RoleDesign Meaning
1 (PIO0_16/ADC_3/ACMP_I4)GPIO / ADC input / Comparator inputConfigurable as digital I/O, analog input channel 3, or comparator common input 4 - selected via switch matrix; default GPIO with pull-up.
2 (PIO0_14/ADC_2/ACMP_I3)GPIO / ADC input / Comparator inputMulti-function pin supporting ADC channel 2 or comparator input 3 - enables shared analog front-end resources across sensors.
3 (PIO0_17/ADC_9)GPIO / ADC inputDedicated ADC input channel 9; also functions as general-purpose I/O - used for auxiliary sensor or reference voltage sampling.
4 (PIO0_0/ACMP_I1/TDO)GPIO / Comparator input / JTAG test outputDefault GPIO with pull-up; serves as comparator input 1 or boundary-scan TDO - active only in JTAG mode.
5 (PIO0_13/ADC_10)GPIO / ADC inputADC input channel 10; also ISP entry pin - LOW during reset initiates in-system programming mode.
6 (VREFP)Analog reference voltagePositive reference for ADC and comparator - must be ≤ VDD; decoupling required for precision measurements.
7 (PIO0_12)GPIO / ISP entryISP enable pin - LOW at reset triggers bootloader; otherwise functions as standard GPIO with pull-up.
8 (PIO0_7/ADC_1/ACMPVREF)GPIO / ADC input / Comparator referenceProvides alternate reference voltage (ACMPVREF) for analog comparator - improves noise immunity in differential sensing.
9 (RESET/PIO0_5)Reset input / GPIOActive-low reset with 20 ns glitch filter; doubles as GPIO if external reset not needed - critical for system recovery and safe power sequencing.
10 (VSS)GroundPrimary digital ground reference - requires low-inductance connection to PCB ground plane for stable ADC/DAC operation.
11 (PIO0_4/ADC_11/TRST)GPIO / ADC input / JTAG test resetADC input 11 or JTAG TRST in boundary scan mode - supports debug access without dedicated debug header.
12 (VDD)Supply voltageCore and right-side I/O supply (1.71–3.6 V); powers flash, SRAM, CPU, and peripherals - requires local 100 nF ceramic decoupling.
13 (SWCLK/PIO0_3/TCK)Debug clock / GPIOSerial Wire Debug clock input - enabled by default; supports SWD programming and real-time debugging without JTAG overhead.
14 (PIO0_8/ADC_5)GPIO / ADC inputADC input channel 5; also U0_RXD in ISP mode for dual-supply variants - used for serial sensor data ingestion.
15 (SWDIO/PIO0_2/TMS)Debug I/O / GPIOSerial Wire Debug bidirectional data line - enables full debug visibility (breakpoints, watchpoints) using only two pins.
16 (PIO0_9/ADC_4)GPIO / ADC inputADC input channel 4; also U0_TXD in ISP mode - supports firmware updates over UART during field deployment.
17 (PIO0_11/ADC_6/WKTCLKIN)GPIO / ADC input / Wake-up timer clockExternal clock input for self-wake-up timer - enables precise low-power sleep intervals using off-chip crystal or RC oscillator.
18 (PIO0_1/ADC_0/ACMP_I2/CLKIN/TDI)GPIO / ADC input / Comparator input / Clock input / JTAG test dataMulti-role pin supporting ADC channel 0, comparator input 2, external clock source (CLKIN), or JTAG TDI - maximizes peripheral flexibility per pin.
19 (PIO0_10/ADC_7)GPIO / ADC inputADC input channel 7; also wake-up pin - triggers exit from deep power-down mode on falling edge ≥50 ns.
20 (PIO0_15/ADC_8)GPIO / ADC inputADC input channel 8; supports simultaneous sampling with other channels - used for multi-sensor correlation in environmental monitoring.

Key Features

FeatureDesign Value
Switch MatrixRoutes movable peripherals (I²C, USART, SPI, CTIMER, CAPT) to any non-power pin - eliminates fixed-pin constraints and reduces PCB layer count.
Programmable Logic Unit (PLU)Configurable combinatorial/sequential logic block - implements glue logic, state machines, or interrupt pre-processing without CPU intervention.
Capacitive Touch Interface (CAPT)Hardware-accelerated touch sensing on up to 5 X/Y electrodes - enables robust button/slider implementation with minimal firmware overhead.
Self-Wake-Up Timer (WKT)Independent timer clocked by FRO, low-power oscillator, or external source - wakes MCU from deep-sleep/power-down without CPU wake-up latency.
Pattern-Match EngineBoolean logic on 8 GPIO inputs triggers interrupt - detects complex button combinations or fault signatures before software polling.
High-Drive GPIOFive pins support 20 mA source current - directly drives LEDs, small relays, or logic-level MOSFETs without external drivers.

Applications

Sensor GatewayPortable Wearable

Use Scenario: Aggregating temperature, humidity, and motion data from multiple I²C/UART sensors in smart building nodes.

IC Role / Device Role / Timing Role: Central controller managing sensor polling, data preprocessing, and BLE/Wi-Fi module handoff via USART.

Use Value: Integrated 12-bit ADC and dual I²C interfaces eliminate external ADC and level shifters; switch matrix simplifies routing to diverse sensor footprints.

Use Scenario: Heart rate and gesture detection in fitness bands using capacitive touch and analog front-end signals.

IC Role / Device Role / Timing Role: Real-time sensor fusion hub with CAPT for UI interaction and ADC for photodiode signal conditioning.

Use Value: On-chip CAPT and 12-bit ADC reduce BOM cost and board area; deep-sleep wake-up on sensor activity extends battery life beyond 7 days.

Industrial Control PanelLighting Control System

Use Scenario: Local HMI for motor status display, emergency stop monitoring, and parameter adjustment in factory equipment.

IC Role / Device Role / Timing Role: Human interface processor handling push-button inputs, LED indicators, and RS-485 communication via USART.

Use Value: High-drive GPIOs drive indicator LEDs directly; PLU implements hardware debouncing and interlock logic for safety-critical inputs.

Use Scenario: DALI or 0–10 V dimming control in smart LED fixtures with ambient light and occupancy sensing.

IC Role / Device Role / Timing Role: Analog-digital hybrid controller acquiring photocell data, generating PWM for LED drivers, and communicating via I²C to master controller.

Use Value: 10-bit DAC provides precise analog dimming reference; 12-bit ADC measures ambient light with >80 dB SNR - no external signal conditioning required.

Equivalent & Alternatives

The following parts are listed as comparable options for similar microcontroller applications.

Alternative PartTechnical DifferenceApplication DifferenceSelection Advice
STM32G030F6P6Arm Cortex-M0+, 64 MHz max, 32 KB flash, 8 KB SRAM, no DAC or CAPT, 12-bit ADC (1.0 MSPS), TSSOP20Lacks capacitive touch and DAC; higher CPU speed but no analog comparator or PLUSelect when higher processing throughput is needed and analog features are handled externally.
RP2040Dual-core Arm Cortex-M0+, 133 MHz, 264 KB SRAM, no flash, USB host/device, PIO state machines, QFN40No integrated flash or DAC; requires external flash; superior programmable I/O but larger footprint and no analog comparatorChoose for USB-connected devices needing high-speed PIO logic or dual-core parallelism, accepting external memory and layout complexity.

Compared with STM32G030F6P6 and RP2040, the LPC804M101JDH20FP delivers integrated analog sensing (ADC+DAC+comparator), capacitive touch, and PLU logic in a compact TSSOP20 package - making it optimal for cost-sensitive, analog-rich embedded nodes where external components must be minimized.

Availability

LPC804M101JDH20FP is available at Aetrix Electronics and suitable for sensor gateways, portable wearables, and industrial control panels requiring stable component supply, long-term lifecycle support, and RoHS-compliant manufacturing.

Supply support for LPC804M101JDH20FP includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

NXP Semiconductors is a global semiconductor leader specializing in secure connectivity solutions for automotive, industrial, and IoT applications.

The LPC800 series targets cost-optimized, low-power 32-bit control with integrated analog peripherals and flexible I/O - designed for replacing 8/16-bit MCUs in resource-constrained edge devices.

FAQ

What is the maximum operating frequency of the LPC804M101JDH20FP?

The LPC804M101JDH20FP operates at a maximum CPU frequency of 15 MHz, derived from its internally trimmed Free Running Oscillator (FRO) with selectable 9 MHz, 12 MHz, or 15 MHz outputs. This frequency is guaranteed across the full industrial temperature range (-40°C to +105°C) and supply voltage (1.71–3.6 V), with ±1% accuracy over voltage and temperature - enabling deterministic real-time execution without external crystal dependency.

Does the LPC804M101JDH20FP include a DAC, and what is its resolution?

Yes, the LPC804M101JDH20FP includes a 10-bit DAC with one output channel (DACOUT on PIO0_19). While the DAC is present in the LPC804 family, the LPC804M101JDH20FP variant - packaged in TSSOP20 - does not expose the DACOUT pin; this function is only available on TSSOP24 and HVQFN33 packages. Therefore, the DAC is not usable on the LPC804M101JDH20FP in its current pinout configuration.

How many GPIO pins are available on the LPC804M101JDH20FP in the TSSOP20 package?

The LPC804M101JDH20FP in TSSOP20 package provides 17 general-purpose I/O pins (PIO0_0 through PIO0_17, excluding power/ground pins). All 17 support configurable pull-up/pull-down, open-drain mode, input inversion, and glitch filtering. Five of these (PIO0_2, PIO0_3, PIO0_12, PIO0_18, PIO0_20) offer high-current drive capability (20 mA source), and eight (PIO0_4, PIO0_8, PIO0_9, PIO0_10, PIO0_11, PIO0_13, PIO0_15, PIO0_17) can trigger wake-up from deep power-down mode.

Can the LPC804M101JDH20FP support in-system programming (ISP)?

Yes, the LPC804M101JDH20FP supports in-system programming (ISP) via its USART interface using the on-chip ROM bootloader. Entry into ISP mode is triggered by holding PIO0_12 LOW during reset. The device accepts firmware updates over UART without requiring a debugger, enabling field upgrades and manufacturing programming - a capability confirmed in the official NXP LPC804 user manual and datasheet Rev. 2.1.

What analog peripherals are functional on the LPC804M101JDH20FP TSSOP20 variant?

The LPC804M101JDH20FP TSSOP20 variant supports a full 12-bit ADC with up to 12 input channels (ADC_0 through ADC_11), a 5-input analog comparator (ACMP_I1 through ACMP_I5), and VREFP reference input - all accessible via dedicated pins in the TSSOP20 pinout. However, the 10-bit DAC (DACOUT) and ACMP_I5 are not routed to pins in this package; ACMP_I5 appears only on TSSOP24/HVQFN33 variants, and DACOUT is unavailable in TSSOP20.

LPC804M101JDH20FP Specifications

Product attributes
Attribute value
Manufacturer:
NXP Semiconductors
Package/Case:
20-TSSOP (0.173", 4.40mm Width)
Series:
LPC80xM
Packaging:
Tube
Product Status:
Active
Programmable:
Not Verified
Core Processor:
ARM® Cortex®-M0+
Core Size:
32-Bit Single-Core
Speed:
15MHz
Connectivity:
I2C, SPI, UART/USART
Peripherals:
Brown-out Detect/Reset, POR, PWM, WDT
Number of I/O:
17
Program Memory Size:
32KB (32K x 8)
Program Memory Type:
FLASH
EEPROM Size:
-
RAM Size:
4K x 8
Voltage - Supply (Vcc/Vdd):
1.71V ~ 3.6V
Data Converters:
A/D 12x12b
Oscillator Type:
Internal
Operating Temperature:
-40°C ~ 105°C (TA)
Grade:
-
Qualification:
-
Mounting Type:
Surface Mount
Supplier Device Package:

LPC804M101JDH20FP FAQ

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The price and inventory of LPC804M101JDH20FP are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LPC804M101JDH20FP is usually 5 days.

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Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for LPC804M101JDH20FP?

For technical support, including LPC804M101JDH20FP datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LPC804M101JDH20FP requirements.

6.How does Aetrix verify that LPC804M101JDH20FP is sourced from the original manufacturer or authorized distributors?

All LPC804M101JDH20FP products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LPC804M101JDH20FP meets industry standards.

7.What is the process for return or replacement of LPC804M101JDH20FP?

All LPC804M101JDH20FP units undergo pre-shipment inspection (PSI). If there is an issue with LPC804M101JDH20FP, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The LPC804M101JDH20FP part is unused and in its original packaging.

Return procedure for LPC804M101JDH20FP:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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