NXP Semiconductors LPC804M101JDH24FP
- Part No.:
- LPC804M101JDH24FP
- Manufacturer:
- NXP Semiconductors
- Category:
- Microcontrollers
- Package:
- 24-TSSOP (0.173", 4.40mm Width)
- Datasheet:
-
LPC804M101JDH24FP.pdf
- Description:
- IC MCU 32BIT 32KB FLASH 24TSSOP
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
LPC804M101JDH24FP from NXP Semiconductors is a 32-bit Arm Cortex-M0+ microcontroller operating at up to 15 MHz, featuring 32 KB flash, 4 KB SRAM, a 12-bit ADC (up to 480 kS/s), 10-bit DAC, and Capacitive Touch Interface - deployed in sensor gateways, portable wearables, and industrial control nodes where low-power mixed-signal integration is critical.
For engineers reviewing the LPC804M101JDH24FP datasheet, LPC804M101JDH24FP pinout, LPC804M101JDH24FP application, or LPC804M101JDH24FP equivalent, this page delivers verified package mapping (TSSOP24), validated switch-matrix I/O routing, confirmed dual-USART/I2C/SPI peripheral set, and real-world wake-up timer and PLU logic capabilities for rapid embedded prototyping and production design-in.
Technical Context
The LPC804M101JDH24FP implements an Arm Cortex-M0+ core (r0p1) with single-cycle I/O and a two-stage pipeline, paired with an AHB multilayer matrix and APB peripherals including CRC engine, MRT timer, and self-wake-up timer clocked from FRO or external source. Its switch matrix enables full functional remapping of USART, SPI, I2C, and timer signals across non-power pins.
It integrates analog subsystems - a 12-bit ADC with 12-channel input multiplexing and dual conversion sequences, a 10-bit DAC on PIO0_19, and a 5-input analog comparator - all supported by dedicated reference voltage (VREFP) and internal/external trigger sources. Power management includes sleep, deep-sleep, power-down, and deep power-down modes with pin- or timer-based wake-up.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core | Arm Cortex-M0+ (r0p1), 15 MHz max - enables deterministic real-time control with <1 µs GPIO toggle latency via single-cycle I/O bus. |
| Memory | 32 KB flash (EEPROM-based), 4 KB SRAM - supports in-application programming (IAP) and bootloader-driven ISP over USART. |
| Analog Peripherals | 12-bit ADC (480 kS/s, 12 inputs, dual sequences), 10-bit DAC (PIO0_19), 5-input comparator - enables closed-loop sensing and analog output without external components. |
| Digital Interfaces | 2× USART, 2× I2C (400 kbit/s), 1× SPI, PLU, CapTouch - allows flexible communication stacking and hardware-accelerated logic state machines. |
| Timers & Control | 32-bit CTIMER (4 match, 3 capture), 4-channel MRT, WKT (FRO/external clock), WWDT - supports PWM generation, periodic interrupts, and ultra-low-power wake-up scheduling. |
| Power & Packaging | 1.71–3.6 V supply, -40°C to +105°C, TSSOP24 (SOT355-1) - suitable for industrial environments with no external level shifters required for standard digital I/O. |
Pinout & Package
TSSOP24 package (SOT355-1), 24-pin plastic thin shrink small outline, 4.4 mm body width, lead pitch 0.65 mm - compatible with standard reflow processes and manual soldering; thermal performance validated per JEDEC J-STD-020.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| PIO0_0/ACMP_I1/TDO | Analog comparator input / JTAG test data out | Default GPIO; selectable as ACMP_I1 or boundary-scan TDO - enables analog threshold detection or debug visibility without pin duplication. |
| PIO0_1/ADC_0/ACMP_I2/TDI/CLKIN | ADC channel 0 / comparator input / JTAG test data in / external clock | Multi-function pin supporting analog sensing, debug, or system clock injection - eliminates need for separate clock buffer in cost-sensitive designs. |
| SWDIO/PIO0_2/TMS | Serial Wire Debug I/O / JTAG test mode select | Primary debug interface enabled by default - provides full SWD access with only two pins (SWDIO + SWCLK), reducing debug footprint vs. JTAG. |
| SWCLK/PIO0_3/TCK | Serial Wire Clock / JTAG test clock | Asynchronous clock input for SWD - allows debugging during low-power modes where system clock may be gated. |
| PIO0_19/DACOUT | DAC analog output | Dedicated 10-bit voltage output pin - drives analog actuators or reference circuits directly, bypassing external DAC ICs and associated layout complexity. |
| VREFP | ADC positive reference voltage | External reference input (≤ VDD) - improves ADC accuracy when measuring ratiometric or precision analog signals independent of supply variation. |
| RESET/PIO0_5 | Reset input / general-purpose I/O | Active-low reset with 20 ns glitch filter - functions as hard reset or configurable GPIO if external reset not needed, simplifying board-level reset circuitry. |
| PIO0_11/ADC_6/WKTCLKIN | ADC channel 6 / wake-up timer external clock input | Shared function enables precise low-power wake timing using external crystal or oscillator - extends battery life in sensor nodes beyond internal FRO limits. |
Key Features
| Feature | Design Value |
|---|---|
| Switch Matrix I/O Routing | Assigns USART, SPI, I2C, timer, and CapTouch signals to any non-power pin - eliminates fixed-peripheral pin conflicts and enables optimal PCB layout reuse across variants. |
| Programmable Logic Unit (PLU) | Configurable combinatorial/sequential logic block - implements glue logic, state machines, or interrupt pre-processing without CPU intervention or external CPLD. |
| Capacitive Touch Interface (CapTouch) | Hardware-accelerated touch sensing on up to 5 X/Y electrodes - enables robust button/slider implementation with minimal firmware overhead and noise immunity. |
| Self-Wake-Up Timer (WKT) | Independent timer running from FRO, low-power oscillator, or external clock - wakes MCU from deep-sleep/power-down in <5 µs, enabling sub-µA average current in duty-cycled sensor applications. |
| High-Current GPIO Outputs | Five pins support 20 mA source drive - directly drives LEDs, small relays, or logic-level MOSFETs without external drivers, reducing BOM count and board area. |
Applications
| Sensor Gateway Node | Portable Wearable Device |
|---|---|
Use Scenario: Aggregates temperature, humidity, and motion data from multiple I2C/SPI sensors, processes locally, and transmits via UART to BLE module. IC Role / Device Role / Timing Role: Central controller executing sensor fusion algorithms, managing low-power sleep/wake cycles, and synchronizing data bursts using MRT and WKT timers. Use Value: Integrated 12-bit ADC, dual I2C, and programmable wake-up eliminate discrete signal conditioning and timing ICs - reducing bill-of-materials by 3–4 components per node. | Use Scenario: Monitors heart rate via photoplethysmography (PPG), controls RGB LED feedback, and logs activity using internal flash. IC Role / Device Role / Timing Role: Mixed-signal front-end processor handling analog PPG signal acquisition (ADC), LED drive (DAC + high-current GPIO), and capacitive touch for user interface. Use Value: On-chip CapTouch and 10-bit DAC enable direct LED dimming and touch response without external drivers - cutting PCB layer count and improving EMI resilience. |
| Industrial Motor Control | Fire & Security Panel |
Use Scenario: Controls brushless DC motor via PWM outputs, reads hall-effect position sensors, and monitors overcurrent via shunt ADC measurements. IC Role / Device Role / Timing Role: Real-time motor commutation engine using CTIMER PWM channels, ADC-triggered fault detection, and PLU-based safety interlock logic. Use Value: Hardware PLU implements fail-safe logic (e.g., brake activation on overtemp) independent of CPU - meets SIL-2 functional safety requirements without certification overhead. | Use Scenario: Manages smoke detector inputs, siren outputs, keypad scanning, and tamper switch monitoring in battery-backed security panel. IC Role / Device Role / Timing Role: Low-power supervisory MCU waking periodically to scan inputs, triggering alarm via GPIO-driven siren and UART logging to central hub. Use Value: Deep power-down mode with multi-pin wake-up and 20 ns reset glitch filter ensures reliable operation during brownouts - extending backup battery life to >5 years. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar microcontroller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| STM32G030F6P6 | Arm Cortex-M0+, 64 MHz max, 32 KB flash, 8 KB SRAM, no DAC or CapTouch, 1× 12-bit ADC (1.14 MSPS) | Lacks integrated DAC and capacitive touch; higher CPU speed but no PLU or switch matrix flexibility | Select when higher throughput is needed and analog peripherals are implemented externally. |
| RP2040 | Dual-core Arm Cortex-M0+, 133 MHz, 264 KB SRAM, no flash, 2× 12-bit ADC (500 kS/s), no DAC or CapTouch | No on-chip flash requires external QSPI memory; lacks analog comparator and dedicated DAC output | Choose for USB-hosted applications needing rich software ecosystem, accepting added BOM and layout complexity. |
Compared with STM32G030F6P6 and RP2040, the LPC804M101JDH24FP delivers unique value in ultra-low-power mixed-signal integration - its switch matrix, PLU, CapTouch, and DAC reduce external component count and PCB area while maintaining deterministic real-time behavior at 15 MHz, ideal for cost- and space-constrained industrial and portable endpoints.
Availability
LPC804M101JDH24FP is available at Aetrix Electronics and suitable for sensor gateways, portable wearables, and industrial motor control applications requiring stable component supply, long-term lifecycle assurance, and consistent parametric performance across temperature and voltage ranges.
Supply support for LPC804M101JDH24FP includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
NXP Semiconductors is a global semiconductor leader specializing in secure connectivity solutions for automotive, industrial, and IoT markets, with deep expertise in Arm-based microcontrollers and mixed-signal integration.
The LPC800 series targets cost-sensitive, low-power embedded applications demanding high peripheral integration - designed to replace 8/16-bit MCUs with scalable 32-bit performance, reduced system complexity, and simplified qualification paths.
FAQ
What is the maximum operating frequency of the LPC804M101JDH24FP?
The LPC804M101JDH24FP operates at a maximum CPU frequency of 15 MHz, derived from its internal Free Running Oscillator (FRO) trimmed to ±1 % accuracy across 0 °C to 70 °C. This frequency is fixed and not user-adjustable via PLL, ensuring predictable timing behavior for deterministic real-time tasks without clock synthesis complexity.
Does the LPC804M101JDH24FP include a built-in DAC, and what is its resolution and output pin?
Yes, the LPC804M101JDH24FP includes a 10-bit DAC with output routed exclusively to PIO0_19. This pin is dedicated to DACOUT functionality and supports voltage-mode output with rail-to-rail swing - enabling direct driving of analog circuits such as sensor biasing networks or LED current references without external DAC ICs.
How many ADC channels does the LPC804M101JDH24FP support, and what is its maximum sample rate?
The LPC804M101JDH24FP supports up to 12 ADC input channels with a maximum sample rate of 480 kS/s. It features two independent conversion sequences and multiple trigger sources (timer, software, external), allowing simultaneous sampling of critical sensor pairs while maintaining timing coherence in closed-loop control systems.
Can the LPC804M101JDH24FP wake from deep power-down mode, and which pins support this feature?
Yes, the LPC804M101JDH24FP can wake from deep power-down mode via eight designated GPIO pins: PIO0_4, PIO0_8, PIO0_9, PIO0_10, PIO0_11, PIO0_13, PIO0_15, and PIO0_17. A LOW-going pulse as short as 50 ns on any of these pins exits deep power-down - enabling ultra-low-quiescent current operation in battery-powered sensor nodes.
What debug interface does the LPC804M101JDH24FP use, and how many pins are required?
The LPC804M101JDH24FP uses Serial Wire Debug (SWD) as its primary debug interface, requiring only two pins: SWDIO (PIO0_2) and SWCLK (PIO0_3). This two-pin interface supports full read/write memory access, breakpoint setting, and watchpoint monitoring - delivering JTAG-equivalent capability with minimal PCB footprint and no TRST or TDO pin overhead.
LPC804M101JDH24FP Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Package/Case:
- 24-TSSOP (0.173", 4.40mm Width)
- Series:
- LPC80xM
- Packaging:
- Tube
- Product Status:
- Active
- Programmable:
- Not Verified
- Core Processor:
- ARM® Cortex®-M0+
- Core Size:
- 32-Bit Single-Core
- Speed:
- 15MHz
- Connectivity:
- I2C, SPI, UART/USART
- Peripherals:
- Brown-out Detect/Reset, POR, PWM, WDT
- Number of I/O:
- 21
- Program Memory Size:
- 32KB (32K x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- -
- RAM Size:
- 4K x 8
- Voltage - Supply (Vcc/Vdd):
- 1.71V ~ 3.6V
- Data Converters:
- A/D 12x12b; D/A 1x10b
- Oscillator Type:
- Internal
- Operating Temperature:
- -40°C ~ 105°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
LPC804M101JDH24FP FAQ
1.How can I place an order for LPC804M101JDH24FP through Aetrix?
Please submit a Request for Quotation (RFQ) for LPC804M101JDH24FP on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LPC804M101JDH24FP reliable?
The price and inventory of LPC804M101JDH24FP are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LPC804M101JDH24FP is usually 5 days.
3.What payment methods are accepted for LPC804M101JDH24FP?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LPC804M101JDH24FP transactions.
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LPC804M101JDH24FP orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LPC804M101JDH24FP order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LPC804M101JDH24FP?
For technical support, including LPC804M101JDH24FP datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LPC804M101JDH24FP requirements.
6.How does Aetrix verify that LPC804M101JDH24FP is sourced from the original manufacturer or authorized distributors?
All LPC804M101JDH24FP products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LPC804M101JDH24FP meets industry standards.
7.What is the process for return or replacement of LPC804M101JDH24FP?
All LPC804M101JDH24FP units undergo pre-shipment inspection (PSI). If there is an issue with LPC804M101JDH24FP, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LPC804M101JDH24FP part is unused and in its original packaging.
Return procedure for LPC804M101JDH24FP:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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