NXP Semiconductors LPC804M111JDH24FP

Overview

LPC804M111JDH24FP from NXP Semiconductors is a 32-bit Arm Cortex-M0+ microcontroller operating at up to 15 MHz, featuring 32 KB flash, 4 KB SRAM, a 12-bit ADC (480 kS/s), 10-bit DAC, and dual I/O power supply for level-shifting-designed for sensor gateways and portable industrial control.

For engineers reviewing the LPC804M111JDH24FP datasheet, LPC804M111JDH24FP pinout, LPC804M111JDH24FP application, or LPC804M111JDH24FP equivalent, key selection factors include its TSSOP24 package with VDDIO support, programmable logic unit (PLU), capacitive touch interface, and wake-up capability from deep power-down on multiple GPIO pins.

Technical Context

The LPC804M111JDH24FP integrates an Arm Cortex-M0+ core (r0p1) with single-cycle I/O and NVIC, coupled to a multilayer AHB matrix and APB peripherals. Its clock system centers on a ±1% trimmed Free Running Oscillator (FRO) at 9/12/15 MHz, plus a 1 MHz low-power oscillator and clock output divider.

Dual I/O power architecture enables independent voltage domains on left/right sides of the TSSOP24 package, with switch-matrix–enabled level shifting between two selected signals. The PLU implements small combinatorial or sequential logic, while the pattern-match engine supports boolean-triggered GPIO interrupts across eight inputs.

Key Specifications

Pinout & Package

TSSOP24 package (SOT355-1), 4.4 mm body width, with exposed thermal pad not present - compatible with standard reflow processes and manual inspection. Dual-supply variant includes dedicated VDDIO pin (Pin 3) for left-side I/O domain level shifting.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar microcontroller applications.

Compared with LPC804M101JDH24 and LPC802M011JDH20, the LPC804M111JDH24FP uniquely delivers dual I/O supply, full peripheral complement, and TSSOP24 pin count - making it the only option among the three that supports native level shifting and advanced mixed-signal integration in a 24-lead package.

Availability

LPC804M111JDH24FP is available at Aetrix Electronics and suitable for sensor gateways, portable industrial controllers, and fire & security applications requiring stable component supply, long-term lifecycle assurance, and traceable sourcing.

Supply support for LPC804M111JDH24FP includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

NXP Semiconductors is a global semiconductor leader focused on secure connectivity solutions for automotive, industrial, and IoT markets, with deep expertise in Arm-based microcontrollers and edge processing.

The LPC800 series targets cost-sensitive, space-constrained embedded applications requiring rich analog/mixed-signal integration, low-power operation, and software compatibility across NXP's Cortex-M portfolio.

FAQ

What is the maximum operating frequency of the LPC804M111JDH24FP?

The LPC804M111JDH24FP operates at a maximum CPU frequency of 15 MHz, delivered by its Arm Cortex-M0+ core with a two-stage pipeline and single-cycle multiplier. This frequency is sustained using the internal ±1% trimmed Free Running Oscillator (FRO) at 15 MHz, which remains stable across the full industrial temperature range (-40°C to +105°C) and supply voltage (1.71 V to 3.6 V).

Does the LPC804M111JDH24FP support in-system programming (ISP)?

Yes, the LPC804M111JDH24FP supports In-System Programming (ISP) through its USART interface, enabled by the on-chip ROM bootloader. This allows firmware updates without a debugger or external programmer-simply assert the correct pin states during reset and send commands via UART. The bootloader also supports Flash In-Application Programming (IAP) for runtime updates.

How many GPIO pins does the LPC804M111JDH24FP have, and what special drive capabilities do they offer?

The LPC804M111JDH24FP provides 20 general-purpose I/O pins in its TSSOP24 package. Five of these-PIO0_2, PIO0_3, PIO0_12, PIO0_18, and PIO0_20-support high-current source output (20 mA). All GPIOs feature configurable pull-up/pull-down, programmable open-drain mode, input invert, and glitch filtering-enabling robust interfacing in noisy industrial environments.

What distinguishes the LPC804M111JDH24FP from other LPC804 variants like the LPC804M101JDH24?

The LPC804M111JDH24FP is distinguished by its dual I/O power architecture, implemented via the dedicated VDDIO pin (Pin 3) on the TSSOP24 package. This enables independent voltage domains for left-side I/O pins, allowing native level shifting-unavailable in the single-supply LPC804M101JDH24. Both share identical flash, SRAM, and peripheral sets, but only the M111 variant supports mixed-voltage interfacing without external components.

Can the LPC804M111JDH24FP wake up from deep power-down mode, and which pins support this?

Yes, the LPC804M111JDH24FP can wake up from deep power-down mode via eight designated GPIO pins: PIO0_4, PIO0_8, PIO0_9, PIO0_10, PIO0_11, PIO0_13, PIO0_15, and PIO0_17. A LOW-going pulse as short as 50 ns on any of these pins exits deep power-down and initiates wake-up sequencing. These pins must retain their GPIO function-movable peripheral assignments disable wake-up capability.