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NXP Semiconductors LPC804M111JDH24J
- Part No.:
- LPC804M111JDH24J
- Manufacturer:
- NXP Semiconductors
- Category:
- Microcontrollers
- Package:
- 24-TSSOP (0.173", 4.40mm Width)
- Datasheet:
-
LPC804M111JDH24J.pdf
- Description:
- IC MCU 32BIT 32KB FLASH 24TSSOP
- Quantity:
- Payment:
- Shipping:
Inventory:2,500
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Product details
Overview
LPC804M111JDH24J from NXP Semiconductors is a 32-bit Arm Cortex-M0+ microcontroller operating at up to 15 MHz, featuring 32 KB flash, 4 KB SRAM, a 12-bit ADC (480 kS/s), 10-bit DAC, and dual I/O power supply for level-shifting-designed for sensor gateways and portable industrial control systems.
For engineers reviewing the LPC804M111JDH24J datasheet, LPC804M111JDH24J pinout, LPC804M111JDH24J application, or LPC804M111JDH24J equivalent, this page delivers verified package mapping (TSSOP24), validated dual-supply I/O architecture, confirmed PLU/CapTouch/ADC/DAC peripheral integration, and real-world wake-up timer and switch matrix configuration details.
Technical Context
The LPC804M111JDH24J implements an Arm Cortex-M0+ r0p1 core with two-stage pipeline, single-cycle I/O port, and integrated NVIC supporting 32 vectored interrupts and four priority levels. Its AHB multilayer matrix enables concurrent peripheral access without bus contention.
It integrates a programmable switch matrix enabling dynamic routing of USART, SPI, I2C, timer match/capture, CapTouch, and level-shift signals across 20 GPIO pins-while retaining fixed functions for SWD, reset, VREFP, and dual-supply domain separation via dedicated VDD/VDDIO rails.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core | Arm Cortex-M0+ r0p1, 15 MHz max - enables deterministic real-time response with <1 µs interrupt latency and single-cycle GPIO bit manipulation. |
| Memory | 32 KB on-chip flash (EEPROM-based), 4 KB SRAM - supports in-application programming (IAP) and bootloader-driven ISP via USART. |
| Analog Peripherals | 12-bit ADC (12-channel, 480 kS/s), 10-bit DAC, analog comparator (5 inputs), VREFP reference - enables precision sensor signal acquisition and analog output control in compact systems. |
| Digital Peripherals | 2× USART, 2× I2C (400 kbit/s), 1× SPI, CRC engine, PLU, CapTouch interface, MRT, WKT, WWDT - provides flexible serial connectivity and hardware-accelerated logic/state-machine offload. |
| Power Architecture | Dual I/O supply (VDD/VDDIO), 1.71–3.6 V operation, -40 °C to +105 °C range - allows level-shifting between voltage domains and robust deployment in industrial environments. |
| Debug & Boot | Serial Wire Debug (SWD) with 4 breakpoints/2 watchpoints, ROM-based boot loader, integer divide/FRO APIs - simplifies firmware development and field updates without external debug hardware. |
Pinout & Package
TSSOP24 package (SOT355-1), 24-pin plastic thin shrink small outline, 4.4 mm body width, exposed thermal pad not present. Dual-supply variant with separate VDD (right-side I/O/core) and VDDIO (left-side I/O) pins enabling bidirectional level shifting.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24 | GPIO / Peripheral Multiplex | All pins support configurable pull-up/down, open-drain, input inversion, and glitch filtering; PIO0_0–PIO0_21 mapped to specific analog/digital functions per datasheet Table 4. |
| VDD (Pin 18) | Core & Right-Side I/O Supply | Provides regulated 1.71–3.6 V to CPU, memory, and right-side GPIOs (Pins 13–24); powers SWD, reset, ADC reference, and internal regulators. |
| VDDIO (Pin 3) | Left-Side I/O Supply | Independent 1.71–3.6 V rail for left-side GPIOs (Pins 1–12); enables level translation between VDD and VDDIO domains using LVLSHFT_IN/OUT signals routed via switch matrix. |
| VSS (Pin 16) | Ground Reference | Common return path for all analog/digital circuitry; must be low-impedance connection to maintain ADC/DAC accuracy and noise immunity. |
| VREFP (Pin 21) | ADC Positive Reference | Analog reference input for 12-bit ADC; must be ≤ VDD and stable-typically tied to filtered VDD or external precision reference. |
| RESET/PIO0_5 (Pin 6) | Reset Input / GPIO | Active-low asynchronous reset (50 ns pulse minimum); defaults to GPIO if external reset not used-supports ISP entry when held low during power-on. |
| SWDIO/PIO0_2 (Pin 9), SWCLK/PIO0_3 (Pin 8) | Debug Interface | Default Serial Wire Debug I/O and clock; enabled at reset; supports full debug visibility, flash programming, and real-time register inspection without JTAG pins. |
| PIO0_19/DACOUT (Pin 24) | Analog Output | 10-bit DAC voltage output (0–VDD range); requires external buffer for driving loads >100 µA; usable as programmable bias or control voltage source. |
Key Features
| Feature | Design Value |
|---|---|
| Programmable Logic Unit (PLU) | Hardware-configurable combinatorial/sequential logic block supporting small state machines-replaces discrete glue logic and reduces BOM count in sensor preprocessing or protocol bridging. |
| Capacitive Touch Interface (CapTouch) | Dedicated hardware for up to 5 touch channels with built-in charge-transfer measurement-enables robust button/slider sensing without external RC networks or firmware polling overhead. |
| Switch Matrix | Dynamic peripheral-to-pin routing engine allowing any movable function (USART, SPI, I2C, timer, CapTouch, level shift) to be assigned to non-power pins-maximizes PCB layout flexibility and simplifies pin-constrained designs. |
| Dual I/O Power Domain | Separate VDDIO rail (Pin 3) enables direct interfacing with peripherals operating at different voltages (e.g., 1.8 V sensors, 3.3 V displays)-eliminates need for external level shifters in mixed-voltage systems. |
| Self-Wake-Up Timer (WKT) | Low-power timer clocked by FRO (9/12/15 MHz), LPO (1 MHz), or external clock (Pin 10)-wakes device from deep-sleep/power-down modes with sub-millisecond latency and no host CPU involvement. |
Applications
| Sensor Gateway | Portable Industrial Controller |
|---|---|
|
Use Scenario: Aggregating temperature, humidity, and motion data from multiple analog/digital sensors in battery-powered edge nodes. IC Role / Device Role / Timing Role: Central MCU managing ADC sampling, CapTouch HMI, UART-to-LoRaWAN bridging, and ultra-low-power sleep/wake cycles. Use Value: Integrated 12-bit ADC (480 kS/s), dual-supply I/O, and WKT enable precise multi-sensor acquisition and 10-year battery life via deep power-down mode with pin-triggered wake-up. |
Use Scenario: Handheld diagnostic tool for HVAC and lighting systems requiring tactile feedback, analog monitoring, and USB/UART communication. IC Role / Device Role / Timing Role: Main controller executing real-time PID loops, driving DAC-based actuator references, and rendering CapTouch UI with PLU-assisted debouncing. Use Value: On-chip 10-bit DAC, PLU logic for contact bounce suppression, and switch matrix allow compact PCB design with minimal external components while maintaining responsive user interface. |
| Fire & Security Panel | Climate Control Node |
|
Use Scenario: Monitoring smoke detector analog outputs, door contact switches, and siren drivers in UL-certified alarm panels. IC Role / Device Role / Timing Role: Safety-critical controller performing periodic self-test, analog threshold detection, watchdog supervision, and fail-safe output shutdown. Use Value: Windowed Watchdog Timer (WWDT), Brownout Detect (BOD), and independent VDD/VDDIO rails ensure reliable operation during supply transients and prevent false alarms due to voltage droop. |
Use Scenario: Embedded thermostat managing NTC thermistor readings, relay control, display backlight, and wireless mesh networking. IC Role / Device Role / Timing Role: System-on-chip handling analog sensor conditioning, PWM fan control, CapTouch UI, and low-power BLE coexistence via USART/SPI isolation. Use Value: Integrated 12-bit ADC with internal reference, high-current GPIO (20 mA) for direct relay drive, and dual I/O supply simplify compliance with EN 60730 Class B requirements. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar microcontroller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| LPC804M101JDH24 | No VDDIO pin; single-supply only (VDD powers all I/O); 21 GPIOs vs. 20 on LPC804M111JDH24J. | Not suitable for mixed-voltage interfacing; requires external level shifters when connecting to 1.8 V sensors or 5 V actuators. | Select LPC804M101JDH24 only when system uses uniform 3.3 V peripherals and board space is constrained-no dual-supply capability required. |
| LPC802M011JDH20 | 20-pin TSSOP, 16 KB flash, 2 KB SRAM, no DAC, no CapTouch, no PLU, 16 GPIOs. | Limited analog and logic resources; insufficient for DAC-driven actuation or multi-touch UI in compact form factor. | Choose LPC802M011JDH20 for cost-sensitive, low-complexity control tasks where DAC, CapTouch, and PLU are unnecessary-e.g., simple relay sequencers. |
Compared with LPC804M101JDH24 and LPC802M011JDH20, the LPC804M111JDH24J uniquely delivers dual I/O supply, integrated DAC, CapTouch, and PLU in a 24-pin TSSOP-making it the only option among these three for self-contained mixed-voltage sensor node designs requiring analog output and touch interface without external ICs.
Availability
LPC804M111JDH24J is available at Aetrix Electronics and suitable for sensor gateways, portable industrial controllers, and fire & security applications requiring stable component supply, long-term lifecycle assurance, and automotive-grade temperature resilience (-40 °C to +105 °C).
Supply support for LPC804M111JDH24J includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
NXP Semiconductors is a global semiconductor leader specializing in secure connectivity solutions for automotive, industrial, and IoT markets, with over 50 years of embedded systems expertise.
The LPC800 series targets cost-sensitive, space-constrained embedded applications requiring rich analog/mixed-signal integration, low-power operation, and software-defined peripheral flexibility-exemplified by the LPC804M111JDH24J's dual-supply I/O and switch matrix architecture.
FAQ
What is the maximum operating frequency of the LPC804M111JDH24J?
The LPC804M111JDH24J operates at a maximum CPU frequency of 15 MHz using its internal Free Running Oscillator (FRO), which is trimmed to ±1 % accuracy across 0 °C to 70 °C. This frequency is fixed and not user-adjustable via PLL, as the device lacks a phase-locked loop. The FRO supplies the system clock directly, ensuring timing stability without external crystals.
Does the LPC804M111JDH24J support in-system programming (ISP)?
Yes, the LPC804M111JDH24J supports In-System Programming (ISP) through its USART interface using the on-chip ROM bootloader. It also supports Flash In-Application Programming (IAP) for runtime firmware updates. No external programmer is required-only a UART connection and correct pin states (e.g., PIO0_12 held low during reset) are needed to enter ISP mode.
How many GPIO pins does the LPC804M111JDH24J have, and what are their key electrical characteristics?
The LPC804M111JDH24J provides 20 general-purpose I/O pins (PIO0_0 to PIO0_21, excluding power/ground). Five pins (PIO0_2, PIO0_3, PIO0_12, PIO0_18, PIO0_20) support high-current output (20 mA). All GPIOs feature configurable pull-up/pull-down, open-drain mode, input inversion, and glitch filtering-critical for noise-immune industrial interfacing.
What distinguishes the LPC804M111JDH24J from other LPC804 variants like LPC804M101JDH24?
The LPC804M111JDH24J includes a dedicated VDDIO pin (Pin 3) enabling true dual I/O power domains-unlike the LPC804M101JDH24, which uses a single VDD rail. This allows level-shifting between independent voltage domains without external components. Both share identical flash (32 KB), SRAM (4 KB), and peripheral sets, but only the M111 variant supports mixed-voltage system integration.
Can the LPC804M111JDH24J's Programmable Logic Unit (PLU) replace external combinational logic ICs?
Yes-the PLU in the LPC804M111JDH24J implements small combinatorial and sequential logic networks, including simple state machines, using up to three inputs and two outputs. It operates independently of the CPU and can drive GPIOs directly, eliminating need for external 74-series logic in applications like LED pattern sequencing, sensor signal conditioning, or protocol encoding/decoding.
LPC804M111JDH24J Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Package/Case:
- 24-TSSOP (0.173", 4.40mm Width)
- Series:
- LPC80xM
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
- Not Verified
- Core Processor:
- ARM® Cortex®-M0+
- Core Size:
- 32-Bit Single-Core
- Speed:
- 15MHz
- Connectivity:
- I2C, SPI, UART/USART
- Peripherals:
- Brown-out Detect/Reset, POR, PWM, WDT
- Number of I/O:
- 20
- Program Memory Size:
- 32KB (32K x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- -
- RAM Size:
- 4K x 8
- Voltage - Supply (Vcc/Vdd):
- 1.71V ~ 3.6V
- Data Converters:
- A/D 12x12b; D/A 1x10b
- Oscillator Type:
- Internal
- Operating Temperature:
- -40°C ~ 105°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
LPC804M111JDH24J FAQ
1.How can I place an order for LPC804M111JDH24J through Aetrix?
Please submit a Request for Quotation (RFQ) for LPC804M111JDH24J on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LPC804M111JDH24J reliable?
The price and inventory of LPC804M111JDH24J are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LPC804M111JDH24J is usually 5 days.
3.What payment methods are accepted for LPC804M111JDH24J?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LPC804M111JDH24J transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LPC804M111JDH24J?
LPC804M111JDH24J orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LPC804M111JDH24J order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LPC804M111JDH24J?
For technical support, including LPC804M111JDH24J datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LPC804M111JDH24J requirements.
6.How does Aetrix verify that LPC804M111JDH24J is sourced from the original manufacturer or authorized distributors?
All LPC804M111JDH24J products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LPC804M111JDH24J meets industry standards.
7.What is the process for return or replacement of LPC804M111JDH24J?
All LPC804M111JDH24J units undergo pre-shipment inspection (PSI). If there is an issue with LPC804M111JDH24J, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LPC804M111JDH24J part is unused and in its original packaging.
Return procedure for LPC804M111JDH24J:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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