Send an Inquiry

To receive a quote for your project, please fill in the following information, and we’ll get back to you promptly.

Submit Inventory List

Please fill in the following information, and we’ll get back to you promptly.

Home > Products > Integrated Circuits (ICs) > Embedded > Microcontrollers

NXP Semiconductors LPC832M101FDH20FP

Name: LPC832M101FDH20FP
Brand: NXP Semiconductors
SKU: LPC832M101FDH20FP
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

Compare

Part No.:: LPC832M101FDH20FP

Manufacturer:: NXP Semiconductors

Category:: Microcontrollers

Package:: 20-TSSOP (0.173", 4.40mm Width)

Datasheet:: LPC832M101FDH20FP.pdf

Description:: IC MCU 32BIT 16KB FLASH 20TSSOP

Quantity:: RFQ Add To RFQ list

Payment:

Shipping:

Inventory:805

Please send an inquiry. Send us your inquiry, and we will respond immediately.

Product details

Overview

LPC832M101FDH20FP from NXP Semiconductors is a 32-bit ARM Cortex-M0+ microcontroller operating at up to 30 MHz, featuring 16 KB flash, 4 KB SRAM, one 12-bit ADC with 5 input channels, and 16 GPIO pins in a TSSOP20 package. It integrates USART, I²C, two SPI interfaces, SCTimer/PWM, DMA, and programmable power modes for sensor gateways and portable control applications.

For engineers reviewing the LPC832M101FDH20FP datasheet, LPC832M101FDH20FP pinout, LPC832M101FDH20FP application, or LPC832M101FDH20FP equivalent, key selection criteria include its fixed 16-pin GPIO count, TSSOP20 thermal profile, 1.8–3.6 V single-supply operation, Deep power-down wake-up capability via PIO0_4, and switch-matrix configurable peripheral routing.

Technical Context

The LPC832M101FDH20FP implements an ARM Cortex-M0+ core (r0p1) with single-cycle I/O and NVIC interrupt handling, paired with an AHB multilayer matrix and Serial Wire Debug interface. Its peripheral set is routed through a flexible switch matrix that maps movable functions-including USART0, SPI0/1, I²C0, and SCTimer inputs/outputs-to any non-power GPIO pin.

Power management includes integrated PMU support for Sleep, Deep-sleep, Power-down, and Deep power-down modes, with wake-up sources including PIO0_4 (WAKEUP), USART, SPI, I²C activity, and self-wake-up timer clocked from IRC or external source. The 12-bit ADC supports dual conversion sequences and up to 1.2 Msamples/s sampling rate.

Key Specifications

Parameter	Value and Actual Design Meaning
CPU Core	ARM Cortex-M0+ (r0p1), 30 MHz max - enables deterministic real-time control with low gate count and energy efficiency.
Flash / SRAM	16 KB flash / 4 KB SRAM - sufficient for compact firmware with bootloader, IAP, and real-time data buffering.
ADC	12-bit, 5-channel input - supports analog sensing in climate control or battery monitoring with dual sequence triggering.
GPIO Count	16 general-purpose I/O pins - matches TSSOP20 pin count; all support configurable pull-up/down, open-drain, and digital filter.
Communication	1× USART, 1× I²C (Fast-mode Plus), 2× SPI - enables sensor interfacing, display control, and multi-device bus communication.
Timers	SCTimer/PWM (4 match outputs), MRT (4 channels), WKT - provides precise PWM generation, periodic interrupts, and ultra-low-power wake-up timing.
Supply Range	1.8 V to 3.6 V - compatible with Li-ion, coin-cell, and regulated 3.3 V systems without level-shifting.

Pinout & Package

TSSOP20 package (SOT360-1), 4.4 mm body width, 0.65 mm pitch, lead-free, RoHS-compliant. Thermal performance optimized for industrial ambient conditions (-40 °C to +85 °C).

Pin/Terminal	Circuit Role	Design Meaning
1: PIO0_23/ADC_3	Analog input / GPIO	Dedicated ADC channel 3; also serves as high-speed GPIO with programmable pull-up/down and digital filter.
2: PIO0_14/ADC_2	Analog input / GPIO	ADC channel 2 input; default GPIO after reset; supports pattern-match interrupt on rising/falling edge.
3: PIO0_17/ADC_9	Analog input / GPIO	ADC channel 9; assignable to SCTimer/PWM or USART via switch matrix when not used for analog sensing.
4: PIO0_0/TDO	Debug output / GPIO	Test Data Out in boundary scan mode; otherwise general-purpose I/O with 5 V tolerant input capability.
5: PIO0_13/ADC_10	Analog input / GPIO	ADC channel 10; supports external trigger for ADC conversion sequencing.
6: VREFP	ADC reference positive	Positive reference voltage for ADC; must be ≤ VDD and stable to ensure 12-bit linearity.
7: PIO0_12	ISP entry / GPIO	Low-level during reset initiates ISP command handler; critical for field firmware updates without debugger.
8: VREFN	ADC reference negative	Ground reference for ADC; requires low-noise connection to minimize quantization error.
9: RESET/PIO0_5	Reset input / GPIO	Active-low hardware reset; must be pulled high externally in Deep power-down mode; 20 ns glitch filter included.
10: VSS	Ground	Primary digital ground; connects to PCB ground plane for noise immunity and EMI control.
11: PIO0_4/ADC_11/WAKEUP/TRST	Wake-up trigger / ADC / debug	Primary Deep power-down wake source; LOW pulse ≥50 ns exits DPD mode; also ADC channel 11 and JTAG TRST.
12: VDD	Power supply	Single 1.8–3.6 V supply for core, I/O, and analog blocks; decoupling capacitor required near pin.
13: SWCLK/PIO0_3/TCK	SWD clock / GPIO	Serial Wire Clock input; enables debug programming and real-time trace; 5 V tolerant with internal pull-up.
14: PIO0_8/XTALIN	Oscillator input	Crystal or external clock input (1–25 MHz); digital section disabled when XTAL function active.
15: SWDIO/PIO0_2/TMS	SWD bidirectional / GPIO	Serial Wire Debug I/O; default function enabled at reset; supports bidirectional debug traffic and GPIO use.
16: PIO0_9/XTALOUT	Oscillator output	Crystal oscillator output; drives external crystal; not 5 V tolerant when configured as XTALOUT.
17: PIO0_11/I2C0_SDA	I²C data / open-drain GPIO	True open-drain I²C SDA; supports Fast-mode Plus (1 Mbit/s); requires external pull-up; high-current sink enabled.
18: PIO0_1/CLKIN/TDI	External clock / debug input	Accepts external clock up to 30 MHz; also JTAG TDI in boundary scan mode; 5 V tolerant with hysteresis.
19: PIO0_10/I2C0_SCL	I²C clock / open-drain GPIO	True open-drain I²C SCL; supports Fast-mode Plus; same electrical specs as PIO0_11; requires external pull-up.
20: PIO0_15	General-purpose I/O	Fully configurable GPIO; supports SCTimer input, USART TX/RX, or SPI signals via switch matrix assignment.

Key Features

Feature	Design Value
Switch Matrix Peripheral Routing	Enables dynamic assignment of USART, SPI, I²C, and SCTimer functions to any non-power GPIO pin-eliminating fixed pin conflicts and simplifying PCB layout.
Deep Power-Down Wake-Up	PIO0_4 triggers exit from Deep power-down mode with <50 ns pulse-enabling sub-μA system sleep with responsive wake latency for battery-powered sensors.
High-Speed GPIO	ARM Cortex-M0+ IO bus-connected GPIO allows 15 MHz toggle rate and atomic bit-set/clear operations-critical for bit-banged protocols and real-time signal generation.
Programmable ADC Triggering	Supports dual independent conversion sequences with internal (timer, SCT) and external (GPIO pin) triggers-enabling synchronized multi-sensor acquisition without CPU overhead.
Integrated Power Management Unit	Hardware-controlled Sleep, Deep-sleep, Power-down, and Deep power-down modes with wake-up sources mapped to peripherals-reducing active current to 90 μA/MHz using IRC clock.

Applications

Sensor Gateway Node	Portable Climate Controller
Use Scenario: Aggregating temperature, humidity, and CO₂ readings from multiple I²C sensors in smart building nodes. IC Role / Device Role / Timing Role: Central MCU managing sensor polling, local data fusion, and low-power wireless transmission scheduling. Use Value: 16 GPIO + switch matrix enables direct I²C/SPI sensor attachment; Deep power-down with PIO0_4 wake-up extends battery life beyond 1 year on coin cell.	Use Scenario: Compact HVAC remote with rotary encoder, OLED display, and thermistor feedback. IC Role / Device Role / Timing Role: Real-time user interface controller with ADC-based temperature sampling and SPI-driven display refresh. Use Value: 12-bit ADC resolution ensures ±0.5°C thermal accuracy; SCTimer/PWM generates precise backlight dimming without CPU load.
Gaming Peripheral Interface	Industrial Motor Monitor
Use Scenario: USB-to-gamepad adapter translating analog stick and button inputs into HID reports. IC Role / Device Role / Timing Role: Low-latency input processor converting ADC joystick values and GPIO button states into packetized data. Use Value: Single-cycle GPIO and 30 MHz CPU enable <100 μs input-to-report latency; 5 V tolerant pins simplify connection to legacy game controllers.	Use Scenario: Brushless DC motor status monitor with current sense, RPM feedback, and fault reporting. IC Role / Device Role / Timing Role: Dedicated motor supervision unit capturing overcurrent events and thermal warnings via GPIO and ADC. Use Value: Windowed Watchdog (WWDT) ensures fail-safe shutdown on firmware hang; high-current GPIO drivers directly interface with optocouplers and LED indicators.

Sensor Gateway Node

Portable Climate Controller

Use Scenario: Aggregating temperature, humidity, and CO₂ readings from multiple I²C sensors in smart building nodes.

IC Role / Device Role / Timing Role: Central MCU managing sensor polling, local data fusion, and low-power wireless transmission scheduling.

Use Value: 16 GPIO + switch matrix enables direct I²C/SPI sensor attachment; Deep power-down with PIO0_4 wake-up extends battery life beyond 1 year on coin cell.

Use Scenario: Compact HVAC remote with rotary encoder, OLED display, and thermistor feedback.

IC Role / Device Role / Timing Role: Real-time user interface controller with ADC-based temperature sampling and SPI-driven display refresh.

Use Value: 12-bit ADC resolution ensures ±0.5°C thermal accuracy; SCTimer/PWM generates precise backlight dimming without CPU load.

Gaming Peripheral Interface

Industrial Motor Monitor

Use Scenario: USB-to-gamepad adapter translating analog stick and button inputs into HID reports.

IC Role / Device Role / Timing Role: Low-latency input processor converting ADC joystick values and GPIO button states into packetized data.

Use Value: Single-cycle GPIO and 30 MHz CPU enable <100 μs input-to-report latency; 5 V tolerant pins simplify connection to legacy game controllers.

Use Scenario: Brushless DC motor status monitor with current sense, RPM feedback, and fault reporting.

IC Role / Device Role / Timing Role: Dedicated motor supervision unit capturing overcurrent events and thermal warnings via GPIO and ADC.

Use Value: Windowed Watchdog (WWDT) ensures fail-safe shutdown on firmware hang; high-current GPIO drivers directly interface with optocouplers and LED indicators.

Equivalent & Alternatives

The following parts are listed as comparable options for similar microcontroller applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
LPC834M101FHI33	32 KB flash, 29 GPIO, HVQFN33 package - adds 16 KB flash and 13 extra GPIO vs. LPC832M101FDH20FP.	Required for designs needing >16 GPIO or >16 KB code space; incompatible TSSOP20 footprint.	Select when scaling firmware complexity or expanding peripheral count beyond LPC832M101FDH20FP limits.
STM32F030F4P6	16 KB flash, 15 GPIO, TSSOP20, ARM Cortex-M0 - lacks switch matrix, SCTimer, and Deep power-down wake-up pin.	Suitable for cost-sensitive 8-bit replacement where peripheral flexibility and ultra-low-power wake are non-critical.	Choose only if design does not require pin-movable peripherals or sub-μA deep sleep with external wake trigger.

Compared with LPC834M101FHI33 and STM32F030F4P6, the LPC832M101FDH20FP uniquely balances TSSOP20 compactness, switch-matrix adaptability, and Deep power-down wake-up via dedicated PIO0_4-making it optimal for space-constrained, battery-aware embedded nodes where pin reuse and low-energy responsiveness are essential.

Availability

LPC832M101FDH20FP is available at Aetrix Electronics and suitable for sensor gateways, portable climate controllers, and gaming peripheral interfaces requiring stable component supply across industrial and consumer production cycles.

Supply support for LPC832M101FDH20FP includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

NXP Semiconductors is a global semiconductor leader specializing in secure connectivity solutions for automotive, industrial, and IoT applications.

The LPC83x product line delivers cost-optimized, low-power ARM Cortex-M0+ MCUs targeting resource-constrained embedded systems requiring flexible peripheral routing and robust power management.

FAQ

What is the maximum operating frequency of the LPC832M101FDH20FP?

The LPC832M101FDH20FP operates at a maximum CPU frequency of 30 MHz using its ARM Cortex-M0+ core. This speed is achievable with the internal 12 MHz RC oscillator (trimmed to ±1.5 %), external crystal (1–25 MHz), or PLL-derived clock. The core's two-stage pipeline and single-cycle I/O support deterministic real-time execution at this rate, and the LPC832M101FDH20FP maintains full peripheral functionality-including ADC sampling at 1.2 Msamples/s and GPIO toggling up to 15 MHz-within this specification.

Does the LPC832M101FDH20FP support in-application programming (IAP)?

Yes, the LPC832M101FDH20FP supports In-Application Programming (IAP) via its on-chip ROM API. This allows firmware updates while the device is running, without requiring a debugger or external programmer. The IAP routines-accessible through defined memory-mapped addresses-support flash page erase and reprogramming, enabling field upgrades and parameter storage. These capabilities are fully implemented in the LPC832M101FDH20FP and validated in NXP's official LPC83x ROM User Manual.

How many ADC input channels does the LPC832M101FDH20FP have?

The LPC832M101FDH20FP includes a 12-bit ADC with 5 dedicated input channels: ADC_0 through ADC_3 and ADC_10, plus ADC_11 on PIO0_4. This matches the TSSOP20 package's pin count and routing constraints. All five channels support internal and external triggering, dual independent conversion sequences, and sample rates up to 1.2 Msamples/s. The LPC832M101FDH20FP's ADC architecture enables simultaneous sampling control without CPU intervention, making it suitable for time-critical analog monitoring tasks.

Can the LPC832M101FDH20FP wake from Deep power-down mode using a GPIO pin?

Yes, the LPC832M101FDH20FP can wake from Deep power-down mode using PIO0_4, which is designated as the WAKEUP pin. A LOW-going pulse as short as 50 ns on this pin causes the device to exit Deep power-down and resume operation. External pull-up is required before entering Deep power-down, and the pin remains active in all power modes. No other GPIO pin on the LPC832M101FDH20FP provides this wake-up capability-making PIO0_4 a critical design element for ultra-low-power sensor applications.

What debug interface does the LPC832M101FDH20FP support?

The LPC832M101FDH20FP supports Serial Wire Debug (SWD) using SWDIO (PIO0_2) and SWCLK (PIO0_3), with four hardware breakpoints and two watchpoints. JTAG boundary scan (BSDL) is also supported but only in boundary scan mode, where TDO, TDI, TCK, TMS, and TRST are activated on specific pins. SWD is the primary debug interface for programming and real-time tracing, and the LPC832M101FDH20FP implements full SWD protocol compliance per ARM ADI v5 specification.

LPC832M101FDH20FP Specifications

Product attributes: Attribute value

Manufacturer:: NXP Semiconductors

Package/Case:: 20-TSSOP (0.173", 4.40mm Width)

Series:: LPC83x

Packaging:: Tube

Product Status:: Active

Programmable:: Not Verified

Core Processor:: ARM® Cortex®-M0+

Core Size:: 32-Bit Single-Core

Speed:: 30MHz

Connectivity:: I2C, SPI, UART/USART

Peripherals:: Brown-out Detect/Reset, DMA, POR, PWM, WDT

Number of I/O:: 16

Program Memory Size:: 16KB (16K x 8)

Program Memory Type:: FLASH

EEPROM Size:: -

RAM Size:: 4K x 8

Voltage - Supply (Vcc/Vdd):: 1.8V ~ 3.6V

Data Converters:: A/D 5x12b

Oscillator Type:: Internal

Operating Temperature:: -40°C ~ 85°C (TA)

Grade:: -

Qualification:: -

Mounting Type:: Surface Mount

Supplier Device Package:

LPC832M101FDH20FP FAQ

1.How can I place an order for LPC832M101FDH20FP through Aetrix?

Please submit a Request for Quotation (RFQ) for LPC832M101FDH20FP on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for LPC832M101FDH20FP reliable?

The price and inventory of LPC832M101FDH20FP are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LPC832M101FDH20FP is usually 5 days.

3.What payment methods are accepted for LPC832M101FDH20FP?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LPC832M101FDH20FP transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for LPC832M101FDH20FP?

LPC832M101FDH20FP orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your LPC832M101FDH20FP order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for LPC832M101FDH20FP?

For technical support, including LPC832M101FDH20FP datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LPC832M101FDH20FP requirements.

6.How does Aetrix verify that LPC832M101FDH20FP is sourced from the original manufacturer or authorized distributors?

All LPC832M101FDH20FP products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LPC832M101FDH20FP meets industry standards.

7.What is the process for return or replacement of LPC832M101FDH20FP?

All LPC832M101FDH20FP units undergo pre-shipment inspection (PSI). If there is an issue with LPC832M101FDH20FP, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The LPC832M101FDH20FP part is unused and in its original packaging.

Return procedure for LPC832M101FDH20FP:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

Tech Hub

2026-09-03 Logic Level Shifter: How to Connect 3.3V and 5V Logic Safely

A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.

2026-09-03 74HC595 vs TPIC6B595: Output Drive, Pinout, Current, and Load Selection

The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…

2026-09-01 74HC595 Pinout, Timing, Output Current, and Applications

The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…

2026-09-01 Latch vs Flip-Flop: Timing, Differences and Design Choices

A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…

2026-08-30 D Latch Circuit: Truth Table, Timing, ICs and Applications

A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …

2026-08-28 SR Latch Explained: NOR and NAND Circuits, Truth Tables, and Applications

An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…

2026-08-27 Latch Circuit: SR and D Latches, Truth Tables, Timing, and Applications

Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…

2026-08-21 What Is an LED Driver? Types, Circuits, Dimming, and Selection

An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…

2026-08-18 Operational Amplifier (Op Amp): Basics, Configurations, Feedback and Applications

Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…

2026-08-14 Jumper Cables: How to Use, Connect and Choose Them Safely

Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…