My Inquiry
My Account
NXP Semiconductors LPC845M301JHI48E
- Part No.:
- LPC845M301JHI48E
- Manufacturer:
- NXP Semiconductors
- Category:
- Microcontrollers
- Package:
- 48-VFQFN Exposed Pad
- Datasheet:
-
LPC845M301JHI48E.pdf
- Description:
- IC MCU 32BIT 64KB FLASH 48HVQFN
- Quantity:
- Payment:
- Shipping:
Inventory:4,010
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
LPC845M301JHI48E from NXP Semiconductors is a 32-bit Arm Cortex-M0+ microcontroller operating at up to 30 MHz, featuring 64 KB flash, 16 KB SRAM, one 12-bit ADC (12-channel, 1.2 Msps), two 10-bit DACs, and capacitive touch interface - deployed in industrial sensor gateways and portable human-interface devices.
For engineers reviewing the LPC845M301JHI48E datasheet, LPC845M301JHI48E pinout, LPC845M301JHI48E application, or LPC845M301JHI48E equivalent, key selection criteria include its HVQFN48 package with 42 GPIOs, switch-matrix I/O routing, self-wake-up timer with external clock input (PIO0_28), and dual DAC outputs for analog control loops.
Technical Context
The LPC845M301JHI48E implements an Arm Cortex-M0+ core (r0p1) with single-cycle I/O and NVIC, paired with a multilayer AHB matrix and Micro Trace Buffer for debug visibility. Its peripheral set includes five USARTs (two fractional baud generators), four I2C interfaces (one Fast-mode Plus), two SPI controllers, and a flexible switch matrix enabling function remapping across 42 GPIO pins.
Timing subsystems comprise an SCTimer/PWM (5 inputs/7 outputs, 8 match/capture units), a 32-bit general-purpose timer (4 match/3 capture), four-channel Multi-Rate Timer, and a self-wake-up timer (WKT) clocked by FRO, low-power oscillator, or external signal on PIO0_28 - all supported in deep power-down mode.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core | Arm Cortex-M0+ (r0p1), 30 MHz max - enables deterministic real-time control with low interrupt latency and efficient code density. |
| Memory | 64 KB flash (64-byte page erase), 16 KB SRAM (dual 8 KB banks) - supports firmware updates via IAP and MTB trace buffer allocation. |
| Analog Peripherals | 12-bit ADC (12 channels, 1.2 Msps, dual sequences), two 10-bit DACs (DACOUT_0/DACOUT_1), comparator (5 inputs) - enables closed-loop analog sensing and actuation. |
| Digital I/O | 42 configurable GPIOs with pull-up/down, open-drain, input inverter, digital filter, and independent bit-set/clear/toggle - simplifies hardware abstraction layer development. |
| Serial Interfaces | 5 USARTs, 4 I2C (1× Fast-mode Plus @ 1 Mbit/s), 2 SPI - provides multi-protocol connectivity for sensor fusion and host communication. |
| Power & Temp | 1.8–3.6 V supply, -40 °C to +105 °C operation, deep power-down mode with wake-up on PIO0_4 or RESET - suitable for harsh industrial environments. |
| Package | HVQFN48 (7 mm × 7 mm × 0.85 mm, no leads, thermal pad) - delivers compact footprint and enhanced thermal performance for space-constrained designs. |
Pinout & Package
HVQFN48 package: 7 mm × 7 mm body, 0.85 mm height, exposed thermal pad, 48 terminals in perimeter layout with terminal 1 index area marked. Pin 1 located at top-left corner when viewed from top with marking side up.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VDD | Core & I/O supply | Primary 1.8–3.6 V power input; multiple VDD pins ensure stable rail distribution across die. |
| VSS | Digital ground | Reference return path for digital logic; multiple VSS pins reduce ground bounce in high-speed switching. |
| VDDA / VSSA | Analog supply / ground | Isolated 1.8–3.6 V analog domain supply and return - critical for ADC/DAC accuracy and noise immunity. |
| PIO0_2 / PIO0_3 | SWDIO / SWCLK | Default Serial Wire Debug interface - enables programming and real-time debugging without JTAG overhead. |
| PIO0_4 | WAKEUP / ADC_11 | Deep power-down wake-up trigger (50 ns pulse); also serves as ADC input channel 11 when not used for wake-up. |
| PIO0_5 | RESET | External reset input (20–50 ns LOW pulse); also wakes device from deep power-down if externally pulled HIGH pre-entry. |
| PIO0_8 / PIO0_9 | XTALIN / XTALOUT | Crystal oscillator interface (1–25 MHz) - supports precise timing for UART baud rates and synchronous peripherals. |
| PIO0_10 / PIO0_11 | I2C0_SCL / I2C0_SDA | True open-drain Fast-mode Plus I2C bus (1 Mbit/s) - requires external pull-ups; high-current sink capability ensures robust bus drive. |
| PIO0_17 / PIO0_29 | DACOUT_0 / DACOUT_1 | Analog voltage outputs (10-bit resolution) - directly drive reference inputs, op-amp feedback paths, or low-power actuators. |
| PIO0_28 | WKTCLKIN | External clock input for self-wake-up timer - active in all power modes including deep power-down, enabling precise low-power scheduling. |
Key Features
| Feature | Design Value |
|---|---|
| Switch Matrix I/O Routing | Enables assignment of USART, SPI, I2C, SCTimer, and CTimer functions to any non-power GPIO - eliminates fixed-peripheral pin conflicts and reduces PCB redesign cycles. |
| Capacitive Touch Interface | Supports up to 9 X/Y sensor inputs (CAPT_X0–X8, CAPT_YL/YH) - enables direct integration of touch buttons, sliders, and wheels without external controller. |
| FRO Clock Source | Factory-trimmed Free Running Oscillator (±1 % over 0–70 °C) with selectable 18/24/30 MHz outputs - eliminates need for external crystal in cost-sensitive applications. |
| DMA Controller | 25-channel DMA with 13 trigger sources - offloads CPU from data movement tasks (e.g., ADC-to-memory, UART TX/RX buffering), improving real-time responsiveness. |
| Low-Power Modes | Sleep, deep-sleep, power-down, and deep power-down with wake-up on USART/SPI/I2C activity or dedicated pins - extends battery life in portable and remote sensor nodes. |
Applications
| Sensor Gateway | Portable Human Interface |
|---|---|
Use Scenario: Aggregating temperature, humidity, and motion data from multiple I2C/SPI sensors in smart building nodes. IC Role / Device Role / Timing Role: Central MCU managing sensor polling, local preprocessing, and wireless uplink via UART or SPI-connected transceiver. Use Value: 42 GPIOs with switch matrix enable flexible sensor mapping; dual DACs generate bias voltages for analog sensors; 12-bit ADC resolves sub-degree thermal changes. | Use Scenario: Battery-powered gaming controller with touch sliders, push buttons, and haptic feedback. IC Role / Device Role / Timing Role: Real-time HID processor handling capacitive touch detection, button debouncing, and PWM-driven vibration motor control. Use Value: Integrated capacitive touch engine reduces BOM count; SCTimer/PWM generates precise motor drive waveforms; deep power-down extends play time between charges. |
| Industrial Motor Control | Climate Control Panel |
Use Scenario: Fan speed regulation and thermal monitoring in HVAC duct systems using PWM output and temperature feedback. IC Role / Device Role / Timing Role: Closed-loop controller executing PID algorithm, driving MOSFET gate drivers via PWM, and reading thermistor ADC inputs. Use Value: SCTimer/PWM provides synchronized 3-phase timing; 12-bit ADC achieves <0.5 °C temperature resolution; 10-bit DAC sets reference voltages for comparator-based overtemp protection. | Use Scenario: Wall-mounted thermostat with LCD display, rotary encoder, and relay control for heating/cooling stages. IC Role / Device Role / Timing Role: System manager coordinating user input, display update, environmental sensing, and relay actuation. Use Value: Five USARTs support simultaneous LCD serial interface, IR remote receiver, and RS-485 HVAC bus; GPIOs with programmable open-drain drive relays directly; wide temp range (-40 to +105 °C) ensures reliability in unconditioned spaces. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar microcontroller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| LPC845M301JBD48 | LQFP48 package (7×7 mm, 1.4 mm height), 42 GPIOs, identical core/peripherals - differs only in leaded package and thermal profile. | Preferred where reflow compatibility with legacy LQFP footprints or manual prototyping is required. | Select for designs needing through-hole-compatible reworkability or higher thermal mass in non-compact layouts. |
| LPC824M201JHI33 | HVQFN33 package (5×5 mm), 29 GPIOs, 64 KB flash, 8 KB SRAM, no capacitive touch, single DAC - reduced peripheral set and memory. | Suitable for simpler sensor nodes or cost-optimized replacements where touch interface and dual DAC are unnecessary. | Choose when footprint size and unit cost are prioritized over analog feature count and I/O scalability. |
Compared with LPC845M301JHI48E, the LQFP48 variant offers identical functionality in a leaded package for easier inspection and rework, while the LPC824M201JHI33 trades capacitive touch, second DAC, and 8 KB SRAM for smaller size and lower cost - making it viable only in stripped-down implementations.
Availability
LPC845M301JHI48E is available at Aetrix Electronics and suitable for industrial sensor gateways, portable human-interface devices, and climate control panels requiring stable component supply across extended product lifecycles.
Supply support for LPC845M301JHI48E includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
NXP Semiconductors is a global semiconductor leader specializing in secure connectivity solutions for automotive, industrial, and IoT applications.
The LPC84x product line delivers cost-optimized, low-power Arm Cortex-M0+ MCUs with integrated analog peripherals and flexible I/O routing - designed specifically for resource-constrained edge nodes requiring sensor fusion, touch interaction, and multi-protocol connectivity.
FAQ
What is the maximum operating frequency of the LPC845M301JHI48E?
The LPC845M301JHI48E operates at a maximum CPU frequency of 30 MHz, achieved via its Arm Cortex-M0+ core and supported by the factory-trimmed Free Running Oscillator (FRO) delivering 18 MHz, 24 MHz, or 30 MHz outputs with ±1 % accuracy across 0–70 °C. This frequency enables real-time execution of control algorithms and protocol stacks without external high-frequency crystals.
Does the LPC845M301JHI48E support in-application programming (IAP)?
Yes, the LPC845M301JHI48E supports Flash In-Application Programming (IAP) via its on-chip ROM API, allowing firmware updates during runtime without halting system operation. This capability is implemented alongside ISP through USART, SPI, and I2C interfaces, enabling field upgrades and bootloader customization in deployed systems.
How many analog-to-digital converter (ADC) channels does the LPC845M301JHI48E provide?
The LPC845M301JHI48E integrates a 12-bit ADC with up to 12 input channels (ADC_0 through ADC_11), supporting sample rates up to 1.2 Msamples/s and two independent conversion sequences. Channel mapping includes dedicated pins like PIO0_7 (ADC_0) and PIO0_29 (not ADC), with full routing flexibility via the switch matrix for custom signal acquisition paths.
What package type is used for the LPC845M301JHI48E?
The LPC845M301JHI48E uses the HVQFN48 package: a plastic thermal-enhanced very thin quad flat package with no leads, 48 terminals, 7 mm × 7 mm body size, and 0.85 mm height. It features an exposed thermal pad for improved heat dissipation and is optimized for high-density PCB layouts in space-constrained applications.
Can the LPC845M301JHI48E wake up from deep power-down mode using an external signal?
Yes, the LPC845M301JHI48E can wake up from deep power-down mode via external signals on either PIO0_4 (WAKEUP pin) or PIO0_5 (RESET pin). A LOW-going pulse as short as 50 ns on PIO0_4 triggers wake-up; the pin must be externally pulled HIGH before entering deep power-down. The WKTCLKIN pin (PIO0_28) also supports external clock wake-up in all power modes.
LPC845M301JHI48E Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Package/Case:
- 48-VFQFN Exposed Pad
- Series:
- LPC84x
- Packaging:
- Tray
- Product Status:
- Discontinued at Digi-Key
- Programmable:
- Not Verified
- Core Processor:
- ARM® Cortex®-M0+
- Core Size:
- 32-Bit Single-Core
- Speed:
- 30MHz
- Connectivity:
- I2C, SPI, UART/USART
- Peripherals:
- Brown-out Detect/Reset, Capacitive Touch, DMA, POR, PWM, WDT
- Number of I/O:
- 42
- Program Memory Size:
- 64KB (64K x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- -
- RAM Size:
- 16K x 8
- Voltage - Supply (Vcc/Vdd):
- 1.8V ~ 3.6V
- Data Converters:
- A/D 12x12b; D/A 2x10b
- Oscillator Type:
- External, Internal
- Operating Temperature:
- -40°C ~ 105°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
LPC845M301JHI48E FAQ
1.How can I place an order for LPC845M301JHI48E through Aetrix?
Please submit a Request for Quotation (RFQ) for LPC845M301JHI48E on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LPC845M301JHI48E reliable?
The price and inventory of LPC845M301JHI48E are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LPC845M301JHI48E is usually 5 days.
3.What payment methods are accepted for LPC845M301JHI48E?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LPC845M301JHI48E transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LPC845M301JHI48E?
LPC845M301JHI48E orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LPC845M301JHI48E order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LPC845M301JHI48E?
For technical support, including LPC845M301JHI48E datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LPC845M301JHI48E requirements.
6.How does Aetrix verify that LPC845M301JHI48E is sourced from the original manufacturer or authorized distributors?
All LPC845M301JHI48E products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LPC845M301JHI48E meets industry standards.
7.What is the process for return or replacement of LPC845M301JHI48E?
All LPC845M301JHI48E units undergo pre-shipment inspection (PSI). If there is an issue with LPC845M301JHI48E, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LPC845M301JHI48E part is unused and in its original packaging.
Return procedure for LPC845M301JHI48E:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
LPC845M301JHI48E Tags
-
ATTINY4-TSHR
Microchip Technology
-
ATTINY10-TSHR
Microchip Technology
-
ATTINY10-TS8R
Microchip Technology
-
ATTINY202-SSNR
Microchip Technology
-
ATTINY202-SSFR
Microchip Technology
-
ATTINY402-SSNR
Microchip Technology
-
PIC16F15213T-I/MF
Microchip Technology
-
PIC16F15213-E/MF
Microchip Technology
-
PIC10F200T-I/OT
Microchip Technology
-
ATTINY412-SSNR
Microchip Technology
-
PIC10F202T-I/OT
Microchip Technology
-
ATTINY404-SSNR
Microchip Technology
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…
