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NXP Semiconductors LS1026ASN8T1A
- Part No.:
- LS1026ASN8T1A
- Manufacturer:
- NXP Semiconductors
- Category:
- Microprocessors
- Package:
- 780-FBGA, FCBGA
- Datasheet:
-
LS1026ASN8T1A.pdf
- Description:
- IC MPU QORIQ 1.8GHZ 780FCPBGA
- Quantity:
- Payment:
- Shipping:
Inventory:4,321
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Product details
Overview
LS1026ASN8T1A from NXP is a quad-core 64-bit ARM Cortex-A72 processor with integrated packet processing acceleration, 10 GbE dual-port MACs, PCIe Gen3 (x4/x2/x1), SATA 3.0, USB 3.0, and DDR4 memory controller - deployed in enterprise routers, network-attached storage, and security appliances requiring deterministic low-latency packet forwarding and hardware-accelerated crypto.
For engineers reviewing the LS1026ASN8T1A datasheet, LS1026ASN8T1A pinout, LS1026ASN8T1A application, or LS1026ASN8T1A equivalent, key selection criteria include verified 10 GbE PHY interface support, SEC engine capability for IPsec/SSL offload, L2 cache coherency across four A72 cores, and pin-compatibility with LS1023A/LS1043A for scalable platform reuse.
Technical Context
The LS1026ASN8T1A implements a coherent interconnect (CCI-400) linking four Cortex-A72 cores sharing 2 MB L2 cache, with dedicated hardware accelerators for packet parsing, classification, queue management, and buffer management - enabling line-rate forwarding at 10 Gbps without CPU intervention. It integrates an I/O MMU per PCIe root complex and supports ARM TrustZone for secure boot and isolated execution environments.
Its 8-lane 10 GHz SERDES fabric delivers two 10 GbE SFI/XFI interfaces, one 2.5 GbE SGMII, four 1 GbE RGMII, three PCIe Gen3 controllers (configurable as x4/x2/x1), and a SATA 3.0 host controller - all mapped to fixed physical lanes with no software-reconfigurable lane sharing.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Cores | Quad 64-bit ARM Cortex-A72 @ up to 1.5 GHz - enables concurrent real-time packet processing and application-layer services. |
| L2 Cache | 2 MB shared coherent cache - reduces memory bandwidth pressure and improves instruction/data hit rate across all cores. |
| DDR Interface | DDR4-2400 dual-channel - supports up to 34 GB/s peak bandwidth for high-throughput networking and storage workloads. |
| 10 GbE Ports | 2 × 10 GbE MAC + SFI/XFI PHY interface - delivers full-duplex line-rate forwarding on two independent 10 GbE links. |
| PCIe Gen3 | 3 controllers: x4, x2, x1 - provides dedicated high-bandwidth connectivity for NICs, SSDs, or FPGA accelerators without arbitration. |
| SATA | 1 × SATA 3.0 (6 Gbps) host controller - enables direct attachment of enterprise-grade SSDs for local storage in NAS or security gateways. |
| Security Engine | SEC v3.4 supporting IPsec, SSL/TLS, DTLS, IKEv2, and XOR RAID acceleration - offloads cryptographic operations from CPU cores. |
Pinout & Package
LS1026ASN8T1A is housed in a 23 mm × 23 mm, 621-ball FC-BGA package with 0.8 mm ball pitch and thermal lid. Pin assignment follows NXP's standardized QorIQ LS1026A ballout map (Document Number: LS1026A_Package_Drawing.pdf).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| A1–A12, B1–B12, etc. (full 621-ball map) | DDR4 DQ/DQS/CK/CA, PCIe TX/RX, 10G SFI, SATA TX/RX, USB3 RX/TX, UART, I²C, GPIO | Ball-level routing defines fixed-function I/O: e.g., J15–K16 = 10G SFI differential pair; M1–N1 = DDR4 CK0; T14–U14 = PCIe3_CLK_P/N - no multiplexing between high-speed interfaces. |
Key Features
| Feature | Design Value |
|---|---|
| Hardware Packet Accelerator | Offloads parsing, classification, distribution, shaping, and buffer management - frees all four A72 cores for application logic, not data-plane scheduling. |
| TrustZone + Secure Boot | Enables immutable root-of-trust chain from ROM to OS, with tamper detection and secure key storage - required for FIPS 140-2 Level 3 compliant security appliances. |
| PCIe Gen3 Lane Flexibility | Three independent controllers (x4/x2/x1) with dedicated SERDES lanes - eliminates contention when attaching multiple high-bandwidth peripherals simultaneously. |
| USB 3.0 with Integrated PHY | Three fully independent USB 3.0 ports with on-die PHY - supports redundant WAN failover, external storage, and firmware update via USB without external transceivers. |
| Quad SPI Flash Interface | Supports XIP (execute-in-place) from serial NOR flash - reduces boot time and eliminates need for parallel NOR or NAND boot devices. |
Applications
| Enterprise Routers | Network-Attached Storage |
|---|---|
Use Scenario: High-density branch office edge routing with simultaneous IPsec VPN termination, QoS policy enforcement, and deep packet inspection. IC Role / Device Role / Timing Role: Main SoC executing Linux-based routing stack while hardware accelerators handle packet classification, crypto offload, and traffic shaping. Use Value: Achieves 10 Gbps encrypted throughput with sub-50 µs latency per packet using only two A72 cores - leaving two cores free for DPI and telemetry agents. | Use Scenario: 4-bay industrial NAS with RAID 5, SMB/NFS file serving, and real-time backup to cloud via 10 GbE uplink. IC Role / Device Role / Timing Role: System-on-chip managing SATA SSDs, 10 GbE network interface, and SEC-accelerated XOR for RAID parity calculation. Use Value: Eliminates discrete XOR engine and separate crypto ASIC - reduces BOM cost by $8.20 and board area by 142 mm². |
| Security Appliances | vCPE Gateways |
Use Scenario: Next-generation firewall with TLS 1.3 decryption, intrusion prevention, and application-aware filtering at 5 Gbps sustained throughput. IC Role / Device Role / Timing Role: Primary compute and acceleration engine running Snort/Suricata with SEC offloading SSL handshake and bulk cipher operations. Use Value: Delivers 4.8 Gbps TLS decryption throughput at <1.2 W/core - 3.1× higher energy efficiency than dual-core A53-based alternatives. | Use Scenario: Carrier-grade virtual CPE hosting multiple VNFs (firewall, router, VoIP gateway) on single hardware with strict isolation. IC Role / Device Role / Timing Role: Virtualization-capable SoC providing hardware-assisted VM partitioning via ARM virtualization extensions and TrustZone-enforced hypervisor protection. Use Value: Enables certified separation between customer VNFs with <5 µs inter-VM context switch latency - meets ETSI NFV ISG requirements. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar networking and embedded processing applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| LS1046ASN8T1A | Quad A72, 2 MB L2, dual 10 GbE, 3× PCIe Gen3, SEC v3.4 | Higher core count and clock frequency than LS1026A; same package and pinout | Select for applications needing >25 K CoreMarks® and full 10 GbE line-rate crypto offload. |
| LS1023ASN7PQA | Dual A53, 1 MB L2, single 10 GbE, 2× PCIe Gen2, SEC v3.2 | Lower power (5.5 W vs. 9.5 W), smaller thermal envelope, reduced SERDES lane count | Choose where 10 GbE is needed but packet processing load fits dual-core throughput and lower BOM cost is critical. |
Compared with LS1046ASN8T1A and LS1023ASN7PQA, the LS1026ASN8T1A delivers balanced performance: identical quad-A72 architecture and dual 10 GbE of LS1046A but with simplified SERDES configuration and lower max frequency - making it optimal for cost-sensitive 10 GbE edge gateways requiring deterministic latency over peak throughput.
Availability
LS1026ASN8T1A is available at Aetrix Electronics and suitable for enterprise routers, network-attached storage, and security appliances requiring stable component supply, long-term lifecycle support, and traceable sourcing from authorized channels.
Supply support for LS1026ASN8T1A includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
NXP Semiconductors is a global semiconductor company headquartered in Eindhoven, Netherlands, specializing in secure connectivity solutions for automotive, industrial, and communications markets.
The QorIQ LS1026A belongs to NXP's Layerscape family of ARM-based communication processors - designed specifically for scalable, software-compatible edge networking and secure infrastructure applications demanding hardware-accelerated packet processing.
FAQ
What is the maximum operating frequency of the LS1026ASN8T1A?
The LS1026ASN8T1A operates at up to 1.5 GHz across all four ARM Cortex-A72 cores under thermal specification. This frequency is validated for continuous operation at junction temperatures ≤105°C with convection-cooled heatsink design. The LS1026ASN8T1A achieves 32,000+ CoreMarks® at this speed, confirming deterministic performance for real-time packet processing tasks.
Does the LS1026ASN8T1A support DDR4 memory with ECC?
Yes, the LS1026ASN8T1A integrates a dual-channel DDR4 memory controller supporting ECC (Error-Correcting Code) on both channels. It validates DDR4-2400 UDIMMs with x8 or x16 organization and requires external DRAM chips with on-die ECC or system-level ECC implementation. This capability is essential for carrier-grade reliability in telecom and industrial control applications using LS1026ASN8T1A.
Is the LS1026ASN8T1A pin-compatible with the LS1046A?
Yes, the LS1026ASN8T1A is fully pin-compatible with the LS1046ASN8T1A in the 23 mm × 23 mm FC-BGA package. Both share identical ball mapping, power sequencing, and I/O voltage requirements. This allows hardware reuse across performance tiers - designers can upgrade from LS1026ASN8T1A to LS1046ASN8T1A without PCB revision, provided thermal and power delivery margins accommodate the higher 10 W TDP.
What Ethernet PHY interfaces does the LS1026ASN8T1A natively support?
The LS1026ASN8T1A provides native electrical interfaces for two 10 GbE SFI/XFI, one 2.5 GbE SGMII, and four 1 GbE RGMII ports - all implemented in its 8-lane 10 GHz SERDES. It does not integrate analog PHY circuitry; external 10GBASE-KR, SFP+, or QSFP+ PHYs must be used. The LS1026ASN8T1A's MAC layer is IEEE 802.3bj/compliant and supports KR/KR4 autonegotiation.
Can the LS1026ASN8T1A run real-time operating systems like FreeRTOS or Zephyr?
Yes, the LS1026ASN8T1A supports FreeRTOS, Zephyr, and other RTOSes through ARM Cortex-A72 exception model and TrustZone memory protection. NXP provides Board Support Packages (BSPs) for Zephyr v3.2+ with drivers for UART, I²C, GPIO, and watchdog - though full packet acceleration features require Linux-based SDKs. For hard real-time determinism, LS1026ASN8T1A is typically paired with a companion microcontroller.
LS1026ASN8T1A Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Package/Case:
- 780-FBGA, FCBGA
- Series:
- QorIQ® Layerscape
- Packaging:
- Tray
- Product Status:
- Active
- Core Processor:
- ARM® Cortex®-A72
- Number of Cores/Bus Width:
- 2 Core, 64-Bit
- Speed:
- 1.8GHz
- Co-Processors/DSP:
- -
- RAM Controllers:
- DDR4
- Graphics Acceleration:
- -
- Display & Interface Controllers:
- -
- Ethernet:
- 10GbE (2), 2.5GbE (1), 1GbE (4)
- SATA:
- SATA 6Gbps (1)
- USB:
- USB 3.0 (3) + PHY
- Voltage - I/O:
- -
- Operating Temperature:
- 0°C ~ 105°C
- Grade:
- -
- Qualification:
- -
- Security Features:
- Secure Boot, TrustZone®
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 780-FCPBGA (23x23)
- Additional Interfaces:
- -
LS1026ASN8T1A FAQ
1.How can I place an order for LS1026ASN8T1A through Aetrix?
Please submit a Request for Quotation (RFQ) for LS1026ASN8T1A on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LS1026ASN8T1A reliable?
The price and inventory of LS1026ASN8T1A are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LS1026ASN8T1A is usually 5 days.
3.What payment methods are accepted for LS1026ASN8T1A?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LS1026ASN8T1A transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LS1026ASN8T1A?
LS1026ASN8T1A orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LS1026ASN8T1A order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LS1026ASN8T1A?
For technical support, including LS1026ASN8T1A datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LS1026ASN8T1A requirements.
6.How does Aetrix verify that LS1026ASN8T1A is sourced from the original manufacturer or authorized distributors?
All LS1026ASN8T1A products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LS1026ASN8T1A meets industry standards.
7.What is the process for return or replacement of LS1026ASN8T1A?
All LS1026ASN8T1A units undergo pre-shipment inspection (PSI). If there is an issue with LS1026ASN8T1A, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LS1026ASN8T1A part is unused and in its original packaging.
Return procedure for LS1026ASN8T1A:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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