NXP Semiconductors LS1026AXN8P1A
- Part No.:
- LS1026AXN8P1A
- Manufacturer:
- NXP Semiconductors
- Category:
- Microprocessors
- Package:
- 780-FBGA, FCBGA
- Datasheet:
-
LS1026AXN8P1A.pdf
- Description:
- IC MPU QORIQ 1.4GHZ 780FCPBGA
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
LS1026AXN8P1A from NXP is a quad-core 64-bit ARM Cortex-A72 processor with integrated packet processing acceleration, 10 GbE dual-port MAC, PCIe Gen3 x4/x2/x1 controllers, SATA 3.0, USB 3.0, and DDR4 memory controller - deployed in enterprise routers, network-attached storage, and security appliances.
For engineers reviewing the LS1026AXN8P1A datasheet, LS1026AXN8P1A pinout, LS1026AXN8P1A application, or LS1026AXN8P1A equivalent, key selection criteria include CoreMark performance (>32,000), thermal envelope (<10 W at 1.2 GHz), hardware virtualization support, TrustZone-enabled secure boot, and pin compatibility with LS1023A/LS1043A/LS1088A for scalable 64-bit ARM designs.
Technical Context
The LS1026AXN8P1A implements four coherent ARM Cortex-A72 cores with 2 MB shared L2 cache and CCI-400 interconnect, supporting 64-bit execution and hardware virtualization extensions. It integrates a dedicated packet processing engine for parsing, classification, queue management, and buffer management - offloading CPU cycles from networking data paths.
Its I/O subsystem includes dual 10 GbE MACs (XFI/SGMII), one 2.5 GbE MAC, four 1 GbE MACs, three PCIe Gen3 controllers (x4/x2/x1), three USB 3.0 PHYs, SATA 3.0, QuadSPI, SD/eMMC, and multiple UART/I²C/SPI interfaces - all managed via IO MMUs and a unified power management unit.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Cores | Quad 64-bit ARM Cortex-A72 - enables concurrent high-throughput control-plane and data-plane tasks in routing/firewalling applications. |
| L2 Cache | 2 MB shared - reduces memory latency for packet buffering and flow table lookups in real-time forwarding. |
| CoreMark | >32,000 - validates deterministic multi-threaded CPU performance for embedded Linux-based network OS stacks. |
| TDP | <10 W at 1.2 GHz - supports convection-cooled industrial and carrier-grade board designs without active cooling. |
| Ethernet | Dual 10 GbE + 1×2.5 GbE + 4×1 GbE - provides flexible uplink/downlink aggregation and service isolation in vCPE and gateway platforms. |
| PCIe | Three Gen3 controllers (x4/x2/x1) - enables direct attachment of NICs, accelerators, or NVMe SSDs without bridge chips. |
| Security | Integrated SEC + ARM TrustZone - delivers hardware-accelerated IPsec/SSL/DTLS and secure boot with tamper detection. |
Pinout & Package
LS1026AXN8P1A is housed in a 23 mm × 23 mm, 621-ball FC-BGA package (RoHS-compliant, Pb-free). Ball pitch is 0.8 mm; package height is 2.31 mm max. Thermal pad on underside requires solder paste stencil design per NXP AN5097.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| A1–A12, B1–B12, etc. (621-ball grid) | DDR4 DQ/DQS/CK/CA, PCIe Rx/Tx, 10G SGMII/XFI, USB3 TX/RX, SATA TX/RX, QSPI, I²C, UART, JTAG | Ball-mapped to high-speed SerDes lanes, memory buses, and peripheral interfaces - requires controlled-impedance PCB stackup and length-matched routing per NXP LS1026A Hardware Design Guide. |
| VDD_DDR, VDD_SOC, VDD_USB, etc. | Power domains | Eight independent voltage rails - mandates sequencing per NXP LS1026A Power Sequencing Specification (VDD_SOC powers cores; VDD_DDR powers memory controller). |
| GND, VSS | Reference planes | 228 ground balls - critical for signal integrity and EMI suppression in 10 GbE and PCIe Gen3 layouts. |
| TPM_CLK, TRST_B, TDI, TDO, TMS, TCK | JTAG debug interface | IEEE 1149.1-compliant boundary scan and core debug - required for boot firmware validation and low-level bring-up. |
Key Features
| Feature | Design Value |
|---|---|
| Hardware Packet Processing Engine | Offloads classification, scheduling, shaping, and buffer management - frees A72 cores for application-layer services like DPI or TLS termination. |
| Integrated Security Engine (SEC) | Accelerates IPsec ESP/AH, SSL/TLS record layer, IKEv2, and RAID-5 XOR - achieves line-rate crypto throughput at 10 GbE. |
| ARM TrustZone + QorIQ Trust Architecture | Enables secure boot chain, isolated secure world execution, and tamper-resistant key storage - meets FIPS 140-2 Level 3 readiness requirements. |
| PCIe Gen3 x4/x2/x1 Controllers | Three independent root complexes - supports hot-plug NVMe storage, FPGA co-processing cards, and multi-function NICs without external switches. |
| DDR4 Memory Controller | Supports dual-channel 64-bit DDR4-2400 - delivers >34 GB/s memory bandwidth for deep packet inspection and flow table caching. |
Applications
| Enterprise Routers | Network-Attached Storage |
|---|---|
Use Scenario: High-density branch office edge routing with BGP, OSPF, and stateful firewalling. IC Role / Device Role / Timing Role: Main application processor executing Linux-based routing stack and managing dual 10 GbE uplinks. Use Value: Quad A72 cores + packet engine enable simultaneous control-plane routing and data-plane forwarding at line rate without software bottlenecks. | Use Scenario: Multi-bay NAS appliance with hardware-accelerated RAID 5/6 and iSCSI target offload. IC Role / Device Role / Timing Role: System-on-chip host controller interfacing SATA 3.0 drives, PCIe NVMe SSDs, and 10 GbE front-end. Use Value: Integrated SEC performs XOR acceleration for RAID 5, while dual 10 GbE ports sustain >1.8 GB/s file transfer throughput. |
| Security Appliances | vCPE Platforms |
Use Scenario: Unified threat management (UTM) device performing deep packet inspection, intrusion prevention, and SSL decryption. IC Role / Device Role / Timing Role: Primary SoC running Snort/Suricata with hardware-assisted crypto and flow classification. Use Value: Packet engine classifies flows before crypto offload, enabling full TLS 1.3 decryption at 10 GbE without CPU saturation. | Use Scenario: Carrier-deployed virtual CPE hosting multiple VNFs (firewall, router, WAN optimizer) on single hardware. IC Role / Device Role / Timing Role: Virtualization-capable host SoC with hardware-enforced VM isolation and SR-IOV-capable PCIe endpoints. Use Value: ARM virtualization extensions and IO MMUs allow strict resource partitioning across VNFs while maintaining sub-50 µs interrupt latency. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar networking and embedded processing applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| NXP LS1046AXN8P1A | Quad A72, 2 MB L2, dual 10 GbE, 3×PCIe Gen3 - higher CoreMark and thermal headroom than LS1026A. | Targeted at higher-bandwidth routing and security use cases requiring >32K CoreMark and full 10 GbE line rate. | Select when needing maximum packet processing throughput and PCIe Gen3 x4 for accelerator card integration. |
| NXP LS1023AXN7P1A | Dual A53, 1 MB L2, single 10 GbE, 2×PCIe Gen2 - lower power (6 W), smaller die, no hardware virtualization. | Suitable for cost-sensitive edge gateways and industrial IoT controllers where 10 GbE is optional and virtualization not required. | Choose for lower-power deployments with reduced packet throughput demands and simpler software stack requirements. |
Compared with LS1046AXN8P1A and LS1023AXN7P1A, the LS1026AXN8P1A offers balanced performance (quad A72, dual 10 GbE, PCIe Gen3) at mid-tier power (≤10 W), making it optimal for space-constrained 1U appliances needing both scalability and thermal efficiency - unlike the higher-power LS1046A or lower-feature LS1023A.
Availability
LS1026AXN8P1A is available at Aetrix Electronics and suitable for enterprise routers, network-attached storage, and security appliances requiring stable component supply across extended product lifecycles.
Supply support for LS1026AXN8P1A includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
NXP Semiconductors is a global semiconductor company headquartered in Eindhoven, Netherlands, specializing in secure connectivity solutions for automotive, industrial, and networking markets.
The LS1026AXN8P1A belongs to NXP's QorIQ Layerscape family - designed specifically for high-performance, power-efficient embedded networking and infrastructure applications demanding ARM-based scalability and hardware-accelerated packet processing.
FAQ
What is the maximum DDR4 speed supported by LS1026AXN8P1A?
The LS1026AXN8P1A supports DDR4-2400 (1200 MHz) across two 64-bit channels. This delivers up to 34.1 GB/s theoretical bandwidth, sufficient for high-throughput packet buffering and flow table storage in routing and security applications. The memory controller includes ECC support and configurable timing parameters aligned with JEDEC DDR4 standards.
Does LS1026AXN8P1A support hardware virtualization for VNF deployment?
Yes, LS1026AXN8P1A includes ARMv8 virtualization extensions and hardware-enforced VM isolation via TrustZone. It supports KVM-based virtualization on Linux, enabling concurrent VNFs such as firewalls and routers with strict resource partitioning - validated in NXP's LS1026A vCPE reference design using OpenStack and DPDK.
What Ethernet interfaces are integrated into LS1026AXN8P1A?
LS1026AXN8P1A integrates dual 10 GbE MACs (supporting XFI and Quad SGMII modes), one 2.5 GbE MAC, and four 1 GbE MACs. All Ethernet controllers support IEEE 1588v2 timestamping, jumbo frames, and hardware checksum offload - essential for time-sensitive networking and high-throughput storage protocols.
Is LS1026AXN8P1A pin-compatible with other QorIQ processors?
Yes, LS1026AXN8P1A is pin-compatible with LS1023A, LS1043A, and LS1088A SoCs in the same 23 mm × 23 mm FC-BGA package. This allows hardware reuse across dual-A53, quad-A53, and quad-A72 product tiers - verified in NXP's Hardware Compatibility Matrix Rev. 3.2 for mechanical and electrical footprint alignment.
What security features does LS1026AXN8P1A provide for secure boot and runtime protection?
LS1026AXN8P1A implements secure boot via immutable ROM code, encrypted eFUSE key storage, and TrustZone-managed secure world execution. It supports hardware-accelerated AES-GCM, SHA-256, RSA-4096, and ECC-384 through its integrated Security Engine (SEC), meeting NIST SP 800-131A and FIPS 140-2 Level 3 readiness requirements.
LS1026AXN8P1A Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Package/Case:
- 780-FBGA, FCBGA
- Series:
- QorIQ® Layerscape
- Packaging:
- Tray
- Product Status:
- Active
- Core Processor:
- ARM® Cortex®-A72
- Number of Cores/Bus Width:
- 2 Core, 64-Bit
- Speed:
- 1.4GHz
- Co-Processors/DSP:
- -
- RAM Controllers:
- DDR4
- Graphics Acceleration:
- -
- Display & Interface Controllers:
- -
- Ethernet:
- 10GbE (2), 2.5GbE (1), 1GbE (4)
- SATA:
- SATA 6Gbps (1)
- USB:
- USB 3.0 (3) + PHY
- Voltage - I/O:
- -
- Operating Temperature:
- -40°C ~ 105°C
- Grade:
- -
- Qualification:
- -
- Security Features:
- Secure Boot, TrustZone®
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 780-FCPBGA (23x23)
- Additional Interfaces:
- -
LS1026AXN8P1A FAQ
1.How can I place an order for LS1026AXN8P1A through Aetrix?
Please submit a Request for Quotation (RFQ) for LS1026AXN8P1A on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LS1026AXN8P1A reliable?
The price and inventory of LS1026AXN8P1A are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LS1026AXN8P1A is usually 5 days.
3.What payment methods are accepted for LS1026AXN8P1A?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LS1026AXN8P1A transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LS1026AXN8P1A?
LS1026AXN8P1A orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LS1026AXN8P1A order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LS1026AXN8P1A?
For technical support, including LS1026AXN8P1A datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LS1026AXN8P1A requirements.
6.How does Aetrix verify that LS1026AXN8P1A is sourced from the original manufacturer or authorized distributors?
All LS1026AXN8P1A products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LS1026AXN8P1A meets industry standards.
7.What is the process for return or replacement of LS1026AXN8P1A?
All LS1026AXN8P1A units undergo pre-shipment inspection (PSI). If there is an issue with LS1026AXN8P1A, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LS1026AXN8P1A part is unused and in its original packaging.
Return procedure for LS1026AXN8P1A:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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