NXP Semiconductors LS1028ASN7PQA

Overview

LS1028ASN7PQA from NXP Semiconductors is a dual-core 64-bit ARM Cortex-A72 system-on-chip (SoC) designed for industrial gateways and TSN-enabled networking edge devices. It operates up to 1.5 GHz, integrates 1 MB ECC-protected L2 cache, DDR4/DDR3L memory controller with ECC, and four SerDes lanes supporting PCIe 3.0, SATA 6 Gbit/s, and up to four 2.5G-SGMII Ethernet switch ports.

For engineers reviewing the LS1028ASN7PQA datasheet, LS1028ASN7PQA pinout, LS1028ASN7PQA application, or LS1028ASN7PQA equivalent, key selection considerations include TSN-capable Ethernet switching, dual 2.5G/1G SerDes-based ENETC interfaces, Arm TrustZone security, and FC-PBGA 448-ball package compatibility with industrial thermal and power sequencing requirements.

Technical Context

The LS1028ASN7PQA implements a Cache Coherent Interconnect (CCI-400) at up to 400 MHz to maintain coherency between its two Cortex-A72 cores and shared 1 MB L2 cache. Its high-speed interface subsystem includes four configurable SerDes lanes supporting mixed protocols - two PCIe 3.0 controllers, one SATA 3 controller, and flexible SGMII/QSGMII/USXGMII configurations for up to four 2.5G Ethernet switch ports or one 10G-SXGMII port.

It integrates a TSN-capable Ethernet switch with hardware timestamping per IEEE 1588 and IEEE 1722 support, plus an independent ENETC controller with RGMII and 1G/2.5G SerDes-based TSN interfaces. The SoC also embeds dual CAN-FD modules, eight I²C controllers, six LPUARTs, and a DisplayPort 1.3/eDP 1.4 interface capable of 4Kp60 output.

Key Specifications

Pinout & Package

LS1028ASN7PQA is housed in a 17 mm × 17 mm FC-PBGA package with 448 solder balls. Pin functions are organized across DDR, I²C, XSPI, eSDHC, USB, DP/eDP, SerDes, Ethernet, and power domains as defined in the official NXP LS1028A/LS1018A Data Sheet Rev. 0 (Dec 2019).

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar high-performance industrial SoC applications.

Compared with LS1043ASN7QQB and i.MX8MQMEK, LS1028ASN7PQA uniquely balances dual high-frequency Cortex-A72 cores, integrated TSN switch, 4K display pipeline, and SerDes protocol agility - making it optimal for compact, secure, time-deterministic edge gateways requiring both compute and rich I/O.

Availability

LS1028ASN7PQA is available at Aetrix Electronics and suitable for industrial gateways, TSN-enabled networking equipment, and secure edge routers requiring stable component supply, long-term lifecycle support, and traceable sourcing for industrial certifications.

Supply support for LS1028ASN7PQA includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

NXP Semiconductors is a global semiconductor leader specializing in secure connectivity solutions for automotive, industrial, and IoT markets, with deep expertise in Arm-based processing and embedded security.

The LS1028ASN7PQA belongs to NXP's QorIQ LS1028A family - engineered specifically for deterministic, secure, and power-efficient edge computing in industrial networking and gateway applications requiring TSN, TrustZone, and rich peripheral integration.

FAQ

What is the maximum operating frequency of the LS1028ASN7PQA?

The LS1028ASN7PQA features two ARM Cortex-A72 cores rated for up to 1.5 GHz operation under recommended thermal and voltage conditions. This frequency is sustained across both cores simultaneously in typical industrial ambient temperatures (–40°C to 105°C junction) with proper power delivery and cooling. The LS1028ASN7PQA datasheet specifies this as the guaranteed maximum frequency for commercial and industrial temperature grades.

Does LS1028ASN7PQA support ECC memory?

Yes, LS1028ASN7PQA includes a 32-bit DDR3L/DDR4 memory controller with full ECC support for both single-bit correction and double-bit detection. ECC is implemented in hardware across the entire memory address space and is enabled by default during boot unless explicitly disabled in the RCW (Reset Configuration Word). This feature enhances reliability in mission-critical industrial applications.

What Ethernet capabilities does LS1028ASN7PQA provide for TSN applications?

LS1028ASN7PQA integrates a hardware TSN switch supporting IEEE 802.1AS (time sync), 802.1Qbv (time-aware shaper), and 802.1Qbu (frame preemption), plus a separate ENETC controller with RGMII and 1G/2.5G SerDes-based TSN interfaces. Both support hardware timestamping with sub-microsecond resolution, enabling deterministic networking without software intervention or external timing ICs.

Is LS1028ASN7PQA pin-compatible with other QorIQ LS series SoCs?

No, LS1028ASN7PQA is not pin-compatible with LS1043A, LS1021A, or LS1088A SoCs. Its FC-PBGA 448-ball footprint, power domain assignments (e.g., G1VDD, OVDD), and SerDes lane mapping are unique to the LS1028A/LS1018A family. Migration between families requires PCB redesign and layout validation per NXP's hardware design guidelines.

What display interfaces are supported by LS1028ASN7PQA?

LS1028ASN7PQA integrates a DisplayPort 1.3 and eDP 1.4 compliant PHY with support for HBR2 link rates (5.4 Gbit/s) and resolutions up to 4Kp60. It includes four main link lanes (DP_LANE0–3), AUX channel, HPD, and REFCLK signals - enabling direct connection to eDP panels or DP monitors without external level shifters or retimers.