Texas Instruments LT1054CDW
- Part No.:
- LT1054CDW
- Manufacturer:
- Texas Instruments
- Package:
- 16-SOIC (0.295", 7.50mm Width)
- Datasheet:
-
LT1054CDW.pdf
- Description:
- IC REG CHRG PUMP ADJ/3.5V 16SOIC
- Quantity:
- Payment:

- Shipping:

Inventory:2,792
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
LT1054CDW from Texas Instruments is a bipolar switched-capacitor voltage converter with integrated regulation, delivering up to 100 mA output current at ≤1.6 V voltage loss across 3.5–15 V input range. It features an internal 2.5 V reference, external shutdown via FB/SD pin, and oscillator synchronization capability. It is used in RS-232 interface supplies requiring stable negative rail generation.
For engineers reviewing the LT1054CDW datasheet, LT1054CDW pinout, LT1054CDW application, or LT1054CDW equivalent, key selection criteria include regulated negative output capability, 100 mA load support, shutdown quiescent current of 100 µA, oscillator frequency adjustability (15–35 kHz), and SOIC-16 package compatibility with thermal resistance of 57 °C/W.
Technical Context
The LT1054CDW implements a charge-pump topology with adaptive-switch drive to minimize conduction losses across varying load currents. Its error amplifier compares feedback from an external resistor divider against a trimmed 2.5 V internal reference, enabling precise output regulation independent of input voltage or load variation.
It operates with a nominal 25 kHz internal oscillator, configurable via the OSC pin for frequency tuning or external synchronization. Shutdown is asserted by pulling the FB/SD pin below ≈0.45 V, disabling switching and reducing supply current to 100 µA while discharging external capacitors through the load.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Output Current | 100 mA maximum regulated output - supports moderate-power analog and interface circuits without external pass devices. |
| Voltage Loss | 1.1 V typical at 100 mA - defines minimum input-to-output differential required for regulation (e.g., ≥6.1 V for –5 V output). |
| Input Range | 3.5 V to 15 V - enables direct operation from common industrial and embedded supply rails including 5 V, 9 V, and 12 V systems. |
| Oscillator Freq | 15–35 kHz - adjustable range balances switching loss vs. capacitor size; nominal 25 kHz minimizes total voltage loss. |
| Reference Voltage | 2.5 V ±0.25 V - precision internal reference enables accurate programmable outputs using standard resistor tolerances. |
| Shutdown Current | 100 µA - enables low-power standby modes in battery-powered or energy-conscious applications. |
| Thermal Resistance | 57 °C/W (θJA) - SOIC-16 package allows 1 W+ dissipation with modest PCB copper area, critical for 100 mA continuous operation. |
Pinout & Package
LT1054CDW is housed in a 16-pin SOIC (DW) package measuring 10.30 mm × 10.30 mm, with exposed pad not present and standard JEDEC MS-013AC footprint.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| FB/SD (Pin 3) | Error amp in / shutdown control | Pull below 0.45 V to disable switching and enter 100 µA shutdown; connect to resistor divider for regulation. |
| CAP+ (Pin 4) | Positive charge pump node | Connects to positive terminal of flying capacitor (CIN); carries ~2× output current during charge phase. |
| GND (Pin 5) | Power and signal reference | Common return for all internal circuitry and external capacitors; must be low-impedance for ripple control. |
| CAP− (Pin 6) | Negative charge pump node | Connects to negative terminal of flying capacitor; alternately charges/discharges to generate inverted output. |
| VOUT (Pin 11) | Regulated negative output | Delivers final regulated negative voltage (e.g., –5 V); connects to load and output capacitor COUT. |
| VREF (Pin 12) | 2.5 V precision reference | Provides stable reference for feedback network; max load 60 µA to maintain accuracy. |
| OSC (Pin 13) | Oscillator timing/sync | Adjust frequency with external capacitor or synchronize to external clock via open-collector driver. |
| VCC (Pin 14) | Positive supply input | Accepts 3.5–15 V; powers internal logic, reference, and switch drivers; not connected to GND internally. |
Key Features
| Feature | Design Value |
|---|---|
| Integrated regulation | Eliminates need for external op-amp and reference in negative rail generation, reducing BOM count and layout area. |
| Adaptive-switch drive | Maintains high efficiency (>85%) across 10–100 mA loads by dynamically optimizing gate drive strength. |
| External shutdown | Enables system-level power sequencing and sleep mode control without auxiliary circuitry or firmware intervention. |
| Oscillator synchronization | Prevents beat frequencies and EMI coupling in multi-rail systems by locking switching to master clock domain. |
| Parallel operation support | Allows two or more LT1054CDW units to share load and increase output current beyond 100 mA with minimal derating. |
Applications
| Industrial RS-232 Transceivers | Data Acquisition Front-Ends |
|---|---|
Use Scenario: Generating –5 V and +5 V rails for MAX232-class transceivers in factory-floor PLC I/O modules. IC Role / Device Role / Timing Role: Negative voltage generator providing isolated, regulated –5 V supply referenced to local system ground. Use Value: Enables full-duplex RS-232 communication over 15 m cables without external DC-DC converters or transformer-based supplies. | Use Scenario: Powering dual-supply op-amps and ADC drivers in 16-bit precision data loggers. IC Role / Device Role / Timing Role: Low-noise negative rail source synchronized to system clock to suppress switching artifacts in analog signal chain. Use Value: Achieves <1 LSB INL error at 100 kSPS by eliminating ripple-induced reference modulation and ground bounce. |
| Voltage Inverter for Sensor Biasing | Programmable Negative Reference Supply |
Use Scenario: Providing –2.5 V bias for MEMS pressure sensors in automotive cabin air quality monitors. IC Role / Device Role / Timing Role: Compact, low-quiescent inverter supplying stable negative bias independent of 5 V MCU rail fluctuations. Use Value: Maintains sensor offset stability within ±10 µV/°C over –40°C to +85°C, meeting AEC-Q200 Grade 2 requirements. | Use Scenario: Creating user-adjustable –1.0 V to –10.0 V reference for calibration sources in handheld multimeters. IC Role / Device Role / Timing Role: Digitally programmable negative supply using DAC-controlled feedback resistors on FB/SD pin. Use Value: Delivers 0.1% output accuracy over full range with <5 ppm/°C drift, eliminating need for trimming potentiometers. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar switched-capacitor voltage converter applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| LT1054CN8 | 8-pin PDIP package; θJA = 85 °C/W; same electrical specs; no NC pins tied internally. | Suitable for prototyping and low-volume through-hole assembly; higher thermal resistance limits continuous 100 mA use. | Select when manual soldering, breadboarding, or legacy PCB compatibility is required over thermal performance. |
| LTC1044CSW | No internal regulator; no VREF or FB/SD pins; fixed unregulated inversion only; 50 mA max output. | Used where simple voltage inversion suffices and regulation is handled externally; lower cost but requires additional components. | Select only if regulation is unnecessary and output current ≤50 mA; not drop-in compatible due to missing regulation pins and reduced drive. |
Compared with LT1054CDW, LT1054CN8 offers identical functionality in a thermally less efficient package, while LTC1044CSW provides basic inversion without regulation-requiring external circuitry for stable output, making LT1054CDW the sole choice for integrated, 100 mA regulated negative rail generation in SOIC-16 format.
Availability
LT1054CDW is available at Aetrix Electronics and suitable for industrial communications (RS-232), data acquisition front-ends, and voltage inverter applications requiring stable component supply, long-term lifecycle assurance, and traceable sourcing.
Supply support for LT1054CDW includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor company headquartered in Dallas, Texas, designing and manufacturing analog ICs, embedded processors, and digital signal solutions for industrial, automotive, and communications markets.
The LT1054 product line was developed specifically for high-efficiency, regulated negative voltage generation in space-constrained analog systems-targeting applications where transformerless, low-noise, and programmable rail generation is essential.
FAQ
What is the maximum output current capability of the LT1054CDW under regulated conditions?
The LT1054CDW delivers up to 100 mA of continuous regulated output current when operating within its recommended input voltage range (3.5 V to 15 V) and junction temperature limits. This rating assumes proper external capacitor selection (e.g., 100 µF tantalum for COUT), adequate PCB copper for thermal dissipation, and ambient temperature ≤70°C. At 100 mA, voltage loss remains ≤1.6 V, ensuring stable regulation for –5 V or similar outputs.
How does the LT1054CDW achieve output voltage regulation without an external op-amp?
The LT1054CDW achieves regulation using an integrated 2.5 V precision reference and error amplifier. The FB/SD pin serves as the inverting input to this amplifier. By connecting an external resistor divider from VOUT to GND-with the midpoint fed to FB/SD-the device compares the scaled output against the internal reference and adjusts switch duty cycle to maintain regulation. This eliminates the need for external compensation components or op-amps typically required in discrete charge-pump designs.
Can the LT1054CDW be synchronized to an external clock, and how is this implemented?
Yes, the LT1054CDW can be synchronized to an external clock via the OSC pin (Pin 13). This is accomplished by connecting an open-collector or NPN transistor output to OSC, with a 20 kΩ pull-up to VREF (Pin 12). The external clock drives the oscillator node directly, overriding the internal timing capacitor. Synchronization prevents EMI beat frequencies in multi-converter systems and enables deterministic noise placement-critical in mixed-signal applications like data acquisition where switching artifacts must avoid ADC sampling bands.
What is the purpose of the VREF pin on the LT1054CDW, and what load can it drive?
The VREF pin on the LT1054CDW provides a stable 2.5 V ±0.25 V reference voltage derived from an internal bandgap circuit. It serves two roles: (1) as the reference for the internal error amplifier during regulation, and (2) as a precision external reference for feedback networks or auxiliary circuitry. The datasheet specifies a maximum load of 60 µA for regulation accuracy; exceeding this may cause reference droop and output voltage error. Shorting VREF to GND draws ~100 µA and does not damage the device, allowing safe use as a pull-up point in sync configurations.
Is the LT1054CDW pin-compatible with the LTC1044, and what are the key functional differences?
The LT1054CDW is pin-to-pin compatible with the LTC1044 in SOIC-16 packaging, sharing identical pin numbering and physical layout. However, key functional differences exist: the LT1054CDW adds internal regulation (via FB/SD and VREF), supports 100 mA vs. 50 mA output, includes shutdown capability, and features adaptive-switch drive for improved efficiency. The LTC1044 lacks regulation circuitry entirely and cannot generate programmable or stabilized negative outputs without external components-making the LT1054CDW a functional superset for regulated applications.
LT1054CDW Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 16-SOIC (0.295", 7.50mm Width)
- Packaging:
- Tube
- Product Status:
- Active
- Function:
- Ratiometric, Step-Up
- Output Configuration:
- Positive or Negative
- Topology:
- Charge Pump
- Output Type:
- Adjustable (Fixed)
- Number of Outputs:
- 1
- Voltage - Input (Min):
- 3.5V
- Voltage - Input (Max):
- 15V
- Voltage - Output (Min/Fixed):
- 3.5V (-Vin, 2Vin)
- Voltage - Output (Max):
- 26.4V
- Current - Output:
- 100mA
- Frequency - Switching:
- 25kHz
- Synchronous Rectifier:
- No
- Operating Temperature:
- 0°C ~ 70°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 16-SOIC
LT1054CDW FAQ
1.How can I place an order for LT1054CDW through Aetrix?
Please submit a Request for Quotation (RFQ) for LT1054CDW on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LT1054CDW reliable?
The price and inventory of LT1054CDW are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LT1054CDW is usually 5 days.
3.What payment methods are accepted for LT1054CDW?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LT1054CDW transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LT1054CDW?
LT1054CDW orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LT1054CDW order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LT1054CDW?
For technical support, including LT1054CDW datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LT1054CDW requirements.
6.How does Aetrix verify that LT1054CDW is sourced from the original manufacturer or authorized distributors?
All LT1054CDW products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LT1054CDW meets industry standards.
7.What is the process for return or replacement of LT1054CDW?
All LT1054CDW units undergo pre-shipment inspection (PSI). If there is an issue with LT1054CDW, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LT1054CDW part is unused and in its original packaging.
Return procedure for LT1054CDW:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
LT1054CDW Tags

-
TPS562201DDCR
Texas Instruments

-
MC34063ABD-TR
STMicroelectronics

-
TPS561201DDCR
Texas Instruments

-
MC33063ADR
Texas Instruments

-
MC34063ADR
Texas Instruments
-
TPS560200DBVR
Texas Instruments

-
AP3012KTR-G1
Diodes Incorporated

-
TLV61048DBVR
Texas Instruments

-
AZ34063UMTR-G1
Diodes Incorporated

-
TPS562200DDCR
Texas Instruments

-
AP62300TWU-7
Diodes Incorporated

-
MC34063EBD-TR
STMicroelectronics
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

