My Inquiry
My Account
Texas Instruments LT1054CDWRG4
- Part No.:
- LT1054CDWRG4
- Manufacturer:
- Texas Instruments
- Package:
- 16-SOIC (0.295", 7.50mm Width)
- Datasheet:
-
LT1054CDWRG4.pdf
- Description:
- IC REG CHRG PUMP ADJ/3.5V 16SOIC
- Quantity:
- Payment:
- Shipping:
Inventory:3,818
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
LT1054CDWRG4 from Texas Instruments is a bipolar switched-capacitor voltage converter with integrated regulation, configured as a negative voltage inverter/regulator. It delivers 100 mA output current with 1.1 V typical voltage loss at full load, operates from 3.5 V to 15 V input, and features an internal 2.5 V reference and shutdown control via FB/SD pin - used in RS-232 interface power supplies and data acquisition systems.
For engineers reviewing the LT1054CDWRG4 datasheet, LT1054CDWRG4 pinout, LT1054CDWRG4 application, or LT1054CDWRG4 equivalent, key selection considerations include regulated −5 V output capability, external resistor-based feedback programming, oscillator synchronization support, and SOIC-16 package thermal performance (RθJA = 57 °C/W).
Technical Context
The LT1054CDWRG4 implements a charge-pump topology with adaptive-switch drive to minimize conduction and switching losses across 10–100 mA loads. Its internal error amplifier compares FB/SD voltage against a trimmed 2.5 V reference, enabling precise output regulation independent of input voltage and load variations.
Oscillator frequency is nominally 25 kHz and adjustable via external capacitor or synchronizable to an external clock on the OSC pin. Shutdown mode reduces supply current to 100 µA by grounding FB/SD, while internal switches discharge CIN and COUT during inactive states.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Output Current | 100 mA maximum regulated output - supports moderate-power analog and interface rails without external pass devices. |
| Voltage Loss | 1.1 V typical at 100 mA - defines minimum input-to-output differential required for regulation (e.g., ≥6.1 V for −5 V output). |
| Input Range | 3.5 V to 15 V - enables direct operation from common industrial and embedded supply rails including 5 V, 9 V, and 12 V. |
| Reference Voltage | 2.5 V ±0.1 V - stable internal reference used with external R1/R2 divider to set precise negative output voltages (e.g., −5 V, −12 V). |
| Oscillator Freq | 15–35 kHz - user-adjustable range balances ripple reduction (lower f) and switch-loss minimization (higher f); nominal 25 kHz optimized for efficiency. |
| Shutdown Current | 100 µA typical - enables low-power sleep modes in battery-operated or intermittent-use systems. |
| Thermal Resistance | RθJA = 57 °C/W (SOIC-16) - determines junction temperature rise under load; requires heatsinking or derating above ~350 mW dissipation. |
Pinout & Package
LT1054CDWRG4 is housed in a 16-pin SOIC (DW package), body size 10.30 mm × 10.30 mm, with exposed pad not electrically connected. Pin functions are validated per TI SLVS033G Rev G (2015).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| FB/SD (Pin 3) | Error amp in / shutdown control | Pull ≤0.45 V to enter 100 µA shutdown; connect to resistive divider for regulated output voltage setting. |
| CAP+ (Pin 4) | Positive charge pump node | Connects to positive terminal of flying capacitor (CIN); carries ~2× output current during charge phase. |
| GND (Pin 5) | Power ground reference | Common return for VCC, CAP−, and output load; must be low-impedance to minimize ripple and regulation error. |
| CAP− (Pin 6) | Negative charge pump node | Connects to negative terminal of flying capacitor; alternately charged/discharged to generate inverted output. |
| VOUT (Pin 11) | Regulated negative output | Delivers final regulated −VOUT; requires low-ESR COUT (e.g., 100 µF tantalum) for stable load transient response. |
| VREF (Pin 12) | 2.5 V precision reference | Provides stable bias for feedback network; max load current 60 µA to maintain accuracy. |
| OSC (Pin 13) | Oscillator control/sync | Accepts external capacitor for frequency tuning or open-collector signal for system-level clock synchronization. |
| VCC (Pin 14) | Positive supply input | Primary power source; must be decoupled with ≥10 µF low-ESR capacitor close to pin. |
Key Features
| Feature | Design Value |
|---|---|
| Integrated regulation | Eliminates need for external op-amp and reference in negative rail generation; achieves <50 mV load regulation over 10–100 mA. |
| Adaptive-switch drive | Optimizes gate drive strength dynamically to reduce conduction loss at light loads and switching loss at heavy loads. |
| External oscillator sync | Enables noise-sensitive applications to lock switching to system clock, avoiding beat frequencies and EMI peaks. |
| Parallel operation support | Multiple LT1054CDWRG4 units can share load current when outputs are tied together with small ballast resistors (e.g., 0.1 Ω). |
| Pin-to-pin compatibility | Direct replacement for LTC1044 and ICL7660 in SOIC-16 footprint, preserving layout while upgrading regulation and current capability. |
Applications
| Industrial RS-232 Transceivers | Data Acquisition Front-Ends |
|---|---|
Use Scenario: Powering ±12 V receiver inputs and driver stages in isolated serial communication modules operating from single 5 V or 12 V rails. IC Role / Device Role / Timing Role: Negative voltage generator providing regulated −12 V rail with <±25 mV line/load regulation, synchronized to system clock to suppress conducted EMI. Use Value: Enables full RS-232 compliance without discrete regulators or transformers; maintains signal integrity under varying bus loading. |
Use Scenario: Generating clean −5 V reference supply for 16-bit ADCs and instrumentation amplifiers in portable test equipment. IC Role / Device Role / Timing Role: Low-noise regulated negative rail source with shutdown control, decoupled via 2.2 µF ceramic + 100 µF tantalum output filter. Use Value: Reduces ADC offset drift by minimizing reference rail variation; 100 µA shutdown extends battery life between measurements. |
| Voltage-Inverting Sensor Interfaces | Programmable Logic Supply Rails |
Use Scenario: Biasing MEMS accelerometers and piezoelectric sensors requiring symmetric ±5 V excitation from unipolar 12 V supply. IC Role / Device Role / Timing Role: Precision inverter with external R1/R2 feedback (20 kΩ/102.6 kΩ) to deliver −5.00 V ±0.02 V at 50 mA. Use Value: Eliminates calibration drift caused by supply-dependent inversion ratio; reference TC compensation ensures <10 ppm/°C output drift. |
Use Scenario: Providing configurable negative bias for CPLD I/O banks and FPGA configuration memory in mixed-voltage digital systems. IC Role / Device Role / Timing Role: Programmable regulator supporting multiple output voltages (−3.3 V, −5 V) via jumper-selectable feedback resistors. Use Value: Simplifies BOM by consolidating multiple fixed regulators; shutdown pin allows dynamic rail disabling during low-power states. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar switched-capacitor voltage converter applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| LTC1044CSW#PBF | No internal reference or regulation; requires external op-amp for feedback; 50 mA max output; 12 kHz oscillator. | Suitable only for unregulated inversion; cannot achieve stable −5 V without added components; lower current limits dynamic range. | Select when cost sensitivity outweighs regulation need and load ≤50 mA; verify SOIC-16 footprint compatibility. |
| MAX680CPA+ | Fixed −5 V output (no feedback pins); 100 mA rated; no shutdown; oscillator not synchronizable; PDIP-8 only. | Plug-in replacement for basic inverter use cases but lacks programmability, shutdown, or SOIC-16 thermal performance. | Choose for legacy designs using PDIP-8; avoid where regulation adjustment, low-power sleep, or thermal margin are required. |
Compared with LTC1044CSW#PBF and MAX680CPA+, the LT1054CDWRG4 uniquely combines regulation, shutdown, oscillator sync, and SOIC-16 thermal capability - enabling higher integration, better stability, and lower system-level component count in space-constrained industrial designs.
Availability
LT1054CDWRG4 is available at Aetrix Electronics and suitable for industrial communications (RS-232), data acquisition front-ends, and voltage-inverting sensor interfaces requiring stable component supply, long-term lifecycle assurance, and traceable sourcing.
Supply support for LT1054CDWRG4 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor company specializing in analog and embedded processing technologies, with leadership in power management, signal chain, and high-reliability IC design.
The LT1054 product line was engineered to replace transformer- and inductor-based negative supplies with compact, efficient, and regulation-capable charge-pump solutions for industrial and instrumentation applications.
FAQ
What output voltage configurations does the LT1054CDWRG4 support?
The LT1054CDWRG4 supports unregulated voltage inversion (e.g., −VCC) and precisely regulated negative outputs such as −5 V or −12 V via external R1/R2 feedback resistors connected to FB/SD and VREF. Regulation accuracy is ±25 mV over line and load, with reference voltage trimmed to 2.5 V ±0.1 V. It does not support positive voltage doubling or non-inverting configurations.
How is shutdown implemented on the LT1054CDWRG4?
Shutdown on the LT1054CDWRG4 is activated by pulling the FB/SD pin (Pin 3) to ground or below 0.45 V, reducing quiescent current to 100 µA typical. During shutdown, internal switching halts and both CIN and COUT discharge through the load. A logic-level NPN transistor or open-collector gate can drive FB/SD; no external pull-up is required.
Can the LT1054CDWRG4 be synchronized to an external clock?
Yes, the LT1054CDWRG4's OSC pin (Pin 13) accepts external synchronization signals. An open-collector gate or NPN transistor can drive OSC low at the desired system clock frequency, with a 20 kΩ pull-up to VREF recommended. This avoids beat frequencies in noise-critical applications and enables deterministic EMI profiles without modifying internal oscillator components.
What capacitor types and values are recommended for LT1054CDWRG4 designs?
For LT1054CDWRG4, use low-ESR solid tantalum capacitors: 10 µF for CIN (CAP+/CAP− nodes) and 100 µF for COUT (VOUT-to-GND). A 0.002 µF ceramic capacitor (C1) must be placed from FB/SD to GND for loop stability. Avoid aluminum electrolytics for CIN due to high ESR-induced voltage loss; parallel COUT with 2.2 µF ceramic if ripple exceeds 20 mVPP.
Is the LT1054CDWRG4 pin-compatible with other charge-pump ICs?
Yes, the LT1054CDWRG4 in SOIC-16 (DW package) is pin-to-pin compatible with the LTC1044 and ICL7660 in the same footprint. However, LT1054CDWRG4 adds FB/SD, VREF, and OSC pins not present on those parts - unused pins must remain unconnected or grounded per TI recommendations. Electrical behavior differs significantly due to integrated regulation and higher current capability.
LT1054CDWRG4 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 16-SOIC (0.295", 7.50mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Discontinued at Digi-Key
- Function:
- Ratiometric, Step-Up
- Output Configuration:
- Positive or Negative
- Topology:
- Charge Pump
- Output Type:
- Adjustable (Fixed)
- Number of Outputs:
- 1
- Voltage - Input (Min):
- 3.5V
- Voltage - Input (Max):
- 15V
- Voltage - Output (Min/Fixed):
- 3.5V (-Vin, 2Vin)
- Voltage - Output (Max):
- 26.4V
- Current - Output:
- 100mA
- Frequency - Switching:
- 25kHz
- Synchronous Rectifier:
- No
- Operating Temperature:
- 0°C ~ 70°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 16-SOIC
LT1054CDWRG4 FAQ
1.How can I place an order for LT1054CDWRG4 through Aetrix?
Please submit a Request for Quotation (RFQ) for LT1054CDWRG4 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LT1054CDWRG4 reliable?
The price and inventory of LT1054CDWRG4 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LT1054CDWRG4 is usually 5 days.
3.What payment methods are accepted for LT1054CDWRG4?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LT1054CDWRG4 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LT1054CDWRG4?
LT1054CDWRG4 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LT1054CDWRG4 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LT1054CDWRG4?
For technical support, including LT1054CDWRG4 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LT1054CDWRG4 requirements.
6.How does Aetrix verify that LT1054CDWRG4 is sourced from the original manufacturer or authorized distributors?
All LT1054CDWRG4 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LT1054CDWRG4 meets industry standards.
7.What is the process for return or replacement of LT1054CDWRG4?
All LT1054CDWRG4 units undergo pre-shipment inspection (PSI). If there is an issue with LT1054CDWRG4, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LT1054CDWRG4 part is unused and in its original packaging.
Return procedure for LT1054CDWRG4:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
LT1054CDWRG4 Tags
-
TPS562201DDCR
Texas Instruments
-
MC34063ABD-TR
STMicroelectronics
-
TPS561201DDCR
Texas Instruments
-
MC33063ADR
Texas Instruments
-
MC34063ADR
Texas Instruments
-
TPS560200DBVR
Texas Instruments
-
AP3012KTR-G1
Diodes Incorporated
-
TLV61048DBVR
Texas Instruments
-
AZ34063UMTR-G1
Diodes Incorporated
-
TPS562200DDCR
Texas Instruments
-
AP62300TWU-7
Diodes Incorporated
-
MC34063EBD-TR
STMicroelectronics
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…
