My Inquiry
My Account
Texas Instruments LT1054IDWG4
- Part No.:
- LT1054IDWG4
- Manufacturer:
- Texas Instruments
- Package:
- 16-SOIC (0.295", 7.50mm Width)
- Datasheet:
-
LT1054IDWG4.pdf
- Description:
- IC REG CHRG PUMP ADJ/3.5V 16SOIC
- Quantity:
- Payment:
- Shipping:
Inventory:2,021
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
LT1054IDWG4 from Texas Instruments is a bipolar switched-capacitor voltage converter with integrated regulation, designed as a negative voltage generator or charge-pump inverter. It delivers up to 100 mA output current with typical voltage loss of 1.1 V at full load, operates from 3.5 V to 15 V input, and provides a 2.5 V internal reference for precision feedback. It is used in RS-232 interface supplies requiring regulated –5 V rails.
For engineers reviewing the LT1054IDWG4 datasheet, LT1054IDWG4 pinout, LT1054IDWG4 application, or LT1054IDWG4 equivalent, key selection considerations include its regulated negative output capability, shutdown control via FB/SD pin, external oscillator synchronization, adaptive-switch drive for efficiency across load range, and compatibility with standard tantalum capacitor networks (CIN = 10 μF, COUT = 100 μF).
Technical Context
The LT1054IDWG4 implements a four-phase switched-capacitor topology with PNP-based charge-transfer switches and an internal error amplifier referenced to a trimmed 2.5 V bandgap. Its adaptive-switch drive dynamically adjusts conduction timing to minimize losses across 10 mA–100 mA loads. Regulation is achieved by comparing FB/SD voltage against VREF using an internal op-amp driving the output switch.
Shutdown is activated by pulling FB/SD below ≈0.45 V, disabling switching and reducing supply current to 100 μA while discharging CIN and COUT through the load. The 25 kHz nominal oscillator uses internal ±7 µA current sources charging a ~150 pF timing capacitor; frequency can be adjusted or synchronized externally via the OSC pin.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Output Current | 100 mA maximum regulated output - supports industrial RS-232 transceivers and analog front-end biasing. |
| Voltage Loss | 1.1 V typical at 100 mA - defines minimum input headroom needed for target output (e.g., 6.1 V min for –5 V out). |
| Input Range | 3.5 V to 15 V - enables direct use from 5 V or 12 V system rails without pre-regulation. |
| Oscillator Freq | 15–35 kHz - adjustable via OSC pin; optimized for minimal voltage loss in standard capacitor configurations. |
| Reference Voltage | 2.5 V ±0.1 V - stable internal reference enabling precise resistor-divider programming of regulated outputs (e.g., –5 V with R1=20 kΩ, R2=102.5 kΩ). |
| Shutdown Current | 100 μA - allows low-power sleep modes in battery-backed data acquisition systems. |
| Regulation Accuracy | ±25 mV line/load regulation - ensures stable output under varying input and load conditions without external LDO post-regulation. |
Pinout & Package
LT1054IDWG4 is housed in a 16-pin SOIC (DW package), 10.30 mm × 10.30 mm body size, with thermal resistance RθJA = 57°C/W.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| FB/SD (Pin 3) | Error amp in / shutdown control | Pull ≤0.45 V to enter 100 μA shutdown; connect to resistor divider for regulated output voltage setting. |
| CAP+ (Pin 4) | Positive terminal of flying capacitor | Connects to + side of 2.2 μF ceramic or 10 μF tantalum flying cap; carries bidirectional 2×IOUT ripple current. |
| GND (Pin 5) | Power ground reference | Common return for VCC, CAP−, and load; must be low-impedance path to minimize noise coupling into regulation loop. |
| CAP− (Pin 6) | Negative terminal of flying capacitor | Connects to – side of flying cap; forms charge-transfer path with CAP+ during switching phases. |
| VOUT (Pin 11) | Regulated negative output | Delivers inverted, regulated voltage (e.g., –5 V); requires 100 μF low-ESR tantalum output capacitor for stability. |
| VREF (Pin 12) | 2.5 V internal reference output | Provides stable reference for feedback network; max load 60 μA to maintain accuracy. |
| OSC (Pin 13) | Oscillator control | Adjusts or synchronizes 25 kHz internal clock; add capacitor to GND to lower freq, or to VREF to raise freq. |
| VCC (Pin 14) | Positive supply input | Accepts 3.5–15 V; powers internal circuitry and charge pump; bypass with 0.1 μF near pin. |
Key Features
| Feature | Design Value |
|---|---|
| Integrated regulation | Eliminates need for external op-amp and reference in negative supply designs - reduces BOM count and layout area. |
| Adaptive-switch drive | Maintains high efficiency (>85%) across 10–100 mA loads without manual compensation or external gate drivers. |
| External shutdown | Enables microcontroller-controlled power gating - critical for portable instrumentation with duty-cycled analog sections. |
| Oscillator synchronization | Prevents beat frequencies and EMI in multi-converter systems by locking LT1054IDWG4 switching to master clock. |
| Pin-to-pin compatibility | Direct replacement for LTC1044 and ICL7660 in existing layouts - simplifies upgrade paths for higher current or regulated operation. |
Applications
| Industrial RS-232 Interface | Data Acquisition Bias Supply |
|---|---|
Use Scenario: Providing isolated –5 V and +5 V rails for MAX232-level RS-232 transceivers in PLC backplanes. IC Role / Device Role / Timing Role: Negative voltage generator with regulation - generates stable –5 V from +5 V system rail to meet TIA-232 driver voltage compliance. Use Value: Eliminates need for dual-output isolated DC/DC modules; achieves <±25 mV load regulation over 1–100 mA, ensuring robust signal integrity. | Use Scenario: Generating precision –5 V reference for 16-bit ADC front-end op-amps in environmental sensor nodes. IC Role / Device Role / Timing Role: Regulated charge-pump inverter - supplies clean, low-noise negative bias independent of main system supply variations. Use Value: 2.5 V internal reference and <10 ppm/°C output drift enable <0.01% full-scale error over –40°C to +85°C operating range. |
| Voltage Inverter for Op-Amp Rails | Negative Voltage Doubler |
Use Scenario: Creating split ±12 V supplies for rail-to-rail op-amps in portable test equipment powered from single 12 V battery. IC Role / Device Role / Timing Role: Inverting regulator - converts 12 V input to regulated –12 V output while rejecting input ripple via closed-loop feedback. Use Value: 1.1 V voltage loss at 100 mA allows >90% efficiency; shutdown mode cuts quiescent draw to 100 μA during standby. | Use Scenario: Generating –10 V from +5 V for photodiode bias in optical smoke detectors. IC Role / Device Role / Timing Role: Configurable doubler/inverter - operated in negative-doubler mode to deliver |VOUT| ≈ 2×VCC with reduced current capability. Use Value: Supports 50 mA at –10 V using same external capacitors as inverter mode - avoids redesign when higher bias voltage is required. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar switched-capacitor voltage converter applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| LTC1044CSW#PBF | No internal regulation; fixed unregulated inversion; 20 mA max output; no shutdown pin. | Suitable only for non-critical, low-current inverter apps where output tolerance >±10% is acceptable. | Select LTC1044CSW#PBF only if cost sensitivity outweighs need for regulation, current, or power control. |
| ICL7660ACPA+ | Unregulated only; 20 mA max; no VREF or FB/SD pins; 10 kHz fixed oscillator; wider temp range (–40°C to +85°C). | Used in legacy consumer electronics where board space is constrained and regulation not required. | Choose ICL7660ACPA+ only for drop-in replacement in existing ICL7660 designs with no regulation requirement. |
Compared with LTC1044CSW#PBF and ICL7660ACPA+, the LT1054IDWG4 uniquely combines 100 mA regulated output, programmable shutdown, and 2.5 V reference in a single SOIC-16 package - enabling compact, high-accuracy negative supplies without external support components.
Availability
LT1054IDWG4 is available at Aetrix Electronics and suitable for industrial communications (RS-232), data acquisition biasing, and voltage inverter applications requiring stable component supply, long-term lifecycle assurance, and TI-qualified automotive-grade traceability.
Supply support for LT1054IDWG4 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor company delivering analog and embedded processing solutions, with leadership in power management, signal chain, and high-reliability ICs.
The LT1054IDWG4 belongs to TI's legacy linear power portfolio, specifically engineered for efficient, regulated negative voltage generation in space-constrained industrial and instrumentation systems where transformerless DC/DC conversion is preferred.
FAQ
What is the maximum output current capability of the LT1054IDWG4?
The LT1054IDWG4 delivers up to 100 mA of continuous regulated output current when configured as a negative voltage inverter with proper external capacitors (CIN = 10 μF tantalum, COUT = 100 μF tantalum) and within its 3.5 V–15 V input range. At this load, typical voltage loss is 1.1 V, and junction temperature must remain within rated limits using appropriate PCB copper area or heatsinking.
How does the LT1054IDWG4 achieve output voltage regulation?
The LT1054IDWG4 achieves regulation using an internal 2.5 V reference and error amplifier. The FB/SD pin serves as the inverting input of this amplifier; connecting it to a resistor divider from VOUT to GND sets the regulated output voltage (e.g., –5 V with R1 = 20 kΩ, R2 = 102.5 kΩ). The amplifier drives the internal PNP switch to maintain VFB/SD = VREF, ensuring tight line and load regulation.
Can the LT1054IDWG4 be synchronized to an external clock?
Yes, the LT1054IDWG4 supports external oscillator synchronization via the OSC pin (Pin 13). An open-collector gate or NPN transistor can drive OSC at the desired frequency, with a 20 kΩ pull-up to VREF recommended. This prevents beat frequencies in multi-converter systems and enables deterministic EMI control - a capability not available in earlier charge-pump ICs like the ICL7660.
What is the purpose of the VREF pin on the LT1054IDWG4?
The VREF pin (Pin 12) provides a stable 2.5 V ±0.1 V output used as the reference for the internal error amplifier. It enables precise resistor-divider programming of regulated outputs and may also serve as a pull-up point for OSC during synchronization. Reference current must be limited to ≤60 μA to maintain accuracy; shorting VREF to GND draws ~100 μA but does not disrupt regulation.
Does the LT1054IDWG4 support shutdown functionality, and how is it implemented?
Yes, the LT1054IDWG4 supports hardware shutdown via the FB/SD pin. Pulling FB/SD below ≈0.45 V disables internal switching, turns off the reference, and reduces supply current to 100 μA. During shutdown, both CIN and COUT discharge through the load. A restart pulse >100 μs applied to FB/SD restores normal operation - essential for intermittent-use applications like portable data loggers.
LT1054IDWG4 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 16-SOIC (0.295", 7.50mm Width)
- Packaging:
- Tube
- Product Status:
- Discontinued at Digi-Key
- Function:
- Ratiometric, Step-Up
- Output Configuration:
- Positive or Negative
- Topology:
- Charge Pump
- Output Type:
- Adjustable (Fixed)
- Number of Outputs:
- 1
- Voltage - Input (Min):
- 3.5V
- Voltage - Input (Max):
- 15V
- Voltage - Output (Min/Fixed):
- 3.5V (-Vin, 2Vin)
- Voltage - Output (Max):
- 26.4V
- Current - Output:
- 100mA
- Frequency - Switching:
- 25kHz
- Synchronous Rectifier:
- No
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 16-SOIC
LT1054IDWG4 FAQ
1.How can I place an order for LT1054IDWG4 through Aetrix?
Please submit a Request for Quotation (RFQ) for LT1054IDWG4 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LT1054IDWG4 reliable?
The price and inventory of LT1054IDWG4 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LT1054IDWG4 is usually 5 days.
3.What payment methods are accepted for LT1054IDWG4?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LT1054IDWG4 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LT1054IDWG4?
LT1054IDWG4 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LT1054IDWG4 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LT1054IDWG4?
For technical support, including LT1054IDWG4 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LT1054IDWG4 requirements.
6.How does Aetrix verify that LT1054IDWG4 is sourced from the original manufacturer or authorized distributors?
All LT1054IDWG4 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LT1054IDWG4 meets industry standards.
7.What is the process for return or replacement of LT1054IDWG4?
All LT1054IDWG4 units undergo pre-shipment inspection (PSI). If there is an issue with LT1054IDWG4, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LT1054IDWG4 part is unused and in its original packaging.
Return procedure for LT1054IDWG4:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
LT1054IDWG4 Tags
-
TPS562201DDCR
Texas Instruments
-
MC34063ABD-TR
STMicroelectronics
-
TPS561201DDCR
Texas Instruments
-
MC33063ADR
Texas Instruments
-
MC34063ADR
Texas Instruments
-
TPS560200DBVR
Texas Instruments
-
AP3012KTR-G1
Diodes Incorporated
-
TLV61048DBVR
Texas Instruments
-
AZ34063UMTR-G1
Diodes Incorporated
-
TPS562200DDCR
Texas Instruments
-
AP62300TWU-7
Diodes Incorporated
-
MC34063EBD-TR
STMicroelectronics
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…
