My Inquiry
My Account
Texas Instruments LT1054IDWR
- Part No.:
- LT1054IDWR
- Manufacturer:
- Texas Instruments
- Package:
- 16-SOIC (0.295", 7.50mm Width)
- Datasheet:
-
LT1054IDWR.pdf
- Description:
- IC REG CHRG PUMP ADJ/3.5V 16SOIC
- Quantity:
- Payment:
- Shipping:
Inventory:7,885
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
LT1054IDWR from Texas Instruments is a bipolar switched-capacitor voltage converter with integrated regulation, designed as a negative voltage generator or regulated inverter. It delivers up to 100 mA output current with typical voltage loss of 1.1 V at full load, operates from 3.5 V to 15 V input, and provides a 2.5 V internal reference for precision feedback. It is used in RS-232 interface supplies requiring stable –5 V rails.
For engineers reviewing the LT1054IDWR datasheet, LT1054IDWR pinout, LT1054IDWR application, or LT1054IDWR equivalent, key selection criteria include regulated output capability, shutdown control via FB/SD, oscillator synchronization support, and compatibility with external capacitor-based charge-pump topologies for industrial and data acquisition systems.
Technical Context
The LT1054IDWR implements an adaptive-switch drive architecture that dynamically adjusts switching behavior to maintain high efficiency across 10 mA–100 mA output loads. Its internal 25 kHz oscillator (adjustable ±10 kHz) drives complementary PNP/NPN switches to transfer charge between CAP+ and CAP− terminals, enabling inverting, doubling, or regulated configurations.
Regulation is achieved through an error amplifier comparing FB/SD voltage against a trimmed 2.5 V reference (±0.1 V), allowing programmable output voltages using external resistive dividers. Shutdown mode reduces supply current to 100 µA by grounding FB/SD, disabling both oscillator and regulator functions while maintaining safe discharge paths for external capacitors.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Output Current | 100 mA maximum - supports moderate-power analog and interface circuits without external pass devices. |
| Voltage Loss | 1.1 V typical at 100 mA - defines minimum input-to-output differential required for regulation (e.g., ≥6.1 V for –5 V output). |
| Input Range | 3.5 V to 15 V - enables direct operation from common industrial and battery-derived rails including 5 V, 9 V, and 12 V systems. |
| Oscillator Freq | 25 kHz nominal (15–35 kHz range) - balances switching loss and capacitor size; adjustable via OSC pin for EMI control or synchronization. |
| Reference Voltage | 2.5 V ±0.1 V - stable internal reference enabling accurate output programming (e.g., –5 V via 20 kΩ/102.5 kΩ divider). |
| Shutdown Current | 100 µA - enables low-power sleep modes in portable or intermittent-use applications without external disconnect circuitry. |
| Operating Temp | –40°C to +85°C - qualified for industrial temperature range, supporting deployment in embedded controllers and field instrumentation. |
Pinout & Package
LT1054IDWR is housed in a 16-pin SOIC (DW package) with 10.30 mm × 10.30 mm body size and standard JEDEC MS-013 outline. Pin 1 is marked with a dot; pins 1, 2, 7, 8, 9, 10, 15, and 16 are no-connect (NC) internally.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| FB/SD (Pin 3) | Error amp in / shutdown control | Pull below 0.45 V to enter 100 µA shutdown; connect to resistor divider for regulated output voltage setting. |
| CAP+ (Pin 4) | Charge pump positive node | Connects to positive side of flying capacitor (CIN) - carries ~2× output current during charge phase. |
| GND (Pin 5) | Power ground reference | Primary return path for all internal switches and external capacitors; must be low-impedance for ripple control. |
| CAP− (Pin 6) | Charge pump negative node | Connects to negative side of flying capacitor - alternately charged/discharged to generate inverted voltage. |
| VOUT (Pin 11) | Regulated output terminal | Delivers final regulated negative voltage (e.g., –5 V); connects to output capacitor (COUT) and load. |
| VREF (Pin 12) | 2.5 V reference output | Provides stable reference for feedback networks; limited to ≤60 µA load to maintain accuracy. |
| OSC (Pin 13) | Oscillator timing/sync input | Accepts external capacitor for frequency tuning or open-collector signal for system clock synchronization. |
| VCC (Pin 14) | Positive supply input | Supplies all internal circuitry; must be decoupled near pin with ≥10 µF low-ESR tantalum capacitor. |
Key Features
| Feature | Design Value |
|---|---|
| Integrated regulation | Eliminates need for external op-amps or discrete feedback components when generating precise negative rails like –5 V or –12 V. |
| Adaptive switch drive | Maintains >85% efficiency across 10–100 mA loads by optimizing transistor conduction timing without external compensation. |
| External shutdown | Reduces total system quiescent current to <150 µA in standby, enabling battery-powered RS-232 transceivers with multi-week shelf life. |
| Oscillator synchronization | Allows alignment of switching edges with host MCU clocks to minimize conducted EMI in mixed-signal PCB layouts. |
| Parallel operation support | Enables current sharing across multiple LT1054IDWR units to achieve >100 mA regulated outputs without derating. |
Applications
| Industrial RS-232 Interface | Data Acquisition Supply |
|---|---|
|
Use Scenario: Generating isolated –5 V and +5 V rails for MAX232-level RS-232 transceivers in PLC I/O modules. IC Role / Device Role / Timing Role: Negative voltage generator providing regulated –5 V output referenced to system ground, synchronized to master controller clock via OSC pin. Use Value: Enables single-supply 5 V microcontroller to drive full RS-232 voltage levels (±5 V to ±15 V) without transformer-based isolation or extra DC/DC stages. |
Use Scenario: Powering dual-supply op-amps and ADC drivers in 16-bit precision data loggers operating from 12 V batteries. IC Role / Device Role / Timing Role: Regulated inverter supplying –5 V rail with <50 mV line/load regulation, referenced to VREF for stable offset calibration. Use Value: Maintains ADC reference stability and op-amp common-mode range over battery discharge (12 V → 9 V), eliminating measurement drift due to supply variation. |
| Voltage Inverter for Sensor Bias | Negative Voltage Doubler |
|
Use Scenario: Providing –3.3 V bias for MEMS pressure sensors in automotive cabin air quality monitors. IC Role / Device Role / Timing Role: Low-noise inverter configured with 2.2 µF ceramic flying cap and 100 µF tantalum output cap for <10 mV ripple. Use Value: Delivers clean, regulated negative bias without magnetic components-critical for EMI-sensitive cabin electronics meeting CISPR 25 Class 3 limits. |
Use Scenario: Generating –10 V from 5 V supply for photodiode transimpedance amplifier bias in optical smoke detectors. IC Role / Device Role / Timing Role: Doubler topology using two external capacitors and internal switch matrix to double input magnitude with regulation feedback. Use Value: Achieves –10 V at 25 mA with <2% output error over temperature, replacing discrete charge-pump ICs and reducing BOM count by 3 parts. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar switched-capacitor voltage converter applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| LT1054CDW | Same functionality and pinout, but rated for 0°C to 70°C commercial temperature range instead of –40°C to 85°C. | Suitable only for non-industrial environments; lacks extended thermal qualification for factory automation or outdoor equipment. | Select LT1054IDWR when operating ambient exceeds 70°C or when long-term reliability under thermal cycling is required. |
| MAX680CPA+ | CMOS-based, lower quiescent current (120 µA vs 2.5 mA active), but no internal reference or regulation loop; fixed –VIN output only. | Cannot implement programmable or regulated outputs; requires external op-amp for feedback if regulation is needed. | Choose MAX680CPA+ only for simple unregulated inversion where lowest possible active current is critical and output tolerance >±10% is acceptable. |
Compared with LT1054CDW, LT1054IDWR adds industrial temperature resilience without sacrificing regulation accuracy or output current. Against MAX680CPA+, LT1054IDWR trades slightly higher active current for integrated regulation, reference, and shutdown-reducing design complexity and component count in precision analog systems.
Availability
LT1054IDWR is available at Aetrix Electronics and suitable for industrial communications (RS-232), data acquisition supply, and voltage inverter applications requiring stable component supply, long-lifecycle assurance, and traceable sourcing for production programs.
Supply support for LT1054IDWR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and power management technologies, with decades of heritage in precision analog ICs and industrial-grade components.
The LT1054 product line was developed specifically for high-reliability, capacitor-based DC/DC conversion in space-constrained industrial and instrumentation systems where magnetic-free solutions are mandatory.
FAQ
What is the maximum output current capability of the LT1054IDWR?
The LT1054IDWR delivers up to 100 mA of continuous regulated output current under recommended operating conditions (VCC = 3.5 V to 15 V, TA = –40°C to +85°C). This rating assumes proper external capacitor selection (e.g., 10 µF low-ESR tantalum for CIN, 100 µF for COUT) and adequate PCB thermal relief. Exceeding 100 mA may cause thermal shutdown or regulation loss in the LT1054IDWR.
How does the LT1054IDWR achieve output voltage regulation?
The LT1054IDWR achieves regulation using an internal 2.5 V reference and error amplifier. The FB/SD pin serves as the inverting input to this amplifier; connecting it to a resistive divider from VOUT sets the regulated output voltage (e.g., –5 V with R1 = 20 kΩ, R2 = 102.5 kΩ). The LT1054IDWR continuously adjusts its internal switch duty cycle to maintain this ratio, compensating for input voltage and load variations.
Can the LT1054IDWR be synchronized to an external clock signal?
Yes, the LT1054IDWR supports external oscillator synchronization via the OSC pin (Pin 13). An open-collector gate or NPN transistor can drive this pin at the desired system clock frequency, allowing precise alignment of switching edges to reduce EMI in noise-sensitive applications. A 20 kΩ pull-up to VREF is recommended, and the LT1054IDWR will lock to frequencies within its operational range (15–35 kHz).
What is the purpose of the VREF pin on the LT1054IDWR?
The VREF pin (Pin 12) provides a stable 2.5 V ±0.1 V reference output used to bias the external feedback resistor divider for regulation. It is internally trimmed for low temperature drift and must be loaded with ≤60 µA to maintain accuracy. The LT1054IDWR's VREF also serves as a pull-up point for OSC synchronization circuits, enabling shared reference use without additional voltage sources.
Does the LT1054IDWR support parallel operation for higher current?
Yes, the LT1054IDWR supports parallel operation to increase total output current beyond 100 mA. When multiple LT1054IDWR units are connected with matched external components and synchronized oscillators (via shared OSC signal), they share load current proportionally. This configuration maintains regulation accuracy and avoids current hogging, making it viable for applications like multi-channel data acquisition where single-device current limits are insufficient.
LT1054IDWR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 16-SOIC (0.295", 7.50mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Function:
- Ratiometric, Step-Up
- Output Configuration:
- Positive or Negative
- Topology:
- Charge Pump
- Output Type:
- Adjustable (Fixed)
- Number of Outputs:
- 1
- Voltage - Input (Min):
- 3.5V
- Voltage - Input (Max):
- 15V
- Voltage - Output (Min/Fixed):
- 3.5V (-Vin, 2Vin)
- Voltage - Output (Max):
- 26.4V
- Current - Output:
- 100mA
- Frequency - Switching:
- 25kHz
- Synchronous Rectifier:
- No
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 16-SOIC
LT1054IDWR FAQ
1.How can I place an order for LT1054IDWR through Aetrix?
Please submit a Request for Quotation (RFQ) for LT1054IDWR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LT1054IDWR reliable?
The price and inventory of LT1054IDWR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LT1054IDWR is usually 5 days.
3.What payment methods are accepted for LT1054IDWR?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LT1054IDWR transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LT1054IDWR?
LT1054IDWR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LT1054IDWR order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LT1054IDWR?
For technical support, including LT1054IDWR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LT1054IDWR requirements.
6.How does Aetrix verify that LT1054IDWR is sourced from the original manufacturer or authorized distributors?
All LT1054IDWR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LT1054IDWR meets industry standards.
7.What is the process for return or replacement of LT1054IDWR?
All LT1054IDWR units undergo pre-shipment inspection (PSI). If there is an issue with LT1054IDWR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LT1054IDWR part is unused and in its original packaging.
Return procedure for LT1054IDWR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
LT1054IDWR Tags
-
TPS562201DDCR
Texas Instruments
-
MC34063ABD-TR
STMicroelectronics
-
TPS561201DDCR
Texas Instruments
-
MC33063ADR
Texas Instruments
-
MC34063ADR
Texas Instruments
-
TPS560200DBVR
Texas Instruments
-
AP3012KTR-G1
Diodes Incorporated
-
TLV61048DBVR
Texas Instruments
-
AZ34063UMTR-G1
Diodes Incorporated
-
TPS562200DDCR
Texas Instruments
-
AP62300TWU-7
Diodes Incorporated
-
MC34063EBD-TR
STMicroelectronics
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…
