Analog Devices Inc. LT1058ISW#PBF
- Part No.:
- LT1058ISW#PBF
- Manufacturer:
- Analog Devices Inc.
- Category:
- Instrumentation, Op Amps, Buffer Amps
- Package:
- 16-SOIC (0.295", 7.50mm Width)
- Datasheet:
-
LT1058ISW#PBF.pdf
- Description:
- IC OPAMP JFET 4 CIRCUIT 16SO
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
LT1058ISW#PBF from Analog Devices (formerly Linear Technology) is a quad JFET-input precision operational amplifier in a 16-lead wide SOIC package, delivering 14 V/µs slew rate, 5 MHz gain-bandwidth product, and 180 µV maximum input offset voltage at 25°C. It operates over –40°C to +85°C and targets high-speed, low-input-bias-current applications including photodiode amplification, instrumentation, and precision sample-and-hold circuits.
For engineers reviewing the LT1058ISW#PBF datasheet, LT1058ISW#PBF pinout, LT1058ISW#PBF application, or LT1058ISW#PBF equivalent, key selection criteria include its 50 pA bias current at 70°C, 13 nV/√Hz input voltage noise at 1 kHz, ±12 V output swing into 2 kΩ, and guaranteed performance in the SW package across industrial temperature range.
Technical Context
The LT1058ISW#PBF integrates four matched JFET-input op amps with internal phase-reversal protection, eliminating output inversion when common-mode inputs exceed –12 V (with ±15 V supplies). Its architecture enables stable operation with capacitive loads up to 1 µF and supports unity-gain and high-gain configurations without external compensation.
It features low 1.8 µV/°C typical input offset voltage drift (max 7 µV/°C), 130 dB channel separation at DC, and 98 dB common-mode rejection ratio at ±10.4 V common-mode voltage - all specified for the SW package under industrial temperature conditions (–40°C ≤ TA ≤ 85°C).
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Slew Rate | 14 V/µs - enables fast settling (1.3 µs to 0.02%) in precision analog signal conditioning |
| Gain-Bandwidth Product | 5 MHz - supports stable closed-loop gain ≥10 at 500 kHz |
| Input Offset Voltage | 180 µV max (25°C), 400 µV max (–40°C to +85°C) - ensures sub-mV DC accuracy in multi-stage amplifiers |
| Input Bias Current | ±50 pA max at 70°C - preserves signal integrity in high-impedance sensor interfaces (e.g., photodiodes) |
| Input Voltage Noise Density | 13 nV/√Hz at 1 kHz - critical for low-noise transimpedance amplifier design |
| Common-Mode Rejection Ratio | 96 dB min (–40°C to +85°C) - maintains accuracy in noisy industrial environments |
| Supply Current per Amplifier | 2.8 mA max at 70°C - balances speed and power in space-constrained quad-channel systems |
Pinout & Package
LT1058ISW#PBF uses a 16-lead plastic wide SOIC (SW) package (JEDEC MS-013AC), 7.5 mm × 10.3 mm body, 1.27 mm pitch. Pin 1 is marked by notch or dimple; leads are gull-wing, lead-free (Pb-free) compliant.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1, 2, 15, 16 | No Connect (NC) | Unused pins; must be left floating or tied to ground per layout best practices |
| 3, 7, 10, 14 | Output (OUT A/B/C/D) | Amplifier outputs; capable of ±12 V swing into 2 kΩ load |
| 4, 6, 11, 13 | Inverting Input (–IN A/B/C/D) | High-impedance JFET inputs (≥10¹² Ω); sensitive to PCB leakage and guarding |
| 5, 8, 12, 9 | Non-inverting Input (+IN A/B/C/D) | Matched to inverting inputs; used for unity-gain buffers and differential configurations |
| 13 | V– (Negative Supply) | Common negative rail connection for all four amplifiers; requires low-impedance decoupling |
| 4 | V+ (Positive Supply) | Common positive rail connection; supports ±15 V absolute max, ±18 V recommended operating range |
Key Features
| Feature | Design Value |
|---|---|
| Phase reversal protection | Eliminates output inversion during common-mode overvoltage - prevents servo lock-up in feedback loops |
| Matched quad topology | Guarantees <1 µV inter-amplifier offset mismatch - enables precise multi-channel instrumentation |
| Low 1/f noise corner | 28 Hz - minimizes drift in DC-coupled, low-frequency measurement systems (e.g., bridge sensors) |
| Capacitive load drive | Stable with up to 1 µF load - simplifies output filtering without external isolation resistors |
| Guard ring compatible | Supports PCB guard traces tied to inverting input - reduces board leakage below 1 pA in high-Z designs |
Applications
| Photodiode Amplification | Instrumentation Amplifier Front-End |
|---|---|
|
Use Scenario: Converting weak photocurrents (nA–µA) from PIN photodiodes into stable voltage signals in optical sensing systems. IC Role / Device Role / Timing Role: Transimpedance amplifier (TIA) stage with ultra-low input bias current and 13 nV/√Hz noise density. Use Value: Enables 100 dB dynamic range logarithmic response (as validated in LT1057/LT1058 TA10) while maintaining sub-1 µV offset drift. |
Use Scenario: High-common-mode-rejection signal conditioning for strain gauges and Wheatstone bridges in industrial test equipment. IC Role / Device Role / Timing Role: Precision gain stage and buffer in 3-op-amp instrumentation amplifier topology. Use Value: Delivers 96 dB CMRR at full industrial temperature range and supports 350 kHz bandwidth at G = 100 (TA09). |
| Precision Sample-and-Hold | Logarithmic Converter Core |
|
Use Scenario: Capturing fast analog waveforms (e.g., ADC front-end) with minimal droop and aperture jitter. IC Role / Device Role / Timing Role: Unity-gain buffer and hold amplifier with 1.3 µs settling to 0.02% and 14 V/µs slew rate. Use Value: Meets 12-bit accuracy requirements without external trimming; verified in TA05 and datasheet settling curves. |
Use Scenario: Building wide-dynamic-range logarithmic amplifiers for RF power detection and light intensity measurement. IC Role / Device Role / Timing Role: Core op amp in diode-connected feedback configuration with matched quad channels for temperature compensation. Use Value: Achieves 100 dB range with <0.005% distortion (TA04) using inherent quad matching and low VOS drift. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar quad JFET-input op amp applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| LT1014CN | Bipolar input; 150 µV max VOS, 200 nA IB, 0.6 V/µs slew rate | Superior DC accuracy but 23× slower; unsuitable for >10 kHz signal paths | Select for ultra-low-offset DC systems where speed is secondary |
| OPA4134UA | FET input; 500 µV max VOS, 10 pA IB, 20 V/µs slew rate, wider supply (±18 V) | Higher speed and rail-to-rail output, but no phase reversal protection or guaranteed SW-package industrial temp spec | Select for higher-speed, rail-to-rail output needs where phase reversal immunity is not required |
Compared with LT1058ISW#PBF, LT1014CN trades speed for lower offset and higher IB, while OPA4134UA offers faster slew and rail-to-rail output but lacks integrated phase reversal protection and industrial-temperature validation in the same package form factor.
Availability
LT1058ISW#PBF is available at Aetrix Electronics and suitable for photodiode amplification, instrumentation amplifier front-ends, and precision sample-and-hold circuits requiring stable component supply across industrial temperature ranges and long production lifecycles.
Supply support for LT1058ISW#PBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices acquired Linear Technology in 2017 and maintains its precision analog portfolio, renowned for high-performance op amps, references, and signal conditioning ICs.
The LT1058 series belongs to Linear's legacy precision JFET-input op amp family, designed specifically for applications demanding both high speed and microvolt-level DC accuracy - bridging the gap between bipolar and FET technologies.
FAQ
What is the maximum operating temperature range for LT1058ISW#PBF?
The LT1058ISW#PBF is rated for –40°C to +85°C ambient operating temperature. This industrial-grade specification is explicitly confirmed in the "PACKAGE/ORDER INFORMATION" section of the datasheet for the ISW suffix, and all electrical characteristics (e.g., VOS, IB, CMRR) are guaranteed across this range.
Does LT1058ISW#PBF have phase reversal protection?
Yes, LT1058ISW#PBF incorporates built-in phase reversal protection. As documented in the Applications Information section (page 9), it prevents output inversion when the negative common-mode input voltage exceeds –12 V (with ±15 V supplies), unlike legacy JFET op amps such as LF412A or TL084 - a critical feature for stable servo and closed-loop systems.
What is the input bias current of LT1058ISW#PBF at 85°C?
The LT1058ISW#PBF has a maximum input bias current of ±400 pA at 85°C, as specified in the "ELECTRICAL CHARACTERISTICS" table on page 5 under the "l" column (–40°C ≤ TA ≤ 85°C). This value reflects worst-case warmed-up performance and is essential for high-impedance sensor interface design.
Can LT1058ISW#PBF drive a 1 µF capacitive load stably?
Yes, LT1058ISW#PBF is characterized for stable operation with up to 1 µF capacitive loads, as confirmed in the "TYPICAL PERFORMANCE CHARACTERISTICS" section (Figure G15, page 7). The device maintains phase margin >58° and avoids peaking or oscillation without requiring external series resistance - simplifying output filter design.
Is LT1058ISW#PBF pin-compatible with standard quad op amp sockets like TL084?
No, LT1058ISW#PBF is not pin-compatible with TL084. While the LT1058 (in PDIP or CERDIP packages) fits TL084 sockets, the SW package has 16 leads with NC pins (1, 2, 15, 16) and different pin assignments - e.g., V+ on pin 4 and V– on pin 13. Direct socket replacement requires PCB redesign.
LT1058ISW#PBF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- LT®
- Package/Case:
- 16-SOIC (0.295", 7.50mm Width)
- Packaging:
- Tube
- Product Status:
- Active
- Amplifier Type:
- J-FET
- Number of Circuits:
- 4
- Output Type:
- -
- Slew Rate:
- 13V/µs
- Gain Bandwidth Product:
- 5 MHz
- -3db Bandwidth:
- -
- Current - Input Bias:
- 10 pA
- Voltage - Input Offset:
- 350 µV
- Current - Supply:
- 1.7mA (x4 Channels)
- Current - Output / Channel:
- -
- Voltage - Supply Span (Min):
- 20 V
- Voltage - Supply Span (Max):
- 36 V
- Operating Temperature:
- -40°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 16-SO
LT1058ISW#PBF FAQ
1.How can I place an order for LT1058ISW#PBF through Aetrix?
Please submit a Request for Quotation (RFQ) for LT1058ISW#PBF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LT1058ISW#PBF reliable?
The price and inventory of LT1058ISW#PBF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LT1058ISW#PBF is usually 5 days.
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LT1058ISW#PBF orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LT1058ISW#PBF order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LT1058ISW#PBF?
For technical support, including LT1058ISW#PBF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LT1058ISW#PBF requirements.
6.How does Aetrix verify that LT1058ISW#PBF is sourced from the original manufacturer or authorized distributors?
All LT1058ISW#PBF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LT1058ISW#PBF meets industry standards.
7.What is the process for return or replacement of LT1058ISW#PBF?
All LT1058ISW#PBF units undergo pre-shipment inspection (PSI). If there is an issue with LT1058ISW#PBF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LT1058ISW#PBF part is unused and in its original packaging.
Return procedure for LT1058ISW#PBF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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