Analog Devices Inc. LT1113CN8#PBF
- Part No.:
- LT1113CN8#PBF
- Manufacturer:
- Analog Devices Inc.
- Category:
- Instrumentation, Op Amps, Buffer Amps
- Package:
- 8-DIP (0.300", 7.62mm)
- Datasheet:
-
LT1113CN8#PBF.pdf
- Description:
- IC OPAMP JFET 2 CIRCUIT 8DIP
- Quantity:
- Payment:

- Shipping:

Inventory:3,338
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Product details
Overview
LT1113CN8#PBF from Analog Devices (formerly Linear Technology) is a dual low-noise, precision JFET-input operational amplifier in an 8-lead PDIP package. It delivers 4.5nV/√Hz input voltage noise at 1kHz, 0.4mV max input offset voltage, and 5.6MHz gain bandwidth under ±15V supplies - optimized for hydrophone amplification, piezoelectric sensor front ends, and low-current-noise instrumentation.
For engineers reviewing the LT1113CN8#PBF datasheet, LT1113CN8#PBF pinout, LT1113CN8#PBF application, or LT1113CN8#PBF equivalent, key selection criteria include verified 100% tested voltage noise, guaranteed matching specifications for instrumentation amplifier topologies, ±5V to ±15V dual-supply operation, and unconditional stability with ≥1000pF capacitive loads.
Technical Context
The LT1113CN8#PBF integrates two fully independent JFET-input op amps with matched internal biasing, enabling true dual-channel precision without crosstalk-induced settling errors. Its architecture eliminates phase reversal beyond common-mode limits and supports unity-gain stability even with heavy capacitive loading - critical for transducer interfacing where signal integrity degrades under overdrive.
Each amplifier is 100% tested for voltage noise, slew rate (2.3–3.9 V/µs), and open-loop gain (≥4 million), with guaranteed matching parameters including ∆VOS ≤ 2.5mV and ∆CMRR ≥ 78dB. The design targets high-impedance capacitive sources (e.g., hydrophones, accelerometers), where low current noise (<450pA warmed-up IB) and ultra-low voltage noise dominate system SNR.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Input Voltage Noise | 4.5nV/√Hz at 1kHz - enables detection of sub-µV signals from high-Z transducers without thermal noise dominance below 5kΩ source resistance. |
| Input Bias Current | 450pA max (warmed up) - minimizes IR error across >100MΩ transducer impedances, especially critical in piezoelectric accelerometer interfaces. |
| Gain Bandwidth Product | 5.6MHz typical - supports stable closed-loop gains up to 100 with bandwidth >50kHz, suitable for active filtering and wideband sensor conditioning. |
| Input Offset Voltage | 1.5mV max - ensures DC-coupled accuracy in precision instrumentation amplifier front ends without trimming. |
| Common-Mode Rejection | 98dB typical - maintains signal fidelity when rejecting power supply ripple or EMI coupled equally to both inputs. |
| Supply Voltage Range | ±5V to ±15V - allows flexible rail selection: ±5V reduces die temperature and IB for ultra-low-drift applications; ±15V maximizes dynamic range. |
| Slew Rate | 3.9V/µs typical - enables clean transient response for fast-rising piezoelectric pulses without slew-induced distortion. |
Pinout & Package
LT1113CN8#PBF uses an 8-lead plastic dual in-line package (PDIP), designated N8, with industry-standard pinout compatible with OPA2111 and OPA2604. Thermal resistance θJA = 130°C/W enables reliable operation up to 85°C ambient.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 | OUT A | Amplifier A output - drives loads ≥1kΩ; capable of ±13.5V swing into 10kΩ with ±15V supplies. |
| 2 | –IN A | Inverting input of Amplifier A - high-impedance JFET node (RIN ≥ 1011Ω); requires matched layout to +IN A for CMRR optimization. |
| 3 | +IN A | Non-inverting input of Amplifier A - same high-Z characteristics as –IN A; used for unity-gain buffers and charge amplifiers. |
| 4 | V– | Negative supply rail - must be decoupled locally with ≥0.1µF ceramic capacitor to suppress PSRR degradation above 10kHz. |
| 5 | V+ | Positive supply rail - shared by both amplifiers; decoupling essential for channel separation >126dB at 10Hz. |
| 6 | OUT B | Amplifier B output - electrically isolated from OUT A; supports independent gain configurations without crosstalk. |
| 7 | –IN B | Inverting input of Amplifier B - matched to –IN A for differential pair applications; ∆VOS ≤ 2.5mV ensures tracking. |
| 8 | +IN B | Non-inverting input of Amplifier B - identical input structure to +IN A; enables true dual-channel instrumentation topologies. |
Key Features
| Feature | Design Value |
|---|---|
| 100% tested voltage noise | Guarantees ≤6nV/√Hz max at 1kHz - eliminates screening for low-noise applications like hydrophone preamplifiers. |
| Matched dual architecture | ∆VOS ≤ 2.5mV and ∆CMRR ≥ 78dB - enables high-accuracy three-op-amp instrumentation amplifiers without external trimming. |
| Unconditional stability | Stable at unity gain with ≥1000pF capacitive load - removes need for isolation resistors in piezoelectric sensor interfaces. |
| No phase reversal | Operates cleanly beyond ±13V input common-mode range on ±15V rails - prevents latch-up in servo feedback loops. |
| Guaranteed ±5V operation | Full specs validated at ±5V - allows low-power, low-temperature operation while maintaining <1.8mV VOS and 4.5MHz GBW. |
Applications
| Hydrophone Signal Conditioning | Piezoelectric Accelerometer Front End |
|---|---|
Use Scenario: Amplifying microvolt-level acoustic signals from underwater hydrophones with 100pF–5000pF capacitance and >100MΩ source impedance. IC Role / Device Role / Timing Role: Dual-channel low-noise preamplifier providing DC servo stabilization and gain-of-20 signal conditioning. Use Value: 128nV/√Hz output noise at 1kHz enables >100dB SNR in marine sensing systems without cooling or shielding. | Use Scenario: Converting high-impedance charge output from vibration-sensing accelerometers into low-impedance voltage signals for data acquisition. IC Role / Device Role / Timing Role: Charge amplifier (inverting mode) with CF/CS-based gain setting and RB-balanced DC path. Use Value: 450pA max warmed-up IB ensures <100µV IR error across 100MΩ transducer resistance at 85°C ambient. |
| Low-Noise Instrumentation Amplifier Front End | Active Filter for Precision Sensor Signals |
Use Scenario: Building three-op-amp instrumentation amplifiers for medical EEG or industrial strain gauge readouts requiring <1µV offset drift. IC Role / Device Role / Timing Role: Matched dual core providing gain-setting and reference buffer stages with guaranteed ∆VOS ≤ 2.5mV. Use Value: Achieves 0.8mV total input offset and 320pA input bias current in final IA design - eliminating manual calibration. | Use Scenario: Implementing 4th-order low-pass filters for anti-aliasing before ADC sampling of seismic or structural monitoring signals. IC Role / Device Role / Timing Role: Dual op amp configuring Sallen-Key and multiple-feedback topologies with matched GBW and phase margin. Use Value: 5.6MHz GBW and 3.9V/µs slew rate support 100kHz filter cutoffs with <0.1% passband ripple and monotonic step response. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual low-noise JFET op amp applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| OPA2111AP | Higher 1/f corner (100Hz vs 120Hz), 5.8nV/√Hz noise at 1kHz, no guaranteed matching specs. | Lacks ∆VOS and ∆CMRR guarantees - unsuitable for untrimmed instrumentation amplifier designs. | Select LT1113CN8#PBF when matched performance and 100% noise testing are required; choose OPA2111AP only for legacy pin-compatible replacement without matching needs. |
| TL072CP | Higher 18nV/√Hz noise, 200pA typical IB (not max), no 100% noise test, lower 3MHz GBW. | Not rated for hydrophone or precision accelerometer use due to insufficient voltage noise and unguaranteed matching. | LT1113CN8#PBF is preferred for any application demanding <5nV/√Hz noise or guaranteed dual-channel matching; TL072CP remains viable only for cost-sensitive general-purpose amplification. |
Compared with OPA2111AP and TL072CP, LT1113CN8#PBF provides uniquely guaranteed voltage noise testing, tighter matching tolerances, and superior stability with capacitive loads - making it the only choice for production-grade hydrophone preamps and untrimmed instrumentation amplifiers.
Availability
LT1113CN8#PBF is available at Aetrix Electronics and suitable for hydrophone signal conditioning, piezoelectric accelerometer interfaces, and low-noise instrumentation amplifier front ends requiring stable component supply across industrial, marine, and test equipment programs.
Supply support for LT1113CN8#PBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices acquired Linear Technology in 2017 and maintains full product support, manufacturing, and documentation for legacy Linear op amps including the LT1113 family.
The LT1113 product line was designed specifically for high-impedance, low-noise sensor signal conditioning - targeting hydrophones, precision accelerometers, photodiode amplifiers, and matching-dependent instrumentation circuits.
FAQ
What is the maximum guaranteed input voltage noise for LT1113CN8#PBF at 1kHz?
The LT1113CN8#PBF is guaranteed to have ≤6nV/√Hz input voltage noise at 1kHz, with typical performance at 4.5nV/√Hz. This specification is 100% tested per unit during production, ensuring every LT1113CN8#PBF meets the low-noise requirement for hydrophone and piezoelectric sensor applications without binning or screening.
Does LT1113CN8#PBF support operation from ±5V supplies?
Yes, LT1113CN8#PBF is fully specified and guaranteed for operation from ±5V supplies. At ±5V, it maintains 1.8mV max input offset voltage, 4.5MHz gain bandwidth, and 450pA max warmed-up input bias current - enabling lower power dissipation and reduced thermal drift in portable or thermally constrained instrumentation designs.
Is LT1113CN8#PBF pin-compatible with OPA2111AP?
Yes, LT1113CN8#PBF uses the standard 8-pin DIP pinout and is pin-compatible with OPA2111AP and OPA2604. This allows direct replacement in existing layouts, delivering improved 4.5nV/√Hz noise (vs 5.8nV/√Hz) and guaranteed matching specifications without PCB changes.
What is the operating temperature range for LT1113CN8#PBF?
The LT1113CN8#PBF is rated for operation from –40°C to +85°C. This commercial-grade temperature range is validated for all electrical specifications, including input offset voltage drift (≤15µV/°C), making it suitable for industrial environments and outdoor sensor deployments where ambient temperatures fluctuate widely.
Can LT1113CN8#PBF drive capacitive loads without oscillation?
Yes, LT1113CN8#PBF is unconditionally stable for gains ≥1 with capacitive loads up to 1000pF. This eliminates the need for series isolation resistors in hydrophone or accelerometer interfaces, preserving signal integrity and simplifying layout - a key advantage over many competing JFET op amps that require external compensation.
LT1113CN8#PBF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- LT®
- Package/Case:
- 8-DIP (0.300", 7.62mm)
- Packaging:
- Tube
- Product Status:
- Active
- Amplifier Type:
- J-FET
- Number of Circuits:
- 2
- Output Type:
- -
- Slew Rate:
- 3.9V/µs
- Gain Bandwidth Product:
- 5.6 MHz
- -3db Bandwidth:
- -
- Current - Input Bias:
- 300 pA
- Voltage - Input Offset:
- 550 µV
- Current - Supply:
- 5.3mA (x2 Channels)
- Current - Output / Channel:
- -
- Voltage - Supply Span (Min):
- 9 V
- Voltage - Supply Span (Max):
- 40 V
- Operating Temperature:
- -40°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Through Hole
- Supplier Device Package:
- 8-PDIP
LT1113CN8#PBF FAQ
1.How can I place an order for LT1113CN8#PBF through Aetrix?
Please submit a Request for Quotation (RFQ) for LT1113CN8#PBF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LT1113CN8#PBF reliable?
The price and inventory of LT1113CN8#PBF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LT1113CN8#PBF is usually 5 days.
3.What payment methods are accepted for LT1113CN8#PBF?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LT1113CN8#PBF transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LT1113CN8#PBF?
LT1113CN8#PBF orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LT1113CN8#PBF order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LT1113CN8#PBF?
For technical support, including LT1113CN8#PBF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LT1113CN8#PBF requirements.
6.How does Aetrix verify that LT1113CN8#PBF is sourced from the original manufacturer or authorized distributors?
All LT1113CN8#PBF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LT1113CN8#PBF meets industry standards.
7.What is the process for return or replacement of LT1113CN8#PBF?
All LT1113CN8#PBF units undergo pre-shipment inspection (PSI). If there is an issue with LT1113CN8#PBF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LT1113CN8#PBF part is unused and in its original packaging.
Return procedure for LT1113CN8#PBF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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