Analog Devices Inc. LT1115CSW#PBF
- Part No.:
- LT1115CSW#PBF
- Manufacturer:
- Analog Devices Inc.
- Category:
- Instrumentation, Op Amps, Buffer Amps
- Package:
- 16-SOIC (0.295", 7.50mm Width)
- Datasheet:
-
LT1115CSW#PBF.pdf
- Description:
- IC AUDIO 1 CIRCUIT 16SO
- Quantity:
- Payment:

- Shipping:

Inventory:202
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
LT1115CSW#PBF from Analog Devices (acquired Linear Technology) is an ultralow-noise, low-distortion audio operational amplifier in a 16-lead SOIC-Wide package. It delivers 0.9nV/√Hz input voltage noise at 1kHz, 40MHz gain-bandwidth product, 10V/µs slew rate, and <0.002% THD at 10kHz with 7VRMS output into 600Ω - enabling high-fidelity RIAA phonograph preamplifiers and microphone preamps.
For engineers reviewing the LT1115CSW#PBF datasheet, LT1115CSW#PBF pinout, LT1115CSW#PBF application, or LT1115CSW#PBF equivalent, key selection criteria include verified 1.2nV/√Hz max voltage noise, tested current noise (1.2–2.2pA/√Hz), guaranteed 100dB+ CMRR/PSRR over temperature, and compatibility with low-impedance source configurations (<400Ω) for optimal total input-referred noise performance.
Technical Context
The LT1115CSW#PBF uses a precision bipolar input stage optimized for ultralow voltage noise, operating input transistors at ~1mA collector current - resulting in 0.9nV/√Hz typical noise but higher current noise (1.2pA/√Hz typ) than general-purpose op amps. Its architecture requires careful attention to source resistance matching and low-ESR supply bypassing to avoid degrading noise performance.
It is not unity-gain stable without external overcompensation (e.g., 30pF capacitor between pins 5 and 6), and exhibits strong gain-dependent bandwidth behavior: GBW is 40MHz min at AV ≥ 10, but unsuitable for AV = 1 configurations. Output drive capability is rated for ±14.5V swing into 2kΩ and ±11V into 600Ω with ±18V supplies.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Voltage Noise Density | 0.9nV/√Hz typ at 1kHz - enables sub-2nV/√Hz total input noise with matched source resistances ≤400Ω |
| THD + Noise | <0.002% at 10kHz, AV = –10, 7VRMS out into 600Ω - meets high-end audio line-level distortion requirements |
| Gain-Bandwidth Product | 40MHz min - supports stable closed-loop operation up to ~4MHz at AV = 10, requiring layout control for stability |
| Slew Rate | 10V/µs min - supports full-swing 20VP-P output at ≥100kHz without slewing-induced distortion |
| Input Offset Voltage | 75µV max over temperature - ensures DC-coupled RIAA networks maintain <0.1dB gain accuracy across frequency |
| CMRR / PSRR | 100dB min over 0°C–70°C - rejects supply ripple and common-mode interference in single-ended audio signal paths |
| Supply Current | 9.3mA typ at ±18V - requires thermal-aware PCB layout due to ~150mW quiescent dissipation in SOIC-Wide package |
Pinout & Package
The LT1115CSW#PBF is housed in a 16-lead plastic SOIC-Wide (SW) package with 0.300-inch body width, JEDEC MS-013AC compliant, θJA = 130°C/W. Pin 1 is marked by notch or cavity; leads are gull-wing, surface-mount compatible.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1, 2, 8, 9, 10, 11, 12, 13 | No Connect (NC) | Internally unconnected - must remain floating; no routing or grounding permitted |
| 3, 14 | Offset Null (TRIM) | Adjusts input offset via external potentiometer (10kΩ typical); unused pins may be left open |
| 4 | Inverting Input (–IN) | Differential input node; requires symmetric trace routing and guard ring for low-noise applications |
| 5 | Non-Inverting Input (+IN) | Differential input node; matched impedance to –IN critical for CMRR and noise cancellation |
| 6 | Negative Supply (V–) | Return path for negative rail; must be decoupled with ≤1µF low-ESR ceramic + bulk electrolytic |
| 7 | Output (OUT) | Class-A output stage; drives ≤27mA; sensitive to capacitive loading (>100pF requires isolation resistor) |
| 15 | Positive Supply (V+) | Return path for positive rail; separate bypassing required from V– to minimize ground loop noise |
| 16 | Overcompensation (OVERCOMP) | Connects to pin 5 via external capacitor (e.g., 30pF) to stabilize unity-gain or low-gain configurations |
Key Features
| Feature | Design Value |
|---|---|
| Ultralow voltage noise floor | 0.9nV/√Hz typ at 1kHz - lowest among monolithic op amps at time of release, enabling hydrophone and IR detector amplification |
| 100% noise testing | Voltage and current noise individually tested per unit - guarantees spec compliance without derating for production audio systems |
| RIAA response fidelity | Measured deviation <±0.2dB from ideal curve (20Hz–20kHz) in reference phonograph preamp - eliminates need for post-correction EQ |
| High slew rate with low distortion | 10V/µs min slew + <0.002% THD at 10kHz - preserves transient integrity in mastering and broadcast audio chains |
| Low 1/f noise corner | 250Hz current noise corner - maintains wideband noise advantage down to 10Hz for seismic and bio-potential sensing |
Applications
| High-Fidelity Phonograph Preamp | Low-Noise Microphone Preamplifier |
|---|---|
Use Scenario: Amplifying moving-coil cartridge signals (200µV–5mV) with RIAA equalization before ADC or analog distribution. IC Role / Device Role / Timing Role: Primary gain stage and active RIAA network integrator; sets system noise floor and frequency response accuracy. Use Value: Achieves <±0.2dB RIAA deviation and <0.002% THD, eliminating need for digital correction and preserving analog signal integrity. | Use Scenario: Boosting low-level condenser microphone outputs (1–10mV) to line level (1–2V) in studio recording interfaces. IC Role / Device Role / Timing Role: First-stage low-noise amplifier with balanced input; defines SNR and headroom of entire signal chain. Use Value: Delivers 120nV RMS wideband noise (DC–20kHz), enabling >110dB A-weighted SNR with 150Ω source impedance. |
| Instrumentation Amplifier Front-End | Low-Distortion Oscillator Core |
Use Scenario: Conditioning ultra-low-level sensor outputs (e.g., hydrophones, strain gauges) where source impedances are <400Ω. IC Role / Device Role / Timing Role: Differential input buffer and gain-setting stage in 3-op-amp IA topology; determines input-referred noise and CM rejection. Use Value: Enables sub-2nV/√Hz total input noise when paired with matched 100Ω source resistors - critical for underwater acoustic detection. | Use Scenario: Generating ultra-pure sine waves (1kHz–20kHz) for calibration sources and audio test equipment. IC Role / Device Role / Timing Role: Gain element in Wien-bridge or twin-T oscillator; sets harmonic purity and amplitude stability. Use Value: Measures <5ppm THD+N at 1kHz, 20VP-P, outperforming discrete transistor oscillators in lab-grade signal generators. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar audio op amp applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| LTC6228IS8#PBF | Lower supply current (3.3mA), wider supply range (±1.25V to ±5.5V), higher GBW (1.4GHz), but 2.7nV/√Hz noise - 3× higher voltage noise than LT1115CSW#PBF | Targeted at portable, battery-powered, wideband instrumentation - not optimized for <1nV/√Hz audio front-ends | Select only if power efficiency or bandwidth outweighs noise priority; requires redesign for noise-sensitive audio paths |
| OPA1612AIDR | 1.1nV/√Hz noise (slightly higher), 40MHz GBW, rail-to-rail output, but lower slew rate (27V/µs) and untested current noise - lacks 100% noise screening | Designed for consumer audio DAC output stages and headphone drivers - less suited for mic preamp input stages | Acceptable for line-level buffering; not recommended for <5mV source signals where LT1115CSW#PBF's tested noise margin is decisive |
Compared with LTC6228IS8#PBF and OPA1612AIDR, the LT1115CSW#PBF remains uniquely specified for ultralow-noise, high-slew audio gain with 100% per-unit noise validation - making it irreplaceable in professional phonograph and studio microphone preamplifier designs where sub-1nV/√Hz performance is non-negotiable.
Availability
LT1115CSW#PBF is available at Aetrix Electronics and suitable for high-fidelity audio preamplifiers, professional microphone interface modules, and precision instrumentation amplifier front-ends requiring stable component supply with full traceability and long-term lifecycle support.
Supply support for LT1115CSW#PBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices, Inc. (ADI) is a global semiconductor leader specializing in high-performance analog, mixed-signal, and digital signal processing technologies.
The LT1115CSW#PBF belongs to Linear Technology's legacy precision audio op amp family, engineered specifically for applications demanding the lowest possible voltage noise and distortion in professional audio signal conditioning - including RIAA playback, studio mic preamps, and low-noise sensor interfaces.
FAQ
What is the maximum source resistance for optimal noise performance with the LT1115CSW#PBF?
The LT1115CSW#PBF achieves minimum total input-referred noise with matched source resistances ≤400Ω. At 1kHz, its 0.9nV/√Hz voltage noise dominates below this threshold; above 400Ω, resistor and current noise increase total noise. The datasheet confirms LT1115CSW#PBF is optimal for low-Z sources such as moving-coil cartridges (typically 5–40Ω) and transformer-coupled microphones (150–200Ω).
Can the LT1115CSW#PBF be used in unity-gain configurations?
No - the LT1115CSW#PBF is not unity-gain stable. It requires external overcompensation, typically a 30pF capacitor between pins 5 (+IN) and 16 (OVERCOMP), to achieve stability at AV = 1. Without this capacitor, the LT1115CSW#PBF exhibits peaking and oscillation. The datasheet explicitly warns against using LT1115CSW#PBF in unity-gain followers or inverters without compensation.
What is the operating temperature range for the LT1115CSW#PBF?
LT1115CSW#PBF is specified for an operating temperature range of 0°C to 70°C. This commercial-grade rating matches its SOIC-Wide (SW) package thermal characteristics (TJMAX = 115°C, θJA = 130°C/W). Storage temperature extends from –65°C to +150°C, and lead soldering tolerance is rated for 300°C for 10 seconds.
How does the LT1115CSW#PBF compare to the LT1028 in noise performance?
The LT1115CSW#PBF matches the LT1028's 0.9nV/√Hz typical voltage noise at 1kHz and shares identical 100% per-unit voltage/current noise testing. However, LT1115CSW#PBF offers higher slew rate (10V/µs vs. 5V/µs), greater GBW (40MHz vs. 50MHz), and improved distortion (<0.002% THD vs. <0.003%). Both are optimized for low-Z sources, but LT1115CSW#PBF provides superior dynamic performance in audio gain stages.
Is the LT1115CSW#PBF pin-compatible with other SOIC-16 op amps?
No - the LT1115CSW#PBF has a unique pinout: pins 1, 2, 8–13 are NC; pins 3 and 14 are TRIM; pin 16 is OVERCOMP. This differs fundamentally from standard SOIC-16 op amps (e.g., dual/quad layouts or single op amps with power/inputs/outputs on conventional pins). Direct replacement would require PCB redesign; LT1115CSW#PBF must be laid out per its specific pin map.
LT1115CSW#PBF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 16-SOIC (0.295", 7.50mm Width)
- Packaging:
- Tube
- Product Status:
- Active
- Amplifier Type:
- Audio
- Number of Circuits:
- 1
- Output Type:
- -
- Slew Rate:
- 15V/µs
- Gain Bandwidth Product:
- 70 MHz
- -3db Bandwidth:
- -
- Current - Input Bias:
- 50 nA
- Voltage - Input Offset:
- 50 µV
- Current - Supply:
- 8.5mA
- Current - Output / Channel:
- -
- Voltage - Supply Span (Min):
- 8 V
- Voltage - Supply Span (Max):
- 40 V
- Operating Temperature:
- 0°C ~ 70°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 16-SO
LT1115CSW#PBF FAQ
1.How can I place an order for LT1115CSW#PBF through Aetrix?
Please submit a Request for Quotation (RFQ) for LT1115CSW#PBF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LT1115CSW#PBF reliable?
The price and inventory of LT1115CSW#PBF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LT1115CSW#PBF is usually 5 days.
3.What payment methods are accepted for LT1115CSW#PBF?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LT1115CSW#PBF transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LT1115CSW#PBF?
LT1115CSW#PBF orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LT1115CSW#PBF order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LT1115CSW#PBF?
For technical support, including LT1115CSW#PBF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LT1115CSW#PBF requirements.
6.How does Aetrix verify that LT1115CSW#PBF is sourced from the original manufacturer or authorized distributors?
All LT1115CSW#PBF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LT1115CSW#PBF meets industry standards.
7.What is the process for return or replacement of LT1115CSW#PBF?
All LT1115CSW#PBF units undergo pre-shipment inspection (PSI). If there is an issue with LT1115CSW#PBF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LT1115CSW#PBF part is unused and in its original packaging.
Return procedure for LT1115CSW#PBF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
LT1115CSW#PBF Tags

-
LM358DT
STMicroelectronics

-
LM358DR
Texas Instruments

-
LM2904DR
Texas Instruments

-
LM358ADR
Texas Instruments
-
LM2904DGKR
Texas Instruments
-
LM324DR
Texas Instruments

-
MCP6006T-E/OT
Microchip Technology

-
MCP6006UT-E/OT
Microchip Technology

-
LM324PWR
Texas Instruments

-
LM2902PWR
Texas Instruments
-
LM2902DR
Texas Instruments

-
LM358P
Texas Instruments
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

