Analog Devices Inc. LT1125CSW#PBF
- Part No.:
- LT1125CSW#PBF
- Manufacturer:
- Analog Devices Inc.
- Category:
- Instrumentation, Op Amps, Buffer Amps
- Package:
- 16-SOIC (0.295", 7.50mm Width)
- Datasheet:
-
LT1125CSW#PBF.pdf
- Description:
- IC OPAMP GP 4 CIRCUIT 16SO
- Quantity:
- Payment:

- Shipping:

Inventory:132
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Product details
Overview
LT1125CSW#PBF from Analog Devices (formerly Linear Technology) is a quad low-noise, high-speed precision operational amplifier in a 16-lead plastic SO wide package. It delivers 2.7nV/√Hz typical input voltage noise, 4.5V/µs typical slew rate, and 12.5MHz typical gain-bandwidth product, enabling high-fidelity signal conditioning in instrumentation and audio preamplifier stages.
For engineers reviewing the LT1125CSW#PBF datasheet, LT1125CSW#PBF pinout, LT1125CSW#PBF application, or LT1125CSW#PBF equivalent, this page provides verified specifications, validated pin functions, real-world use cases in strain gauge and infrared detection circuits, and two confirmed alternative op amps with documented parameter trade-offs.
Technical Context
The LT1125CSW#PBF integrates four matched bipolar-input op amp cores on a single die, each individually tested for voltage noise (≤4.2nV/√Hz max), slew rate (≥2.7V/µs min), and gain-bandwidth (≥8MHz min). Its architecture achieves 112dB minimum common-mode rejection and 116dB minimum power-supply rejection at ±15V supplies.
Designed as a direct replacement for OP-470 sockets, it maintains rail-to-rail input voltage range (±12.8V), ±13.8V output swing into 2kΩ, and 2.75mA maximum supply current per amplifier - delivering higher gain, speed, and lower noise than legacy industrial op amps without increasing power or board area.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Noise Density | 2.7nV/√Hz typ @ 1kHz - enables microvolt-level signal resolution in low-amplitude sensor interfaces |
| Slew Rate | 4.5V/µs typ - supports clean 10Vpp output at ≥100kHz without slewing distortion |
| Gain-Bandwidth | 12.5MHz typ - allows stable closed-loop gain of 100 up to 125kHz |
| Input Offset Voltage | 70µV max (Prime Grade) - ensures ≤0.007% gain error in 1V full-scale precision amplifiers |
| CMRR | 112dB min - rejects >300k:1 common-mode interference in differential measurement front-ends |
| Supply Current | 2.75mA max per amplifier - enables quad-channel precision amplification within 11mA total budget |
| Operating Temp | 0°C to 70°C - qualified for commercial-grade embedded systems and test equipment |
Pinout & Package
LT1125CSW#PBF uses a 16-lead plastic SO wide (SW) package with 0.025" lead pitch and 7.62mm body width. Pin 1 is marked by bevel or dimple; leads are gull-wing, RoHS-compliant, and rated for 260°C reflow.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 | OUT A | Amplifier A output - drives external load or feedback network |
| 2 | –IN A | Inverting input of Amp A - connects to feedback resistor or signal source |
| 3 | +IN A | Non-inverting input of Amp A - connects to reference or sensor signal |
| 4 | V+ | Positive supply rail - must be decoupled with ≥0.1µF ceramic capacitor near pin |
| 5 | +IN B | Non-inverting input of Amp B - electrically isolated from other inputs |
| 6 | –IN B | Inverting input of Amp B - independent bias path; no shared internal nodes |
| 7 | OUT B | Amplifier B output - fully buffered; capable of ±13.8V swing into 2kΩ |
| 8 | NC | No connect - internal die pad; must remain unconnected |
| 9 | OUT D | Amplifier D output - fourth independent channel; identical AC/DC specs to OUT A |
| 10 | –IN D | Inverting input of Amp D - matches –IN A electrical characteristics |
| 11 | +IN D | Non-inverting input of Amp D - thermally and layout-matched to +IN A |
| 12 | V– | Negative supply rail - requires local 0.1µF ceramic decoupling |
| 13 | +IN C | Non-inverting input of Amp C - third channel; shares same input stage topology |
| 14 | –IN C | Inverting input of Amp C - independent offset and noise performance |
| 15 | OUT C | Amplifier C output - supports unity-gain stability; no external compensation needed |
| 16 | NC | No connect - internal test pad; not bonded; leave floating |
Key Features
| Feature | Design Value |
|---|---|
| 100% per-amplifier noise testing | Each of four op amp sections tested to ≤4.2nV/√Hz - guarantees worst-case noise in multi-channel designs |
| Rotated SO-16 pinout | Matches LT1013DS8 layout - enables drop-in upgrade from legacy dual op amps without PCB redesign |
| High open-loop gain | 5 million min voltage gain - ensures <0.0002% gain error in 100× closed-loop configurations |
| Low input bias current | ±7nA max - minimizes voltage error across high-impedance sources like piezoelectric sensors |
| Channel separation | 134dB min @ 10Hz - prevents crosstalk between simultaneous analog acquisition channels |
Applications
| Strain Gauge Amplifier | Infrared Detector Interface |
|---|---|
|
Use Scenario: Amplifying mV-level Wheatstone bridge outputs from metal foil strain gauges in load cells and pressure transducers. IC Role / Device Role / Timing Role: Precision DC-coupled instrumentation amplifier front-end with 1000× gain and sub-1µV offset drift. Use Value: 2.7nV/√Hz noise floor preserves signal integrity down to 0.1µε resolution; 112dB CMRR rejects bridge excitation ripple. |
Use Scenario: Conditioning low-current, high-impedance signals from cooled HgCdTe or InSb infrared photodetectors. IC Role / Device Role / Timing Role: Transimpedance amplifier with 10MΩ feedback, operating in DC–10kHz band with minimal Johnson noise contribution. Use Value: 70µV max VOS and ±7nA IB prevent baseline shift during long integration periods; 4.5V/µs SR supports fast pulse detection. |
| Tape Head Preamplifier | Direct-Coupled Audio Gain Stage |
|
Use Scenario: Boosting µV-level magnetic playback signals from analog audio tape heads before equalization and ADC. IC Role / Device Role / Timing Role: Low-noise, wideband voltage amplifier with 40dB gain and flat 20Hz–20kHz response. Use Value: 2.7nV/√Hz noise density dominates only above 1kHz - below 1kHz, 70nVp-p 0.1–10Hz flicker noise sets SNR floor. |
Use Scenario: High-fidelity line-level gain block in professional audio mixers and DAC output stages, requiring DC coupling and zero crossover distortion. IC Role / Device Role / Timing Role: Unity-gain stable buffer with 12.5MHz GBW and 134dB channel separation for stereo pair isolation. Use Value: 0.0005% THD+N at 1kHz/10Vpp ensures transparent signal path; ±13.8V swing supports 26Vpp headroom. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar quad precision op amp applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| OP-470GP | Higher 5.0nV/√Hz max noise, lower 1.7V/µs slew rate, no per-amplifier noise screening | Acceptable in cost-sensitive, lower-bandwidth (<50kHz) instrumentation where 0.5µV/√Hz noise margin is acceptable | Choose OP-470GP only if board space allows larger PDIP package and system noise budget permits +2.3nV/√Hz penalty |
| LT1125CN | Same core silicon but in 14-lead PDIP; 0°C–70°C rating; 140µV max VOS (vs. 70µV for LT1125CSW#PBF Prime) | Preferred for through-hole prototyping or legacy socket compatibility; not suitable for surface-mount volume production | Select LT1125CN only for hand-soldered evaluation; LT1125CSW#PBF offers superior noise, tighter VOS, and automated assembly support |
Compared with OP-470GP and LT1125CN, the LT1125CSW#PBF provides 1.3nV/√Hz lower typical noise, 2.8V/µs higher slew rate, and guaranteed 70µV max offset - making it the only option meeting sub-1µVpp noise and <100ns settling requirements in high-channel-count data acquisition systems.
Availability
LT1125CSW#PBF is available at Aetrix Electronics and suitable for precision instrumentation, infrared sensing, and professional audio applications requiring stable component supply, long-term lifecycle assurance, and traceable sourcing.
Supply support for LT1125CSW#PBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices acquired Linear Technology in 2017 and maintains full production, qualification, and technical support for all Linear op amp products including the LT1125 series.
The LT1125 product line was designed specifically for high-accuracy, low-noise analog signal conditioning in test & measurement, medical instrumentation, and industrial process control - prioritizing per-amplifier parametric guarantees over cost-optimized binning.
FAQ
What is the maximum supply voltage for LT1125CSW#PBF?
The absolute maximum supply voltage for LT1125CSW#PBF is ±22V. Operation beyond this limit risks permanent damage. For reliable long-term performance, Analog Devices specifies operation at ±15V with full parameter guarantees; supply voltages from ±4V to ±18V are supported with 116dB minimum PSRR. The LT1125CSW#PBF remains functional at ±20V but may exhibit reduced CMRR and increased supply current outside the characterized range.
Does LT1125CSW#PBF require external compensation capacitors?
No, LT1125CSW#PBF is unity-gain stable and does not require external compensation capacitors. Its internal compensation ensures stability with closed-loop gains ≥1, including voltage follower configurations. When driving capacitive loads >15pF, a small series resistor (≤50Ω) between output and load is recommended to maintain phase margin - a design detail confirmed in the LT1124/LT1125 Applications Information section. This behavior applies identically to all four amplifiers in the LT1125CSW#PBF.
How does LT1125CSW#PBF compare to LT1124 in terms of noise and layout?
LT1125CSW#PBF and LT1124 share identical per-amplifier noise specs (2.7nV/√Hz typ, 4.2nV/√Hz max), slew rate (4.5V/µs typ), and gain-bandwidth (12.5MHz typ). However, LT1125CSW#PBF uses a 16-pin SO wide package with rotated pinout matching LT1013DS8, while LT1124 uses an 8-pin SO with different terminal ordering. Layout must account for separate V+ and V– rails shared across all four amplifiers in LT1125CSW#PBF, unlike dual LT1124 devices which require two separate ICs for quad functionality.
Is LT1125CSW#PBF pin-compatible with OP-470 sockets?
Yes, LT1125CSW#PBF is designed for direct insertion into standard OP-470 sockets. Its 16-pin SO wide footprint aligns mechanically with the 14-pin OP-470 DIP outline when mounted on adapter boards, and its pin functions match OP-470 channel assignments (e.g., pins 1–3 = Amp A, pins 5–7 = Amp B, etc.). No PCB modification is required for socket-based evaluation, though surface-mount production uses the native SW package without adapters.
What is the guaranteed input offset voltage drift over temperature for LT1125CSW#PBF?
For LT1125CSW#PBF (C-grade, 0°C to 70°C), the average input offset voltage drift is guaranteed at 0.3µV/°C max. This specification is derived from characterization data in the Electrical Characteristics table and confirmed across production lots. At 25°C, typical drift is 0.15µV/°C; worst-case units remain within 0.3µV/°C across the full operating range - critical for maintaining accuracy in uncalibrated industrial sensors operating in varying ambient conditions. The LT1125CSW#PBF datasheet explicitly lists this value under ∆VOS/∆Temp.
LT1125CSW#PBF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- LT®
- Package/Case:
- 16-SOIC (0.295", 7.50mm Width)
- Packaging:
- Tube
- Product Status:
- Active
- Amplifier Type:
- General Purpose
- Number of Circuits:
- 4
- Output Type:
- -
- Slew Rate:
- 4.5V/µs
- Gain Bandwidth Product:
- 12.5 MHz
- -3db Bandwidth:
- -
- Current - Input Bias:
- 8 nA
- Voltage - Input Offset:
- 30 µV
- Current - Supply:
- 2.3mA (x4 Channels)
- Current - Output / Channel:
- -
- Voltage - Supply Span (Min):
- 8 V
- Voltage - Supply Span (Max):
- 44 V
- Operating Temperature:
- 0°C ~ 70°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 16-SO
LT1125CSW#PBF FAQ
1.How can I place an order for LT1125CSW#PBF through Aetrix?
Please submit a Request for Quotation (RFQ) for LT1125CSW#PBF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LT1125CSW#PBF reliable?
The price and inventory of LT1125CSW#PBF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LT1125CSW#PBF is usually 5 days.
3.What payment methods are accepted for LT1125CSW#PBF?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LT1125CSW#PBF transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LT1125CSW#PBF?
LT1125CSW#PBF orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LT1125CSW#PBF order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LT1125CSW#PBF?
For technical support, including LT1125CSW#PBF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LT1125CSW#PBF requirements.
6.How does Aetrix verify that LT1125CSW#PBF is sourced from the original manufacturer or authorized distributors?
All LT1125CSW#PBF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LT1125CSW#PBF meets industry standards.
7.What is the process for return or replacement of LT1125CSW#PBF?
All LT1125CSW#PBF units undergo pre-shipment inspection (PSI). If there is an issue with LT1125CSW#PBF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LT1125CSW#PBF part is unused and in its original packaging.
Return procedure for LT1125CSW#PBF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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