Analog Devices Inc. LT1168ACN8#PBF

Overview

LT1168ACN8#PBF from Analog Devices (acquired Linear Technology) is a micropower, precision instrumentation amplifier requiring only one external resistor to set gains from 1 to 10,000. It delivers 10nV/√Hz input voltage noise at 1kHz, 40µV max input offset voltage, and 90dB CMRR at G=1 while operating from ±2.3V to ±18V supplies with just 530µA max supply current. It is widely deployed in strain gauge and thermocouple amplification within industrial sensor signal chains.

For engineers reviewing the LT1168ACN8#PBF datasheet, LT1168ACN8#PBF pinout, LT1168ACN8#PBF application, or LT1168ACN8#PBF equivalent, this page provides verified pin functions, gain-programming design meaning, load-capacitance stability limits up to 1000pF, and validated alternatives for bridge amplifier and medical instrumentation designs.

Technical Context

The LT1168ACN8#PBF implements a laser-trimmed, three-op-amp instrumentation architecture with superbeta NPN input transistors enabling 250pA max input bias current and 300GΩ min input resistance. Its gain is set by a single external resistor RG across pins 1 and 8 per G = 1 + (49.4kΩ/RG), with internal 24.7kΩ trimmed resistors ensuring 0.4% max gain error at G=10.

It features ESD-hardened inputs (13kV HBM), rail-to-rail output swing capability (±VS −1.3V), and stable operation into 1000pF capacitive loads across all gain configurations. The REF pin (pin 5) establishes the output's reference level, and series resistance here directly degrades CMRR - e.g., 6Ω reduces CMRR from 90dB to 80dB at G=1.

Key Specifications

Pinout & Package

LT1168ACN8#PBF is housed in an 8-pin PDIP (plastic dual in-line package) with 0.3-inch body width and standard through-hole mounting. Pin spacing is 0.1 inch, compatible with legacy prototyping and industrial PCB layouts.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar instrumentation amplifier applications.

Compared with AD620ARZ and INA128UA, the LT1168ACN8#PBF uniquely combines micropower operation (530µA), IEC-compliant ESD robustness, and guaranteed low-load nonlinearity - making it the preferred choice for cost-sensitive, high-accuracy industrial sensor nodes where board space and calibration labor are constrained.

Availability

LT1168ACN8#PBF is available at Aetrix Electronics and suitable for bridge amplifiers, strain gauge interfaces, and thermocouple signal conditioning requiring stable component supply across extended temperature ranges and multi-year production cycles.

Supply support for LT1168ACN8#PBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Analog Devices, Inc. (ADI) is a global leader in high-performance analog, mixed-signal, and digital signal processing technologies, serving industrial, automotive, communications, and healthcare markets.

The LT1168 product line was originally developed by Linear Technology (acquired by ADI in 2017) to deliver precision instrumentation amplification with single-resistor gain control, ultra-low power, and industrial-grade reliability for sensor signal conditioning.

FAQ

What is the maximum capacitive load the LT1168ACN8#PBF can drive stably?

The LT1168ACN8#PBF is characterized for stable operation with up to 1000pF capacitive load across all gain configurations (G = 1 to 10,000). This specification is verified in the datasheet's "Overshoot vs Capacitive Load" plot (Figure 1168 G16), where overshoot remains below 10% at 1000pF for G = 1, 10, 100, and 1000. Exceeding this limit may cause ringing or instability in the LT1168ACN8#PBF output stage.

Does the LT1168ACN8#PBF require external trimming for offset voltage?

No, the LT1168ACN8#PBF is laser-trimmed at wafer level for input offset voltage (40µV max) and drift (0.3µV/°C), eliminating the need for external trimming in most applications. The datasheet explicitly states "no external offset trimming is required for most applications." Optional trimming circuits (e.g., Figure 1168 F04) exist but are reserved for ultra-high-accuracy systems demanding sub-5µV residual offset - not a requirement for standard use of the LT1168ACN8#PBF.

Can the LT1168ACN8#PBF operate from a single 5V supply?

Yes, the LT1168ACN8#PBF supports single-supply operation down to +2.3V (with ground as –VS). For 5V operation, the input common-mode range is –VS + 1.9V to +VS – 1.4V, i.e., +1.9V to +3.6V, and the output swings from +1.2V to +3.8V (RL = 10kΩ). To ensure proper operation, the REF pin must be biased above ground (e.g., 2.5V), and one input should remain ≥2.5V - as demonstrated in the "Single Supply Pressure Monitor" application (Figure 1168 TA01a).

What is the gain error specification for LT1168ACN8#PBF at G = 100?

For the LT1168ACN8#PBF, the gain error is specified as 0.4% max at G = 100 under standard conditions (TA = 25°C, VS = ±15V). This value is confirmed in the "ELECTRICAL CHARACTERISTICS" table on page 3 of the datasheet, under the LT1168AC column. The error excludes tolerance of the external RG resistor - actual system gain error depends on both LT1168ACN8#PBF's intrinsic error and the 1% tolerance of the selected RG.

How does the LT1168ACN8#PBF achieve its 13kV HBM ESD rating?

The LT1168ACN8#PBF achieves 13kV HBM ESD protection through integrated input-stage clamping structures and robust oxide design in its bipolar process. This rating is measured per JEDEC JS-001 and is independent of external components. Notably, the device passes IEC 1000-4-2 Level 4 (±15kV contact) only when two external 5kΩ resistors are added - confirming that the core LT1168ACN8#PBF silicon provides foundational ESD hardness, while system-level compliance requires defined external network implementation.