Analog Devices Inc. LT1361CS8#PBF
- Part No.:
- LT1361CS8#PBF
- Manufacturer:
- Analog Devices Inc.
- Category:
- Instrumentation, Op Amps, Buffer Amps
- Package:
- 8-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
LT1361CS8#PBF.pdf
- Description:
- IC VOLTAGE FEEDBACK 2 CIRC 8SO
- Quantity:
- Payment:

- Shipping:

Inventory:233
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Product details
Overview
LT1361CS8#PBF from Analog Devices (formerly Linear Technology) is a dual high-speed voltage-feedback operational amplifier with 50MHz gain bandwidth, 800V/µs slew rate, and unity-gain stability into any capacitive load. It delivers ±13V output swing into 500Ω at ±15V supplies and supports precision video buffering, active filtering, and data acquisition front-ends.
For engineers reviewing the LT1361CS8#PBF datasheet, LT1361CS8#PBF pinout, LT1361CS8#PBF application, or LT1361CS8#PBF equivalent, key selection criteria include its C-load drive capability, low 9nV/√Hz input noise, 1mV max input offset voltage, and guaranteed performance across ±2.5V to ±15V supply ranges.
Technical Context
The LT1361CS8#PBF employs a proprietary voltage-feedback topology with matched high-impedance inputs and current-feedback-like slewing behavior. Its single-stage design enables 60ns settling time to 0.1% for a 10V step and stable operation with unlimited capacitive loading - critical for cable driving and buffer applications.
Each amplifier features complementary NPN/PNP input stage bias cancellation, enabling low 1µA max input bias current and 250nA max input offset current. The device is specified over –40°C to 85°C and supports rail-to-rail input common-mode range up to ±13.4V at ±15V supplies.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Gain Bandwidth | 50MHz at ±15V - enables stable closed-loop operation up to 5MHz in G=10 configuration. |
| Slew Rate | 800V/µs at ±15V - supports full-scale 10V transitions in under 12.5ns without distortion. |
| Input Offset Voltage | 1mV max - ensures ≤10mV error in 10V full-scale signal paths without trimming. |
| Input Noise Voltage | 9nV/√Hz at 10kHz - preserves SNR in low-level analog signal conditioning stages. |
| Output Swing | ±13V into 500Ω at ±15V - drives standard 75Ω video lines via series termination with headroom. |
| Supply Current | 5mA per amplifier max - enables dual-channel high-speed amplification within 10mA total budget. |
| Capacitive Load Drive | Stable with any CL - eliminates need for isolation resistors in coaxial cable or ADC input buffer designs. |
Pinout & Package
The LT1361CS8#PBF is housed in an 8-lead plastic SOIC (S8) package with 1.27mm pitch, JEDEC MS-012AC compliant, and rated for 190°C/W junction-to-ambient thermal resistance.
| Pin | Circuit Role | Design Meaning |
|---|---|---|
| 1 | Inverting Input A | Differential input node for first amplifier; accepts balanced source impedance for optimal DC accuracy. |
| 2 | Non-inverting Input A | High-impedance input referenced to V–; supports rail-to-rail common-mode range. |
| 3 | Positive Supply (V+) | Connects to +VS; must be bypassed with 0.01µF ceramic + 1µF tantalum for high-current transients. |
| 4 | Inverting Input B | Differential input node for second amplifier; electrically isolated from Channel A. |
| 5 | Non-inverting Input B | Independent high-Z input for Channel B; matches Channel A's DC and AC specs. |
| 6 | Negative Supply (V–) | Connects to –VS; shares ground plane with V+ bypass caps to minimize PSRR degradation. |
| 7 | Output B | Low-impedance output capable of ±3.2V into 150Ω at ±5V supplies. |
| 8 | Output A | Full-swing output supporting ±13V into 500Ω at ±15V; optimized for pulse fidelity. |
Key Features
| Feature | Design Value |
|---|---|
| C-Load™ stability | Guaranteed unity-gain stability with unlimited capacitive loads - eliminates external compensation in video line drivers. |
| High slew rate / low power ratio | 800V/µs at only 5mA per amp - outperforms legacy 50MHz op-amps by >2× in efficiency. |
| Low distortion video performance | 0.2% differential gain / 0.3° differential phase at 3.58MHz - meets NTSC/PAL broadcast requirements. |
| Wide supply range | Operates from ±2.5V to ±15V - supports both low-voltage portable systems and industrial ±12V rails. |
| Fast settling | 60ns to 0.1% for 10V step - enables ≥10MSPS sampling in data acquisition front-ends. |
Applications
| Video Line Driver | Active Anti-Aliasing Filter |
|---|---|
Use Scenario: Driving 75Ω coaxial cable from FPGA DAC output in broadcast-quality video system. IC Role / Device Role / Timing Role: Buffer amplifier with unity-gain configuration and series 75Ω output termination. Use Value: Maintains 0.2% differential gain and 0.3° phase error at 3.58MHz while driving 100m cable without peaking or ringing. | Use Scenario: 4th-order Butterworth filter preceding 12-bit SAR ADC sampling at 1MSPS. IC Role / Device Role / Timing Role: Dual op-amp implementing two 2-pole sections in cascade; one channel per section. Use Value: 50MHz GBW ensures <0.01dB passband ripple to 100kHz and 60ns settling guarantees accurate sample capture. |
| Data Acquisition Front-End | High-Speed Instrumentation Amplifier |
Use Scenario: Conditioning ±10V sensor signals before digitization in automated test equipment. IC Role / Device Role / Timing Role: First-stage gain amplifier (G=2) followed by anti-aliasing filter; dual-channel parallel processing. Use Value: 9nV/√Hz input noise preserves microvolt-level resolution; ±13V swing accommodates overrange protection. | Use Scenario: Two-op-amp instrumentation amplifier for bridge sensor readout in industrial control. IC Role / Device Role / Timing Role: Dual LT1361CS8#PBF configured as difference amplifier with precision resistor network. Use Value: 1mV max VOS and 86dB CMRR at DC enable <0.1% gain error and 80dB rejection of 50Hz mains interference. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual high-speed op-amp applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| LT1364CS8#PBF | 70MHz GBW, 1000V/µs slew rate, 6.3mA supply current, 1.5mV VOS max | Higher speed but increased power; less suitable for battery-powered DAQ | Select when >50MHz closed-loop bandwidth or faster settling (<40ns) is required. |
| LT1358CS8#PBF | 25MHz GBW, 600V/µs slew rate, 2mA supply current, 0.6mV VOS max | Lower power and offset; insufficient for >10MHz video or fast-settling DAQ | Select when power budget <4mA/channel and bandwidth ≤20MHz suffices. |
Compared with LT1364CS8#PBF and LT1358CS8#PBF, the LT1361CS8#PBF uniquely balances 50MHz bandwidth, 800V/µs slew rate, and 5mA power - making it optimal for cost-sensitive, medium-speed video and data acquisition where C-load stability is mandatory.
Availability
LT1361CS8#PBF is available at Aetrix Electronics and suitable for video line driving, active filtering, and data acquisition systems requiring stable component supply, long-term obsolescence management, and traceable sourcing.
Supply support for LT1361CS8#PBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices acquired Linear Technology in 2017 and maintains full product support, datasheet archives, and application engineering for legacy Linear parts.
The LT1361CS8#PBF belongs to Linear's C-grade high-speed op-amp family, designed specifically for demanding analog signal paths in video, instrumentation, and high-fidelity data acquisition where C-load stability and low distortion are non-negotiable.
FAQ
What is the maximum capacitive load the LT1361CS8#PBF can drive stably?
The LT1361CS8#PBF is specified for stable operation with any capacitive load - including infinite CL - due to its patented C-Load™ compensation architecture. This eliminates external isolation resistors in coaxial cable drivers and ADC input buffers. Measured performance shows stable step response even with 10,000pF loads, though bandwidth and phase margin decrease progressively with increasing capacitance.
Does the LT1361CS8#PBF support single-supply operation?
The LT1361CS8#PBF is specified for dual-supply operation from ±2.5V to ±15V and does not support true single-supply use. Its input common-mode range extends to within 1.1V of V– and 1.7V of V+ at ±2.5V supplies, but output swing is asymmetric and degraded below ±2.5V. For single-supply applications, consider rail-to-rail I/O op-amps like the AD8605 or LTC6241.
What is the thermal resistance (θJA) of the LT1361CS8#PBF package?
The LT1361CS8#PBF uses an 8-lead SOIC (S8) package with a junction-to-ambient thermal resistance (θJA) of 190°C/W, as documented in the Linear Technology datasheet revision A. This value assumes standard JEDEC 2-layer board conditions; actual θJA improves significantly with copper pour and thermal vias under the exposed pad (if present) or package body.
Can the LT1361CS8#PBF replace the LT1360 in a single-amplifier design?
No - the LT1361CS8#PBF is a dual-amplifier device and cannot directly replace the single-amplifier LT1360. While both share identical AC/DC specifications (50MHz GBW, 800V/µs slew rate), the LT1361CS8#PBF requires separate routing and decoupling for two independent channels. For single-channel drop-in replacement, use LT1360CS8#PBF; for dual-channel upgrades, verify PCB layout compatibility with the LT1361CS8#PBF's pinout.
What is the small-signal settling time of the LT1361CS8#PBF?
The LT1361CS8#PBF achieves 60ns settling time to 0.1% for a 10V output step in inverting configuration (AV = –1) at ±15V supplies, as measured per standard test conditions in the datasheet. Small-signal settling (e.g., 100mV step) is faster - typically ≤25ns - due to reduced slewing demand and lower output stage recovery time.
LT1361CS8#PBF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- LT®
- Package/Case:
- 8-SOIC (0.154", 3.90mm Width)
- Packaging:
- Tube
- Product Status:
- Active
- Amplifier Type:
- Voltage Feedback
- Number of Circuits:
- 2
- Output Type:
- -
- Slew Rate:
- 800V/µs
- Gain Bandwidth Product:
- 50 MHz
- -3db Bandwidth:
- -
- Current - Input Bias:
- 300 nA
- Voltage - Input Offset:
- 300 µV
- Current - Supply:
- 4mA (x2 Channels)
- Current - Output / Channel:
- 34 mA
- Voltage - Supply Span (Min):
- 5 V
- Voltage - Supply Span (Max):
- 30 V
- Operating Temperature:
- -40°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-SO
LT1361CS8#PBF FAQ
1.How can I place an order for LT1361CS8#PBF through Aetrix?
Please submit a Request for Quotation (RFQ) for LT1361CS8#PBF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LT1361CS8#PBF reliable?
The price and inventory of LT1361CS8#PBF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LT1361CS8#PBF is usually 5 days.
3.What payment methods are accepted for LT1361CS8#PBF?
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4.How is shipping managed for LT1361CS8#PBF?
LT1361CS8#PBF orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LT1361CS8#PBF order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LT1361CS8#PBF?
For technical support, including LT1361CS8#PBF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LT1361CS8#PBF requirements.
6.How does Aetrix verify that LT1361CS8#PBF is sourced from the original manufacturer or authorized distributors?
All LT1361CS8#PBF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LT1361CS8#PBF meets industry standards.
7.What is the process for return or replacement of LT1361CS8#PBF?
All LT1361CS8#PBF units undergo pre-shipment inspection (PSI). If there is an issue with LT1361CS8#PBF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LT1361CS8#PBF part is unused and in its original packaging.
Return procedure for LT1361CS8#PBF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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