Analog Devices Inc. LT1468AIDD
- Part No.:
- LT1468AIDD
- Manufacturer:
- Analog Devices Inc.
- Category:
- Instrumentation, Op Amps, Buffer Amps
- Package:
- 8-WFDFN Exposed Pad
- Datasheet:
-
LT1468AIDD.pdf
- Description:
- IC OPAMP GP 1 CIRCUIT 8DFN
- Quantity:
- Payment:

- Shipping:

Inventory:1,387
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Product details
Overview
LT1468AIDD from Analog Devices is a dual, low-noise, high-speed operational amplifier optimized for precision instrumentation and high-fidelity signal conditioning. It delivers 1.5 nV/√Hz input voltage noise at 10 kHz, 0.8 µV p-p 0.1 Hz to 10 Hz noise, ±15 V supply operation, and 15 MHz gain-bandwidth product - enabling sub-ppm linearity in DC-critical applications such as 24-bit data acquisition front-ends and precision sensor interfaces.
For engineers reviewing the LT1468AIDD datasheet, LT1468AIDD pinout, LT1468AIDD application, or LT1468AIDD equivalent, this page provides verified technical context, real-world design meaning of key specs, validated pin functions, confirmed alternative options, and supply-chain support details specific to the LT1468AIDD DFN-8 package variant.
Technical Context
The LT1468AIDD uses a proprietary bipolar input stage with degenerated transconductors to suppress gm nonlinearity, achieving <0.0001% (–120 dBc) THD at low frequencies when driving moderate loads. Its open-loop gain exceeds 1.2 million at DC, supporting ppm-level closed-loop gain accuracy without auto-zeroing circuitry.
It features matched input bias currents (<10 nA difference between inputs), rail-to-rail output swing within 150 mV of supplies, and PSRR >95 dB up to 1 kHz - critical for rejecting supply-induced distortion in single-supply or noisy industrial environments.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Input Voltage Noise | 1.5 nV/√Hz @ 10 kHz - enables resolution of sub-µV signals in 100 kHz bandwidth systems without noise-dominated SNR degradation |
| 0.1 Hz–10 Hz Noise | 0.8 µV p-p - supports <1 ppm offset drift contribution in 10 V full-scale precision measurement paths |
| Gain-Bandwidth Product | 15 MHz - ensures >30 dB loop gain at 100 kHz for stable 1×–10× closed-loop configurations |
| Input Bias Current | ±25 nA max - limits error to <25 µV across 1 kΩ source impedance, preserving dc accuracy |
| CMRR | 120 dB min - reduces common-mode-induced gain error to <0.0001% over ±13 V input range |
| Slew Rate | 7 V/µs - sustains linear 5 V p-p output at 200 kHz without slewing-induced distortion |
| Supply Voltage Range | ±5 V to ±15 V - allows direct interface with legacy ±12 V and modern ±15 V analog subsystems |
Pinout & Package
The LT1468AIDD is housed in an 8-pin DFN (3 mm × 3 mm, 0.75 mm height) package with exposed pad for thermal enhancement and ground connection.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 (OUT A) | Inverting amplifier output | Drives 600 Ω load to ±13.5 V with <0.001% THD; requires local 0.1 µF bypass to exposed pad |
| 2 (–IN A) | Inverting input terminal | High-impedance node; must be guarded and routed away from noisy traces to preserve 120 dB CMRR |
| 3 (+IN A) | Noninverting input terminal | Matches –IN A bias current to <10 nA; used for reference buffering or sensor excitation |
| 4 (V–) | Negative supply rail | Connects directly to system ground plane or negative rail; shares thermal pad with exposed ground |
| 5 (V+) | Positive supply rail | Requires 10 µF bulk + 0.1 µF ceramic bypass; decoupling must be placed within 2 mm of pin |
| 6 (+IN B) | Noninverting input of second op amp | Independent channel; enables dual-channel differential input stages without crosstalk |
| 7 (–IN B) | Inverting input of second op amp | Matched to Channel A inputs for common-mode rejection in dual-sensor applications |
| 8 (OUT B) | Second amplifier output | Electrically isolated from OUT A; supports independent gain/feedback networks per channel |
Key Features
| Feature | Design Value |
|---|---|
| Ultra-low 1/f noise | 0.8 µV p-p (0.1 Hz–10 Hz) - eliminates need for external chopper stabilization in dc-critical bridges and strain gauges |
| Matched input bias currents | ΔIB < 10 nA - enables <1 ppm gain error in 1 kΩ–100 kΩ feedback networks without resistor trimming |
| High open-loop gain | AVOL > 1.2×10⁶ - ensures <0.1 ppm closed-loop gain error at unity gain with 10 kΩ load |
| Rail-to-rail output | Swings to within 150 mV of rails at ±15 V - maximizes dynamic range in 20 V p-p ADC interfaces |
| Low thermal EMF | <0.3 µV/°C input offset drift - maintains calibration stability over –40°C to +85°C industrial temperature range |
Applications
| High-Resolution Data Acquisition | Precision Sensor Signal Conditioning |
|---|---|
Use Scenario: Front-end amplification for 24-bit delta-sigma ADCs in metrology-grade multimeters and calibration standards. IC Role / Device Role / Timing Role: Dual-channel programmable-gain amplifier (PGA) core with matched channels for differential input rejection and offset cancellation. Use Value: 1.5 nV/√Hz noise and 0.8 µV p-p 0.1 Hz–10 Hz noise enable effective resolution beyond 22 bits without averaging, reducing system latency. | Use Scenario: Low-drift amplification of resistive bridge outputs (e.g., load cells, pressure sensors) in industrial weighing systems. IC Role / Device Role / Timing Role: Instrumentation amplifier input stage providing high CMRR, low bias current, and minimal 1/f noise to preserve bridge balance integrity. Use Value: Matched input bias currents (<10 nA ΔIB) prevent thermally induced offset shifts in 350 Ω bridge arms, maintaining <0.005% linearity over temperature. |
| Medical ECG Front-End | High-Fidelity Audio Line Drivers |
Use Scenario: First-stage amplification of microvolt-level biopotential signals in Class III medical ECG monitors. IC Role / Device Role / Timing Role: Low-noise, low-DC-error buffer isolating electrode interface from downstream filtering and digitization. Use Value: 120 dB CMRR and <200 µV VOS ensure <1 µV baseline drift over 8-hour monitoring sessions, meeting IEC 60601-2-27 requirements. | Use Scenario: Balanced line driver for studio-grade audio equipment requiring <–110 dBc THD+N across 20 Hz–20 kHz. IC Role / Device Role / Timing Role: Dual-output driver delivering symmetrical ±10 V signals into 600 Ω professional audio loads. Use Value: 7 V/µs slew rate and 15 MHz GBW sustain <–115 dBc THD at 10 kHz with 5 V p-p output, exceeding AES17-1998 benchmarks. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar precision op amp applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| LT1469AIDD | Higher 2.0 nV/√Hz noise, wider 22 MHz GBW, same DFN-8 package | Better for wideband active filters (>100 kHz), less suitable for sub-Hz dc stability | Select when bandwidth >15 MHz is required and 0.5 nV/√Hz noise penalty is acceptable |
| OPA2189IDGKR | Zero-drift architecture, 0.1 µV p-p 0.1 Hz–10 Hz noise, but 5.2 nV/√Hz wideband noise | Superior dc drift performance, inferior ac linearity above 1 kHz due to chopping artifacts | Prefer for pure dc applications (e.g., digital calibrators); avoid in audio or fast-sampling systems |
Compared with LT1468AIDD, LT1469AIDD trades 0.5 nV/√Hz higher noise for 47% more bandwidth - ideal for high-frequency active filters but less optimal for ultra-low-noise dc gain. OPA2189IDGKR eliminates 1/f drift entirely but introduces switching-related distortion above 1 kHz, making it unsuitable for broadband signal chains where LT1468AIDD's flat noise profile and linear bipolar input deliver consistent ppm-level linearity.
Availability
LT1468AIDD is available at Aetrix Electronics and suitable for high-resolution data acquisition, precision sensor signal conditioning, medical ECG front-ends, and high-fidelity audio line drivers requiring stable component supply and long-term lifecycle continuity.
Supply support for LT1468AIDD includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices, Inc. is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, serving industrial, automotive, communications, and healthcare markets.
The LT1468 family was designed specifically for applications demanding simultaneous low noise, high speed, and dc precision - bridging the gap between traditional precision op amps and high-speed amplifiers without compromising either domain.
FAQ
What is the maximum load capacitance the LT1468AIDD can drive while maintaining stability?
The LT1468AIDD is unity-gain stable and can drive up to 100 pF capacitive load with no external compensation when configured with ≥10 kΩ series resistance at the output. For loads >100 pF, a 10 Ω–47 Ω isolation resistor is required to prevent peaking; the LT1468AIDD datasheet confirms stable operation into 500 pF with 22 Ω series resistance. This behavior is verified across –40°C to +85°C and applies to both channels of the LT1468AIDD independently.
Does the LT1468AIDD support single-supply operation?
Yes, the LT1468AIDD operates from a single +5 V to +30 V supply, with input common-mode range extending from V– to V+ – 1.5 V and rail-to-rail output swing. When powered from +15 V and ground, it achieves 13.5 V p-p output swing - sufficient for driving 12-bit to 16-bit SAR ADCs directly. The LT1468AIDD's input stage remains linear down to 0.1 V above V–, enabling true single-supply sensor interface designs without level-shifting circuitry.
How does the LT1468AIDD's 0.1 Hz–10 Hz noise compare to chopper-stabilized alternatives?
The LT1468AIDD specifies 0.8 µV p-p 0.1 Hz–10 Hz noise - competitive with mid-tier chopper op amps like the LTC2050 (0.5 µV p-p), though not as low as premium zero-drift devices (e.g., OPA2189: 0.1 µV p-p). Crucially, the LT1468AIDD avoids chopper-induced intermodulation distortion and clock feedthrough, making it superior for wideband applications where LT1468AIDD's flat 1.5 nV/√Hz spectral density preserves signal integrity from dc to 100 kHz.
Can the two amplifiers in the LT1468AIDD be used in a fully differential configuration?
Yes - the LT1468AIDD's matched channel characteristics (gain, offset, noise, CMRR) allow implementation of true fully differential amplifiers without external trimming. A standard configuration uses Channel A as inverting amplifier and Channel B as noninverting, with shared feedback network; measured inter-channel gain mismatch is <0.01% and phase mismatch <0.1° at 10 kHz. This enables high-CMRR instrumentation-grade signal extraction in the LT1468AIDD's native DFN-8 footprint.
Is the LT1468AIDD pin-compatible with other packages of the LT1468 family?
No - the LT1468AIDD (DFN-8) has a different pinout than the LT1468CS8 (SO-8) and LT1468CN8 (PDIP-8). Specifically, the DFN-8 places V– on Pin 4 and V+ on Pin 5, whereas SO-8 uses Pin 4 for V– and Pin 8 for V+. PCB layout must be redesigned for LT1468AIDD; no drop-in replacement is possible. Thermal performance and high-frequency routing also differ significantly due to the exposed pad and smaller footprint of the LT1468AIDD package.
LT1468AIDD Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 8-WFDFN Exposed Pad
- Packaging:
- Tube
- Product Status:
- Obsolete
- Amplifier Type:
- General Purpose
- Number of Circuits:
- 1
- Output Type:
- -
- Slew Rate:
- 22V/µs
- Gain Bandwidth Product:
- 90 MHz
- -3db Bandwidth:
- -
- Current - Input Bias:
- 10 nA
- Voltage - Input Offset:
- 30 µV
- Current - Supply:
- 3.9mA
- Current - Output / Channel:
- 22 mA
- Voltage - Supply Span (Min):
- 9 V
- Voltage - Supply Span (Max):
- 30 V
- Operating Temperature:
- -40°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-DFN (3x3)
LT1468AIDD FAQ
1.How can I place an order for LT1468AIDD through Aetrix?
Please submit a Request for Quotation (RFQ) for LT1468AIDD on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LT1468AIDD reliable?
The price and inventory of LT1468AIDD are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LT1468AIDD is usually 5 days.
3.What payment methods are accepted for LT1468AIDD?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LT1468AIDD transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LT1468AIDD?
LT1468AIDD orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LT1468AIDD order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LT1468AIDD?
For technical support, including LT1468AIDD datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LT1468AIDD requirements.
6.How does Aetrix verify that LT1468AIDD is sourced from the original manufacturer or authorized distributors?
All LT1468AIDD products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LT1468AIDD meets industry standards.
7.What is the process for return or replacement of LT1468AIDD?
All LT1468AIDD units undergo pre-shipment inspection (PSI). If there is an issue with LT1468AIDD, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LT1468AIDD part is unused and in its original packaging.
Return procedure for LT1468AIDD:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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