Analog Devices Inc. LT1468CN8#PBF
- Part No.:
- LT1468CN8#PBF
- Manufacturer:
- Analog Devices Inc.
- Category:
- Instrumentation, Op Amps, Buffer Amps
- Package:
- 8-DIP (0.300", 7.62mm)
- Datasheet:
-
LT1468CN8#PBF.pdf
- Description:
- IC OPAMP GP 1 CIRCUIT 8DIP
- Quantity:
- Payment:

- Shipping:

Inventory:298
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
LT1468CN8#PBF from Analog Devices (formerly Linear Technology) is a precision high-speed operational amplifier optimized for 16-bit data acquisition systems, featuring 90 MHz gain bandwidth, 22 V/µs slew rate, and 900 ns settling time to 150 µV for 10 V steps. Its tailored input offset voltage drift (2 µV/°C max) and low inverting input bias current (10 nA max) make it ideal for DAC current-to-voltage conversion and ADC buffer applications requiring simultaneous DC accuracy and AC fidelity.
For engineers reviewing the LT1468CN8#PBF datasheet, LT1468CN8#PBF pinout, LT1468CN8#PBF application, or LT1468CN8#PBF equivalent, this page delivers verified specifications, package-validated pin functions, real-world settling and distortion performance, and direct alternatives for 16-bit I-to-V, ADC buffering, instrumentation, and active filter designs.
Technical Context
The LT1468CN8#PBF employs a complementary bipolar process to achieve unity-gain stability with 90 MHz GBW at ±15 V supply, enabling >100 dB open-loop gain at 100 kHz for distortion reduction. Its single-stage architecture and optimized thermal layout deliver 900 ns settling to 150 µV under AV = –1, critical for fast 16-bit DAC output conditioning.
Input stage bias current cancellation targets inverting configurations: the inverting input is factory-trimmed for near-zero bias current at 0 V common-mode, while the noninverting input exhibits higher variation-making balanced source resistances detrimental to DC accuracy and noise performance.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Gain Bandwidth | 90 MHz at ±15 V - ensures ≥100 dB loop gain at 100 kHz, reducing harmonic distortion in precision signal chains. |
| Slew Rate | 22 V/µs at ±15 V - enables full-scale 10 V step response within 455 ns, supporting high-fidelity active filters and instrumentation amplifiers. |
| Settling Time | 900 ns to 150 µV (10 V step, AV = –1) - meets 16-bit (150 µV = 1 LSB @ 10 V) settling requirements without post-amplifier correction. |
| Input Offset Voltage | 75 µV max (±15 V, N8 package) - guarantees <0.75 LSB error at 10 V full scale for 16-bit systems. |
| Input Noise Density | 5 nV/√Hz at 10 kHz - dominates total noise for source impedances <1 kΩ, preserving SNR in low-Z sensor interfaces. |
| DC Open-Loop Gain | 1000 V/mV min into 2 kΩ - maintains <0.01% gain error at 100 kHz in noninverting ADC buffers. |
| Total Harmonic Distortion | –96.5 dB at 100 kHz, 10 VP-P - supports clean 16-bit AC performance up to audio band without spectral contamination. |
Pinout & Package
LT1468CN8#PBF uses an 8-lead PDIP (Plastic Dual In-line Package) with 0.300-inch width, rated for 0°C to 70°C operation. The exposed pad is absent; thermal resistance θJA = 130°C/W.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 (NULL) | Factory trim terminal | No connection required; used internally for inverting input bias current calibration - floating or tied to ground degrades DC accuracy. |
| 2 (–IN) | Inverting input | Primary signal input for I-to-V conversion; bias current trimmed to ≤10 nA at 0 V CM, minimizing offset in DAC feedback paths. |
| 3 (+IN) | Noninverting input | Untrimmed input with ±40 nA max bias current; avoid matched source resistors to prevent added offset and noise. |
| 4 (V–) | Negative supply | Accepts –15 V to –5 V; input common-mode extends to V–, enabling rail-to-rail input below ground in single-supply configurations with level shift. |
| 5 (DNC*) | Do-not-connect | Internally unused; must remain unconnected per datasheet - any connection risks parametric shift or instability. |
| 6 (V+) | Positive supply | Accepts +5 V to +15 V; input common-mode extends to within 0.5 V of V+, limiting max undistorted input swing to V+ – 0.5 V. |
| 7 (OUT) | Amplifier output | Drives ≥±12.8 V into 2 kΩ; supports capacitive loads up to 100 pF (unity gain) or 300 pF (AV = –1) with optional series resistor compensation. |
| 8 (NULL) | Factory trim terminal | Identical function to Pin 1 - no external connection; PCB layout must isolate both NULL pins from traces and ground planes. |
Key Features
| Feature | Design Value |
|---|---|
| 16-bit settling performance | 900 ns to 150 µV ensures full 16-bit resolution in DAC I-to-V converters without iterative correction or external settling monitors. |
| Optimized inverting-input bias | ≤10 nA max at VCM = 0 V enables sub-LSB accuracy in 16-bit current-output DAC interfaces with 6 kΩ feedback resistors. |
| Low THD at high frequency | –96.5 dB at 100 kHz allows use in 16-bit, 100 ksps data acquisition front-ends without harmonic folding or post-processing filtering. |
| Unity-gain stable architecture | Eliminates need for external compensation in gain-of-1 ADC buffers, reducing BOM count and layout sensitivity in space-constrained systems. |
| Total input noise optimization | Minimum integrated noise occurs with 1 kΩ < RS < 20 kΩ - matches typical DAC output impedance and photodiode transimpedance ranges. |
Applications
| 16-Bit DAC Current-to-Voltage Converter | Precision Instrumentation Amplifier |
|---|---|
Use Scenario: Converting output current from LTC1597 16-bit parallel DAC into precise voltage with minimal settling error and glitch energy. IC Role / Device Role / Timing Role: Primary I-to-V converter with 6 kΩ feedback and 20 pF compensation capacitor; settles 10 V step in 1.7 µs including DAC capacitance effects. Use Value: Achieves <1 LSB error at 16-bit resolution without post-settling delay, enabling maximum throughput in closed-loop control systems. | Use Scenario: Building a three-op-amp instrumentation amplifier (e.g., LT1167 reference design) where the LT1468CN8#PBF serves as the output stage. IC Role / Device Role / Timing Role: High-speed, low-drift output buffer delivering ±12.8 V swing into 2 kΩ load while maintaining 90 MHz GBW for wideband common-mode rejection. Use Value: Enables >100 dB CMRR at 10 kHz and preserves 16-bit linearity across temperature due to 2 µV/°C VOS drift. |
| ADC Buffer for 16-Bit Sampling | Low-Distortion Active Filter |
Use Scenario: Driving LTC1605 16-bit, 100 ksps ADC input with ±10 V analog signals while isolating sample-and-hold from high source impedance. IC Role / Device Role / Timing Role: Noninverting unity-gain buffer with 100% DC accuracy and –96.5 dB THD at 100 kHz, ensuring SINAD > 90 dB at full scale. Use Value: Eliminates sampling-rate degradation caused by source impedance loading, sustaining 100 ksps sustained throughput with 16-bit fidelity. | Use Scenario: Implementing a 100 kHz bandpass filter (e.g., TA05 schematic) for cleaning signal generator outputs prior to precision test equipment. IC Role / Device Role / Timing Role: Core gain stage in second-order topology with Q = 7 and fO = 100 kHz; delivers –96.5 dB third-harmonic distortion at 3.5 VRMS. Use Value: Maintains <0.0015% THD across full 100 kHz passband, enabling metrology-grade spectral purity without external notch filtering. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar precision high-speed op amp applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| LT1469CN8#PBF | Dual-channel version with identical specs per amplifier; 8 mA supply current vs 5.2 mA for LT1468CN8#PBF. | Required when two synchronized 16-bit I-to-V channels are needed (e.g., differential DAC outputs); not suitable for single-channel space-constrained layouts. | Select LT1469CN8#PBF only when dual-channel functionality justifies 60% higher quiescent power and larger PCB footprint. |
| LTC6090CS8#PBF | Higher supply range (±13.5 V), lower input bias current (±3 pA), but slower GBW (27 MHz) and longer settling (1.8 µs to 0.01%). | Better for ultra-high-impedance photodiode amps (>1 GΩ feedback); unsuitable for 100 kHz DAC settling or 16-bit ADC buffering due to bandwidth limitation. | Choose LTC6090CS8#PBF for femtoamp-level sensor interfaces where speed is secondary to input leakage; avoid for time-critical 16-bit acquisition. |
Compared with LT1469CN8#PBF and LTC6090CS8#PBF, the LT1468CN8#PBF uniquely balances 90 MHz bandwidth, 900 ns 16-bit settling, and 75 µV VOS in a single-channel PDIP package-making it the only option that satisfies simultaneous 100 kHz distortion, 16-bit settling, and cost-sensitive prototyping requirements.
Availability
LT1468CN8#PBF is available at Aetrix Electronics and suitable for 16-bit DAC current-to-voltage conversion, precision ADC buffering, and low-distortion active filter designs requiring stable component supply across industrial, test & measurement, and medical instrumentation programs.
Supply support for LT1468CN8#PBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices, Inc. (acquired Linear Technology in 2017) is a global leader in high-performance analog, mixed-signal, and digital signal processing ICs, serving precision instrumentation, communications, and industrial markets.
The LT1468CN8#PBF belongs to Linear Technology's precision high-speed op amp product line, engineered specifically to bridge the gap between traditional precision op amps and high-speed amplifiers-enabling true 16-bit DC + AC performance in data acquisition, automated test equipment, and medical imaging front-ends.
FAQ
What is the maximum operating temperature range for the LT1468CN8#PBF?
The LT1468CN8#PBF is specified for 0°C to 70°C operation. It is part of the 'C' grade variant, which is characterized and guaranteed over this commercial temperature range. For extended industrial operation (–40°C to 85°C), the LT1468IN8#PBF should be selected instead.
Does the LT1468CN8#PBF require external nulling circuitry?
No, the LT1468CN8#PBF does not require external nulling. Its input offset voltage is trimmed at the factory, and the NULL pins (1 and 8) are reserved for internal inverting-input bias current calibration. Connecting them externally degrades performance-both pins must remain unconnected per the datasheet.
Can the LT1468CN8#PBF drive a 1000 pF capacitive load?
No, the LT1468CN8#PBF cannot directly drive 1000 pF. It supports up to 100 pF in unity gain and 300 pF in inverting gain (AV = –1). To drive larger loads like 1000 pF, a small series resistor (e.g., 20–50 Ω) must be placed between the LT1468CN8#PBF output and the load, along with a feedback capacitor (CF) calculated per the formula CF = (2RO/RF)CL.
How does the LT1468CN8#PBF compare to the LT1468ACDD#PBF in terms of input offset voltage?
The LT1468CN8#PBF has a maximum input offset voltage of 75 µV at ±15 V, while the LT1468ACDD#PBF ('A' grade, DFN package) specifies 75 µV max under identical conditions. Both meet the same precision threshold, but the LT1468CN8#PBF offers through-hole PDIP compatibility for prototyping, whereas the LT1468ACDD#PBF provides 3 mm × 3 mm DFN for space-constrained PCBs.
Is the LT1468CN8#PBF unity-gain stable?
Yes, the LT1468CN8#PBF is unity-gain stable. Its internal compensation ensures stable operation with closed-loop gains ≥1, eliminating the need for external compensation components in noninverting buffer or gain-of-1 configurations-critical for reliable ADC input buffering and reference voltage followers.
LT1468CN8#PBF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 8-DIP (0.300", 7.62mm)
- Packaging:
- Tube
- Product Status:
- Active
- Amplifier Type:
- General Purpose
- Number of Circuits:
- 1
- Output Type:
- -
- Slew Rate:
- 22V/µs
- Gain Bandwidth Product:
- 90 MHz
- -3db Bandwidth:
- -
- Current - Input Bias:
- 10 nA
- Voltage - Input Offset:
- 30 µV
- Current - Supply:
- 3.9mA
- Current - Output / Channel:
- -
- Voltage - Supply Span (Min):
- 9 V
- Voltage - Supply Span (Max):
- 30 V
- Operating Temperature:
- 0°C ~ 70°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Through Hole
- Supplier Device Package:
- 8-PDIP
LT1468CN8#PBF FAQ
1.How can I place an order for LT1468CN8#PBF through Aetrix?
Please submit a Request for Quotation (RFQ) for LT1468CN8#PBF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LT1468CN8#PBF reliable?
The price and inventory of LT1468CN8#PBF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LT1468CN8#PBF is usually 5 days.
3.What payment methods are accepted for LT1468CN8#PBF?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LT1468CN8#PBF transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LT1468CN8#PBF?
LT1468CN8#PBF orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LT1468CN8#PBF order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LT1468CN8#PBF?
For technical support, including LT1468CN8#PBF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LT1468CN8#PBF requirements.
6.How does Aetrix verify that LT1468CN8#PBF is sourced from the original manufacturer or authorized distributors?
All LT1468CN8#PBF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LT1468CN8#PBF meets industry standards.
7.What is the process for return or replacement of LT1468CN8#PBF?
All LT1468CN8#PBF units undergo pre-shipment inspection (PSI). If there is an issue with LT1468CN8#PBF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LT1468CN8#PBF part is unused and in its original packaging.
Return procedure for LT1468CN8#PBF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
LT1468CN8#PBF Tags

-
LM358DT
STMicroelectronics

-
LM358DR
Texas Instruments

-
LM2904DR
Texas Instruments

-
LM358ADR
Texas Instruments
-
LM2904DGKR
Texas Instruments
-
LM324DR
Texas Instruments

-
MCP6006T-E/OT
Microchip Technology

-
MCP6006UT-E/OT
Microchip Technology

-
LM324PWR
Texas Instruments

-
LM2902PWR
Texas Instruments
-
LM2902DR
Texas Instruments

-
LM358P
Texas Instruments
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

