Analog Devices Inc. LT1683IG#PBF
- Part No.:
- LT1683IG#PBF
- Manufacturer:
- Analog Devices Inc.
- Category:
- DC DC Switching Controllers
- Package:
- 20-SSOP (0.209", 5.30mm Width)
- Datasheet:
-
LT1683IG#PBF.pdf
- Description:
- IC REG CTRLR PUSH-PULL 20SSOP
- Quantity:
- Payment:

- Shipping:

Inventory:166
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Product details
Overview
LT1683IG#PBF from Analog Devices (formerly Linear Technology) is an ultralow-noise, slew-rate-controlled push-pull DC/DC controller IC for EMI-sensitive power conversion. It features independent voltage/current slew control (VSLEWR = 26 V/µs, VISLEWR = 0.21 V/µs), dual N-channel gate drivers, 20–250 kHz oscillator, and dual-polarity regulation capability (±1.25 V FB reference / –2.50 V NFB reference). It is used in precision instrumentation and medical DC/DC supplies requiring <200 µVP-P output noise at 100 MHz bandwidth.
For engineers reviewing the LT1683IG#PBF datasheet, LT1683IG#PBF pinout, LT1683IG#PBF application, or LT1683IG#PBF equivalent, key selection considerations include its push-pull current-mode architecture, independent RVSL/RCSL slew tuning, GCL-based gate voltage clamping, soft-start via SS pin, and –40°C to 125°C industrial temperature grade.
Technical Context
The LT1683IG#PBF implements a fixed-frequency, current-mode control loop with internal slope compensation and dual error amplifiers-one for positive outputs (FB referenced to 1.250 V) and one for negative outputs (NFB regulated to –2.500 V). Its oscillator supports external synchronization via SYNC pin and frequency setting via RT/CT network (fOSC = 20–250 kHz).
Slew control operates through two independent feedback paths: CAP A/B pins interface with MOSFET drain capacitors to regulate dV/dt, while RCSL and RVSL resistors set dI/dt and dV/dt time constants respectively. Gate drivers (GATE A/GATE B) deliver ≥300 mA sink/source with programmable upper clamp (GCL pin) and opposite-gate lockout to prevent cross-conduction.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Oscillator Frequency | 20 kHz to 250 kHz - sets fundamental switching frequency and harmonic placement; adjustable via RT/CT and synchronizable to external clock. |
| Voltage Slew Rate (Rising) | 26 V/µs - reduces high-frequency voltage harmonics; set by RVSL resistor and CAP A/B capacitor values. |
| Current Slew Rate (Rising) | 0.21 V/µs on CS pin - limits di/dt-related EMI; controlled by RCSL resistor and sense resistor RS. |
| Feedback Reference Voltage | 1.250 V (FB) / –2.500 V (NFB) - enables regulation of both positive and negative output rails without external op-amps. |
| Gate Drive Output | ≥300 mA sink/source per driver - drives external N-MOSFETs directly; clamped by GCL pin to prevent gate overvoltage. |
| Operating Temperature | –40°C to 125°C - qualified for industrial and medical environments; specified and tested across full range. |
| Supply Voltage Range | 2.55 V to 20 V (VIN) - supports wide-input offline and intermediate bus applications; includes undervoltage lockout. |
Pinout & Package
LT1683IG#PBF is housed in a 20-lead plastic SSOP (G package), 0.65 mm pitch, with exposed pad for thermal performance. Pin functions are electrically validated per Linear Technology's official datasheet revision.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| GATE A (1) | Push-pull MOSFET driver output | Drives gate of first external N-MOSFET; alternates conduction with GATE B; ≥300 mA drive strength. |
| CAP A (2) | Voltage slew feedback node | Connects to MOSFET drain via 1–5 pF capacitor; forms integrator with RVSL to control dV/dt. |
| GCL (3) | Gate clamp voltage reference | Sets max gate drive voltage (≈VGCL – 0.2 V); enables gate UVLO; internal 19 V Zener protection. |
| CS (4) | Current sense amplifier input | Monitors RS voltage for current-mode control and slew limiting; trips at 86–120 mV (current limit). |
| V5 (5) | On-chip 5 V regulator output | Supplies up to ±10 mA for biasing external circuitry; requires VIN > 6.5 V; bypass with <1 µF capacitor. |
| SYNC (6) | External clock synchronization input | Aligns oscillator phase to reduce spectral spreading; accepts TTL/CMOS-compatible clock signals. |
| CT (7) | Oscillator timing capacitor node | With RT, sets fOSC; COSC (nF) = 129 / fOSC (kHz); low-leakage ceramic cap required. |
| RT (8) | Oscillator timing resistor node | Sets oscillator charge/discharge current; nominal 16.9 kΩ; ±25% adjustment enables fine frequency tuning. |
| FB (9) | Positive output voltage feedback | Inverting input to transconductance error amp; regulates to 1.250 V; overvoltage shutdown at 1.47 V. |
| NFB (10) | Negative output voltage feedback | Inverting input to dedicated negative-feedback amp; regulates to –2.500 V; gain = –0.5 to FB pin. |
| GND (11) | Signal ground reference | Reference for error amps, oscillator, V5, bandgap, and VC compensation; must be isolated from PGND. |
| VC (12) | Error amp output / current comparator input | Loop compensation node; voltage (0.25–1.27 V) sets peak switch current; clamped during fault. |
| SS (13) | Soft-start ramp control | Internal 9 µA current source charges external capacitor; VC tracks SS during startup to limit inrush. |
| SHDN (14) | Enable/disable control input | Logic-high (>1.39 V) enables IC; hysteresis ≈110 mV; sources 24 µA above threshold for external hysteresis. |
| RCSL (15) | Current slew rate programming resistor | Grounded resistor (3.3–68 kΩ) sets dI/dt slew time constant; works with CS and RS to shape current edges. |
| RVSL (16) | Voltage slew rate programming resistor | Grounded resistor (3.3–68 kΩ) sets dV/dt slew time constant; works with CAP A/B to shape voltage edges. |
| VIN (17) | Main supply input | Powers all internal circuitry including gate drivers and V5; requires low-ESR bulk capacitor; UVLO at 2.55 V. |
| CAP B (18) | Voltage slew feedback node | Second dV/dt integrator node; identical function to CAP A but for GATE B MOSFET drain. |
| GATE B (19) | Push-pull MOSFET driver output | Drives gate of second external N-MOSFET; alternates with GATE A; prevents shoot-through via lockout logic. |
| PGND (20) | Power ground return | Return path for gate driver currents; carries high di/dt pulses; must be routed separately from signal GND. |
Key Features
| Feature | Design Value |
|---|---|
| Independent voltage & current slew control | Reduces high-frequency harmonic power by up to 40 dB without sacrificing efficiency; RVSL/RCSL allow separate optimization of EMI vs thermal trade-offs. |
| Dual-polarity regulation architecture | Supports simultaneous positive and negative output regulation using single IC-eliminates need for separate controllers or inverting topologies. |
| Push-pull current-mode topology | Enables transformer-coupled isolated designs with inherent duty-cycle symmetry and reduced core saturation risk versus forward converters. |
| Integrated 5 V regulator (V5) | Provides ±10 mA bias supply for external circuitry (e.g., optocouplers, level shifters); eliminates need for auxiliary LDO in many isolated designs. |
| Comprehensive protection suite | Includes gate drive lockout, opposite-gate lockout, soft-start, short-circuit current limiting (CS = 0.22 V), FB/NFB overvoltage shutdown, and VIN UVLO. |
Applications
| Medical Imaging Power Supply | Precision ADC/DAC Reference Supply |
|---|---|
|
Use Scenario: Low-noise ±15 V and ±5 V rails powering CT/MRI front-end analog signal chains where sub-µV noise affects image fidelity. IC Role / Device Role / Timing Role: Primary DC/DC controller managing push-pull transformer stage; regulates dual polarity outputs with independent slew tuning to suppress switching artifacts near sensitive analog inputs. Use Value: Achieves <200 µVP-P output noise (100 MHz BW), enabling direct powering of 24-bit ADCs without post-regulation LDOs or ferrite filters. |
Use Scenario: Isolated ±12 V and +5 V supplies for high-resolution data acquisition systems in industrial test equipment. IC Role / Device Role / Timing Role: Synchronized controller driving dual MOSFETs in center-tapped transformer topology; uses SYNC pin to align switching harmonics away from measurement bands. Use Value: Reduces conducted EMI by >30 dB, eliminating need for multi-stage LC filters and easing EMC certification for Class A equipment. |
| EMI-Compliant Telecom PSU | Isolated Industrial Sensor Interface |
|
Use Scenario: 48 V input to 5 V/2 A isolated output for base station RF modules requiring EN 55032 Class B compliance. IC Role / Device Role / Timing Role: Core controller implementing slew-controlled push-pull topology; leverages RVSL/RCSL tuning to meet radiated emission limits below 1 GHz. Use Value: Cuts external filter component count by 60% versus conventional controllers-reducing BOM cost and board area while maintaining 88% peak efficiency. |
Use Scenario: 24 V field bus to isolated ±10 V analog sensor excitation and signal conditioning in PLC I/O modules. IC Role / Device Role / Timing Role: Dual-output controller generating galvanically isolated rails using single transformer; NFB pin directly regulates negative rail without external op-amp. Use Value: Enables compact, single-chip isolated supply design meeting IEC 61000-4-5 surge immunity and 3 kV RMS isolation requirements. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar DC/DC controller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| LTC3722-1 | Single-ended synchronous buck controller; no slew control; higher max fSW (1 MHz); lacks NFB pin and dual-polarity support. | Best for high-density point-of-load buck regulators-not suitable for push-pull or bipolar output topologies. | Select LTC3722-1 only when designing non-isolated, high-frequency buck converters where EMI filtering is handled externally. |
| UCC2897A | Active-clamp forward controller; no slew rate tuning; integrated gate drivers rated for 1 A; supports adaptive dead-time control. | Targeted at medium-power offline forward converters with active-clamp reset-not applicable to push-pull or low-EMI precision applications. | Choose UCC2897A for 85–265 VAC offline supplies needing high efficiency at light load; not recommended for noise-sensitive linear systems. |
Compared with LTC3722-1 and UCC2897A, the LT1683IG#PBF uniquely delivers independently tunable voltage/current slew rates, dual-polarity regulation, and push-pull current-mode control-making it the only viable option for EMI-critical isolated DC/DC designs requiring sub-200 µVP-P noise performance.
Availability
LT1683IG#PBF is available at Aetrix Electronics and suitable for medical imaging power supplies, precision instrumentation systems, and EMI-compliant telecom PSUs requiring stable component supply across extended temperature ranges and long production lifecycles.
Supply support for LT1683IG#PBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices acquired Linear Technology in 2017 and maintains full technical and manufacturing continuity for legacy Linear power products.
The LT1683IG#PBF belongs to Linear's ultralow-noise DC/DC controller product line, designed specifically for EMI-sensitive applications including medical, test & measurement, and high-fidelity audio where conducted/radiated noise must be minimized without sacrificing efficiency.
FAQ
What is the operating temperature range of the LT1683IG#PBF?
The LT1683IG#PBF is fully specified and tested over –40°C to 125°C, making it suitable for industrial and medical applications with demanding thermal environments. This grade is confirmed in the official ordering information table, where "I" denotes the industrial temperature range, distinct from the "E" grade (0°C to 70°C).
How does the LT1683IG#PBF achieve ultralow EMI compared to standard controllers?
The LT1683IG#PBF achieves ultralow EMI through independent control of voltage and current slew rates using external RVSL and RCSL resistors, reducing high-frequency harmonic power by up to 40 dB. Unlike standard controllers, it shapes switching edges rather than filtering them-minimizing reliance on external LC components while preserving efficiency.
Can the LT1683IG#PBF regulate negative output voltages?
Yes-the LT1683IG#PBF includes a dedicated negative feedback amplifier (NFB pin) that regulates to –2.500 V with gain –0.5, enabling direct control of negative rails without external op-amps. When NFB is used, the FB pin is internally driven to 1.25 V, maintaining regulation integrity for bipolar supplies.
What protection features are built into the LT1683IG#PBF?
The LT1683IG#PBF integrates gate drive lockout, opposite-gate lockout, soft-start (SS pin), output current limit (CS = 86–120 mV), short-circuit protection (CS = 0.22 V discharges VC/SS), FB/NFB overvoltage shutdown (1.47 V / –2.72 V), and VIN undervoltage lockout (2.55 V). All are hardware-based and require no external components.
Is the LT1683IG#PBF pin-compatible with other members of the LT168x family?
No-LT1683IG#PBF is not pin-compatible with LT1682 or LT1684. While sharing functional similarities, pin assignments differ significantly (e.g., LT1682 lacks NFB and CAP B pins; LT1684 has different slew control architecture). Each variant requires unique PCB layout and external component selection per its datasheet.
LT1683IG#PBF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 20-SSOP (0.209", 5.30mm Width)
- Packaging:
- Tube
- Product Status:
- Active
- Output Type:
- Transistor Driver
- Function:
- Step-Up/Step-Down
- Output Configuration:
- Positive and Negative
- Topology:
- Push-Pull
- Number of Outputs:
- 1
- Output Phases:
- 1
- Voltage - Supply (Vcc/Vdd):
- 7.3V ~ 20V
- Frequency - Switching:
- 250kHz
- Duty Cycle (Max):
- 46%
- Synchronous Rectifier:
- No
- Clock Sync:
- Yes
- Serial Interfaces:
- -
- Control Features:
- Enable, Frequency Control, Soft Start
- Operating Temperature:
- -40°C ~ 125°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 20-SSOP
LT1683IG#PBF FAQ
1.How can I place an order for LT1683IG#PBF through Aetrix?
Please submit a Request for Quotation (RFQ) for LT1683IG#PBF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LT1683IG#PBF reliable?
The price and inventory of LT1683IG#PBF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LT1683IG#PBF is usually 5 days.
3.What payment methods are accepted for LT1683IG#PBF?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LT1683IG#PBF transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LT1683IG#PBF?
LT1683IG#PBF orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LT1683IG#PBF order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LT1683IG#PBF?
For technical support, including LT1683IG#PBF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LT1683IG#PBF requirements.
6.How does Aetrix verify that LT1683IG#PBF is sourced from the original manufacturer or authorized distributors?
All LT1683IG#PBF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LT1683IG#PBF meets industry standards.
7.What is the process for return or replacement of LT1683IG#PBF?
All LT1683IG#PBF units undergo pre-shipment inspection (PSI). If there is an issue with LT1683IG#PBF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LT1683IG#PBF part is unused and in its original packaging.
Return procedure for LT1683IG#PBF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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