Analog Devices Inc. LT1713CMS8#PBF
- Part No.:
- LT1713CMS8#PBF
- Manufacturer:
- Analog Devices Inc.
- Category:
- Comparators
- Package:
- 8-TSSOP, 8-MSOP (0.118", 3.00mm Width)
- Datasheet:
-
LT1713CMS8#PBF.pdf
- Description:
- IC COMPARATOR 1 W/LATCH 8MSOP
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
LT1713CMS8#PBF from Analog Devices (formerly Linear Technology) is a single, ultrafast 7ns rail-to-rail input/output comparator with integrated TTL/CMOS-compatible latch, optimized for 2.4V–12V single or ±2.4V–±6V dual supplies. It delivers 5mA supply current per comparator, 10mA output drive capability, and operates across –40°C to 85°C. It is used in high-speed crystal oscillator circuits, pulse width modulators, and fast sampling systems where precise timing and latch retention are critical.
For engineers reviewing the LT1713CMS8#PBF datasheet, LT1713CMS8#PBF pinout, LT1713CMS8#PBF application, or LT1713CMS8#PBF equivalent, key selection considerations include propagation delay at low overdrive (8.5ns @ 5mV), rail-to-rail input common-mode range extending 100mV beyond rails, latch enable hysteresis, complementary TTL/CMOS outputs, and MSOP-8 package compatibility with high-density PCB layouts.
Technical Context
The LT1713CMS8#PBF employs a bipolar input stage enabling rail-to-rail common-mode operation from –0.1V to V+ + 0.1V on single supply or –5.1V to +5.1V on ±5V supply. Its internal latch retains output state while the LATCH ENABLE pin is high, with 1.5ns setup time and 8ns latch propagation delay.
It features matched complementary outputs capable of sourcing 10mA to within 0.7V of V+ and sinking 10mA to within 0.5V of GND, directly interfacing with TTL or CMOS logic without level-shifting. Input bias current varies with common-mode voltage due to NPN/PNP input pair architecture, requiring low-impedance sources for stable operation.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Propagation Delay | 7ns typical at 20mV overdrive - enables sub-10ns decision timing in high-speed sampling and A/D trigger paths. |
| Input Common-Mode Range | –0.1V to V+ + 0.1V (single supply) - supports inputs beyond rails without phase reversal, critical for sensor front-ends. |
| Output Drive Capability | Sinks 10mA to 0.5V above GND; sources 10mA to 0.7V below V+ - drives standard logic loads directly with no buffer. |
| Supply Voltage Range | 2.4V–12V single or ±2.4V–±6V dual - supports 3V, 5V, and ±5V systems without external regulation. |
| Latch Enable Hysteresis | ~100mV - prevents false latching from slow-moving or noisy control signals in industrial environments. |
| Input Offset Voltage | 0.5mV typical (25°C), 4mV max over temperature - ensures accurate threshold detection in precision window comparators. |
| Power Supply Rejection | 65dB min (PSRR+ and PSRR–) - maintains stable switching thresholds despite supply ripple in switching regulator feedback paths. |
Pinout & Package
LT1713CMS8#PBF is housed in an 8-lead plastic MSOP (MS8) package, 3.0mm × 3.0mm × 0.86mm, with exposed pad for thermal enhancement. Pin 1 is V+, pin 6 is GND, and pin 5 is LATCH ENABLE - all pins are surface-mount compatible with standard reflow profiles.
| Pin | Circuit Role | Design Meaning |
|---|---|---|
| V+ (Pin 1) | Positive supply terminal | Accepts 2.4V–12V; powers internal comparator core and output stage; requires local 0.1µF ceramic bypass. |
| +IN (Pin 2) | Noninverting input | Rail-to-rail capable; accepts signals from –0.1V to V+ + 0.1V; low input bias current improves accuracy with high-Z sources. |
| –IN (Pin 3) | Inverting input | Matched to +IN; differential input voltage up to ±12.6V allowed; supports hysteresis feedback configurations. |
| V– (Pin 4) | Negative supply terminal | Ground (0V) or negative rail (e.g., –5V); defines lower bound of common-mode range and output swing reference. |
| LATCH ENABLE (Pin 5) | Digital latch control input | Active-high TTL/CMOS-compatible signal; internal ~100mV hysteresis rejects noise; floats low when unconnected. |
| GND (Pin 6) | Ground reference | Return path for output sink current and internal bias; must be low-impedance connection to minimize ground bounce. |
| Q (Pin 7) | Noninverting output | Active-high rail-to-rail CMOS/TTL output; complements Q̅; drives 10mA load while maintaining VOH ≥ V+ – 0.7V. |
| Q̅ (Pin 8) | Inverting output | Active-low rail-to-rail CMOS/TTL output; complements Q; provides differential signaling capability for noise immunity. |
Key Features
| Feature | Design Value |
|---|---|
| Ultrafast 7ns propagation delay | Enables >65MHz toggle frequency and sub-10ns timing resolution in high-speed test equipment and A/D converters. |
| Rail-to-rail complementary outputs | Eliminates need for external level shifters; Q and Q̅ simultaneously drive TTL/CMOS logic with full swing and matched delays. |
| Integrated output latch with hysteresis | Retains comparison result during asynchronous events; built-in 100mV latch pin hysteresis prevents chatter from slow control edges. |
| Input overvoltage tolerance without phase reversal | Inputs operate safely up to 100mV beyond supply rails; Schottky clamps prevent substrate diode conduction and recovery delay. |
| Wide supply flexibility (2.4V–12V / ±2.4V–±6V) | Supports direct integration into mixed-voltage systems (e.g., 3.3V logic with 5V analog rails) without external regulators. |
Applications
| Crystal Oscillator Circuits | High-Speed Sampling Circuits |
|---|---|
|
Use Scenario: Voltage-tunable 4× NTSC subcarrier oscillator (14.31818MHz) using varactor diode biasing and series-resonant crystal topology. IC Role / Device Role / Timing Role: LT1713CMS8#PBF functions as the gain element and zero-crossing detector in a Pierce-style oscillator, generating clean square wave output with <40psRMS jitter at 3V supply. Use Value: Enables phase-lockable VCXO with ±240ppm tuning range over 0–5V control voltage, meeting broadcast-grade timing stability requirements. |
Use Scenario: Fast edge-triggered sampling gate in digitizer front-end, capturing transient pulses from photodiodes or RF detectors. IC Role / Device Role / Timing Role: LT1713CMS8#PBF compares analog input against programmable threshold and latches result synchronously with system clock edge via LATCH ENABLE. Use Value: 7ns propagation delay and 1.5ns latch setup time allow sampling windows under 10ns, supporting >100MSPS effective acquisition rates. |
| Pulse Width Modulators | Current Sense for Switching Regulators |
|
Use Scenario: Asymmetric PWM generator in motor control ICs, where duty cycle is adjusted by varying ramp amplitude relative to fixed reference. IC Role / Device Role / Timing Role: LT1713CMS8#PBF compares sawtooth ramp against DC control voltage; Q̅ output drives gate driver with precise edge alignment. Use Value: Matched Q/Q̅ propagation delays ensure minimal dead-time uncertainty; rail-to-rail inputs accommodate full ramp swing without clipping. |
Use Scenario: High-side current sensing in synchronous buck converter, monitoring inductor current via shunt resistor and amplifying error signal. IC Role / Device Role / Timing Role: LT1713CMS8#PBF acts as fast overcurrent comparator, triggering fault shutdown within 10ns of threshold violation. Use Value: 100mV beyond-rail input range allows direct connection to shunt placed between high-side FET and VIN, eliminating level-shifting components. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar high-speed comparator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MAX961ASA+ | 7ns propagation delay, but no internal latch; rail-to-rail inputs only (outputs not rail-to-rail); 3.3V–5.5V supply range. | Requires external latch circuitry for data retention; unsuitable for latch-critical designs like sampling hold or pulse discrimination. | Select MAX961ASA+ only when latch functionality is implemented externally and supply is limited to ≤5.5V. |
| ADCMP572BCPZ-R2 | 4.5ns propagation delay, ECL/PECL outputs, no rail-to-rail inputs; operates from –5.2V/+5.2V or +3.3V/+5V supplies. | Delivers faster timing but demands level translation for CMOS/TTL interfacing; higher power (18mA vs 5mA). | Choose ADCMP572BCPZ-R2 for ultra-low-jitter clock distribution where ECL interface and sub-5ns delay outweigh latch and rail-to-rail needs. |
Compared with MAX961ASA+ and ADCMP572BCPZ-R2, the LT1713CMS8#PBF uniquely combines ultrafast response, integrated latch, rail-to-rail I/O, and wide supply flexibility - making it optimal for compact, self-contained high-speed decision circuits without external support components.
Availability
LT1713CMS8#PBF is available at Aetrix Electronics and suitable for high-speed sampling circuits, crystal oscillator modules, and switching regulator current-sense protection requiring stable component supply and long-term manufacturability.
Supply support for LT1713CMS8#PBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices acquired Linear Technology in 2017 and maintains its high-performance analog portfolio, including precision comparators, op amps, and voltage references for demanding industrial and instrumentation applications.
The LT1713CMS8#PBF belongs to Linear's UltraFast™ comparator family, designed specifically for timing-critical systems such as automatic test equipment, high-speed data acquisition, and phase-locked oscillator control where nanosecond-level decision latency and latch retention are essential.
FAQ
What is the maximum operating supply voltage for LT1713CMS8#PBF?
The LT1713CMS8#PBF supports a maximum total supply voltage of 12.6V between V+ and V–. On single-supply operation, V+ to GND may reach 12.6V; on dual-supply, V+ to V– must not exceed 12V. Exceeding these limits risks permanent damage per Absolute Maximum Ratings. The LT1713CMS8#PBF is specified for reliable operation from 2.4V to 7V on V+, making it compatible with 3V, 5V, and ±5V systems.
Does LT1713CMS8#PBF require external hysteresis for stable operation?
No, the LT1713CMS8#PBF does not require external hysteresis for basic comparator operation due to its high gain and low input offset. However, external positive feedback can be added to introduce controlled hysteresis for noise immunity in slow-moving input applications. The LT1713CMS8#PBF's rail-to-rail inputs and complementary outputs make hysteresis implementation flexible - feedback resistors may connect from Q or Q̅ to either input without common-mode restrictions.
Can LT1713CMS8#PBF operate with a 3.3V supply?
Yes, the LT1713CMS8#PBF is fully specified and characterized at 2.7V, 5V, and ±5V supplies, and operates reliably down to 2.4V. At 3.3V single supply (V+ = 3.3V, V– = 0V), it maintains 7ns typical propagation delay, rail-to-rail input range (–0.1V to 3.4V), and output swing within 0.5V of GND and 0.7V of V+. This makes the LT1713CMS8#PBF suitable for modern low-voltage digital systems interfacing with analog sensors or timing circuits.
What is the function of the LATCH ENABLE pin on LT1713CMS8#PBF?
The LATCH ENABLE pin (Pin 5) controls the internal TTL/CMOS-compatible latch: when held high, the comparator output state is frozen and retained regardless of subsequent input changes; when low, the output follows input transitions in real time. The LT1713CMS8#PBF includes ~100mV of built-in hysteresis on this pin to reject noise, and specifies 1.5ns setup time and 0ns hold time. The latch remains active as long as the pin is asserted - no clock edge is required.
Is LT1713CMS8#PBF pin-compatible with other comparators in the LT171x family?
No, the LT1713CMS8#PBF is not pin-compatible with LT1714 or other variants. It uses an 8-pin MSOP package with dedicated V+, +IN, –IN, V–, LATCH ENABLE, GND, Q, and Q̅ pins. In contrast, the dual LT1714 uses a 16-pin SSOP with separate channels and duplicated supply pins. Substituting LT1713CMS8#PBF for LT1714 or vice versa requires PCB redesign. Always verify pin mapping and supply routing before replacement.
LT1713CMS8#PBF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Package/Case:
- 8-TSSOP, 8-MSOP (0.118", 3.00mm Width)
- Series:
- UltraFast™
- Packaging:
- Tube
- Product Status:
- Active
- Type:
- with Latch
- Number of Elements:
- 1
- Output Type:
- CMOS, Complementary, Rail-to-Rail, TTL
- Voltage - Supply, Single/Dual (±):
- 2.4V ~ 12V, ±2.4V ~ 6V
- :
- 4mV @ 5V
- Voltage - Input Offset (Max):
- 2µA @ 5V
- Current - Input Bias (Max):
- 20mA
- Current - Output (Typ):
- 7.5mA
- Current - Quiescent (Max):
- 70dB CMRR, 80dB PSRR
- CMRR, PSRR (Typ):
- 11ns
- Propagation Delay (Max):
- -
- Hysteresis:
- -40°C ~ 85°C
- Operating Temperature:
- -
- Grade:
- -
- Qualification:
- Surface Mount
- :
- 8-MSOP
LT1713CMS8#PBF FAQ
1.How can I place an order for LT1713CMS8#PBF through Aetrix?
Please submit a Request for Quotation (RFQ) for LT1713CMS8#PBF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LT1713CMS8#PBF reliable?
The price and inventory of LT1713CMS8#PBF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LT1713CMS8#PBF is usually 5 days.
3.What payment methods are accepted for LT1713CMS8#PBF?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LT1713CMS8#PBF transactions.
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4.How is shipping managed for LT1713CMS8#PBF?
LT1713CMS8#PBF orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LT1713CMS8#PBF order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LT1713CMS8#PBF?
For technical support, including LT1713CMS8#PBF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LT1713CMS8#PBF requirements.
6.How does Aetrix verify that LT1713CMS8#PBF is sourced from the original manufacturer or authorized distributors?
All LT1713CMS8#PBF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LT1713CMS8#PBF meets industry standards.
7.What is the process for return or replacement of LT1713CMS8#PBF?
All LT1713CMS8#PBF units undergo pre-shipment inspection (PSI). If there is an issue with LT1713CMS8#PBF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LT1713CMS8#PBF part is unused and in its original packaging.
Return procedure for LT1713CMS8#PBF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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