Analog Devices Inc. LT1793IN8#PBF
- Part No.:
- LT1793IN8#PBF
- Manufacturer:
- Analog Devices Inc.
- Category:
- Instrumentation, Op Amps, Buffer Amps
- Package:
- 8-DIP (0.300", 7.62mm)
- Datasheet:
-
LT1793IN8#PBF.pdf
- Description:
- IC OPAMP JFET 1 CIRCUIT 8DIP
- Quantity:
- Payment:

- Shipping:

Inventory:2,696
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
LT1793IN8#PBF from Analog Devices (formerly Linear Technology) is a precision JFET-input operational amplifier optimized for ultra-low-noise, high-impedance transducer signal conditioning. It delivers 6 nV/√Hz voltage noise density at 1 kHz, 0.8 fA/√Hz current noise density, 3 pA typical input bias current, 1.5 pF input capacitance, and 4.2 MHz gain-bandwidth product - enabling accurate amplification of picocoulomb-level signals from piezoelectric accelerometers and hydrophones.
For engineers reviewing the LT1793IN8#PBF datasheet, LT1793IN8#PBF pinout, LT1793IN8#PBF application, or LT1793IN8#PBF equivalent, key selection criteria include verified low-frequency 1/f voltage noise (2.4 µVP-P, 0.1–10 Hz), guaranteed ±13.2 V output swing into 10 kΩ at ±15 V supplies, unconditional stability with ≥1000 pF capacitive loads, and full temperature characterization across –40°C to +85°C for industrial instrumentation designs.
Technical Context
The LT1793IN8#PBF employs a matched dual-JFET front-end architecture that maintains sub-10 pA input bias current across its full ±10.5 V to +13.5 V common-mode range, ensuring stable 1013 Ω input resistance and minimal current-noise contribution in high-Z sensor interfaces. Its voltage-noise-limited performance dominates below 5 kΩ source impedance, while current-noise dominance above 50 kΩ enables superior SNR versus bipolar op amps in photodiode and piezoelectric applications.
Unlike conventional JFET op amps, the LT1793IN8#PBF eliminates phase reversal during common-mode overdrive (±5.2 V input with ±5 V supplies) and supports unity-gain stable operation with 100% tested slew rate (3.4 V/µs) and voltage noise - critical for charge amplifier topologies requiring precise CF/CS gain matching and DC servo integrity.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Voltage Noise Density | 6 nV/√Hz @ 1 kHz - sets minimum detectable signal floor in 10 kΩ–1 MΩ transducer interfaces |
| Current Noise Density | 0.8 fA/√Hz @ 1 kHz - enables lowest total input-referred noise above 50 kΩ source resistance |
| Input Bias Current | 3 pA typ, 10 pA max (warmed up) - ensures <1 mV error across 1 GΩ feedback networks |
| Input Capacitance | 1.5 pF - preserves >60 dB gain flatness to 100 kHz in noninverting buffer configurations |
| Gain-Bandwidth Product | 4.2 MHz typ - supports closed-loop bandwidths >300 kHz at G = 10 without peaking |
| Output Voltage Swing | ±13.2 V @ RL = 10 kΩ, ±15 V supplies - delivers full dynamic range into standard instrumentation loads |
| Common-Mode Range | –10.5 V to +13.5 V @ ±15 V supplies - accommodates rail-to-rail sensor biasing without clipping |
Pinout & Package
LT1793IN8#PBF is housed in an 8-lead PDIP (N8) package with 0.300-inch body width, JEDEC MS-001 compliant footprint, and 80°C/W thermal resistance (θJA). Pin 1 is VOS ADJ; pins 2 and 3 are inverting and non-inverting inputs; pin 4 is V–; pin 5 is NC; pin 6 is V+; pin 7 is output; pin 8 is VOS ADJ.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1, 8 | VOS ADJ | Offset null terminals - connect external 10 kΩ potentiometer wiper to V– for <1.3 mV fine adjustment |
| 2 | –IN A | Inverting input - high-impedance JFET gate node with 1.5 pF capacitance and 1013 Ω resistance |
| 3 | +IN A | Non-inverting input - matched to –IN for CMRR >83 dB and bias-current cancellation in servo loops |
| 4 | V– | Negative supply - reference for VOS ADJ network and internal bias generation |
| 5 | NC | No connect - electrically isolated; must remain unconnected per datasheet |
| 6 | V+ | Positive supply - supports ±5 V to ±20 V operation; PSRR >85 dB up to 100 kHz |
| 7 | OUT | Amplifier output - drives ≥10 kΩ loads to ±13.2 V; stable with 1000 pF capacitive load |
Key Features
| Feature | Design Value |
|---|---|
| Ultra-low total input noise | 6 nV/√Hz voltage + 0.8 fA/√Hz current noise - minimizes RMS error in photodiode and hydrophone preamps |
| Stable high-Z input stage | 1013 Ω input resistance + 1.5 pF capacitance - enables >100 dB gain linearity at 10 kHz for piezoelectric sensors |
| Guaranteed unity-gain stability | Unconditionally stable with ≥1000 pF capacitive load - eliminates need for isolation resistors in charge amp feedback paths |
| Full-temperature validated specs | 100% tested offset voltage, slew rate, and voltage noise over –40°C to +85°C - reduces qualification time for industrial deployments |
| No phase reversal | Operates cleanly with input exceeding common-mode range (±5.2 V @ ±5 V supplies) - prevents lockup in closed-loop servo systems |
Applications
| Photocurrent Amplifiers | Hydrophone Amplifiers |
|---|---|
Use Scenario: Amplifying sub-nA photocurrents from Hamamatsu S1336-5BK photodiodes under 200 nm/633 nm illumination. IC Role / Device Role / Timing Role: Transimpedance amplifier with 100 kΩ feedback resistor and 2 pF compensation capacitor. Use Value: Delivers 100 mV/µW sensitivity at 200 nm and 330 mV/µW at 633 nm with <8 nV/√Hz output noise at 1 kHz. | Use Scenario: Conditioning acoustic pressure signals from underwater hydrophones with >100 MΩ source impedance. IC Role / Device Role / Timing Role: Low-noise voltage follower buffering high-capacitance piezoceramic elements. Use Value: Maintains >100 dB SNR at 1 kHz due to 0.8 fA/√Hz current noise dominance over thermal noise above 50 kΩ. |
| High Sensitivity Piezoelectric Accelerometers | Low Voltage and Current Noise Instrumentation Amplifier Front Ends |
Use Scenario: Signal conditioning for B&K Model 4381 accelerometers generating 0.8 mV/pC output. IC Role / Device Role / Timing Role: Charge amplifier with CF = CS + 1.5 pF and RF = RS || 20 MΩ for DC-coupled g-force measurement. Use Value: Achieves 8 nV/√Hz output noise at 1 kHz and ≤1.9 mV DC output offset for <0.01 g resolution. | Use Scenario: First-stage amplification in two-op-amp instrumentation amplifiers measuring µV-level thermocouple outputs. IC Role / Device Role / Timing Role: Precision differential input stage with matched JFET inputs and 1013 Ω ZIN. Use Value: Enables <0.1 µV/°C drift and 120 dB CMRR by eliminating bias-current-induced errors in RG networks. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar JFET-input op amp applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| LT1793CN8 | Commercial-grade variant; specified only from 0°C to 70°C; 1.6 mV max VOS vs 1.3 mV for LT1793IN8#PBF | Not qualified for extended industrial temperature cycling or long-term reliability testing at –40°C/+85°C | Select LT1793IN8#PBF when operating outside 0°C–70°C or requiring full temperature-tested noise/slew parameters. |
| AD645JRZ | Higher voltage noise (12 nV/√Hz), higher input capacitance (4 pF), no guaranteed 1000 pF capacitive load stability | Lacks phase-reversal immunity and fails to meet 0.8 fA/√Hz current noise target for >100 MΩ transducers | Choose LT1793IN8#PBF for hydrophone or piezoelectric applications where total input noise below 10 nV/√Hz is mandatory. |
Compared with LT1793CN8 and AD645JRZ, the LT1793IN8#PBF provides uniquely validated low-noise performance across –40°C to +85°C, guaranteed unity-gain stability with heavy capacitive loads, and phase-reversal immunity - making it the only option meeting full industrial instrumentation requirements for high-Z sensor front ends.
Availability
LT1793IN8#PBF is available at Aetrix Electronics and suitable for industrial instrumentation, aerospace sensor conditioning, and medical diagnostic equipment requiring stable component supply with traceable lot history and extended temperature validation.
Supply support for LT1793IN8#PBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices (acquired Linear Technology in 2017) is a global leader in high-performance analog, mixed-signal, and digital signal processing ICs for precision measurement and signal conditioning.
The LT1793IN8#PBF belongs to Linear's ultra-low-noise JFET op amp family, designed specifically for high-impedance transducer interfacing in instrumentation, seismic monitoring, and scientific measurement systems where sub-picoampere bias current and femtoampere noise are essential.
FAQ
What is the maximum guaranteed input bias current for LT1793IN8#PBF over its full operating temperature range?
The LT1793IN8#PBF guarantees a maximum input bias current of 20 pA over the full –40°C to +85°C industrial temperature range, with typical performance at 3 pA at 25°C. This specification is validated per Note 8 in the datasheet, distinguishing it from commercial-grade variants like LT1793CN8 which lack extended-temperature testing.
Does LT1793IN8#PBF require external compensation for unity-gain stability with capacitive loads?
No, the LT1793IN8#PBF is unconditionally stable at unity gain with capacitive loads up to 1000 pF, as confirmed in the Electrical Characteristics table and Typical Performance curves (G13). This eliminates the need for series isolation resistors in charge amplifier feedback networks, preserving signal integrity in piezoelectric and photodiode applications.
Can LT1793IN8#PBF operate from ±5V supplies while maintaining full common-mode range?
Yes, the LT1793IN8#PBF supports ±5V operation with a guaranteed common-mode input range of –10.0 V to +12.9 V (per G-grade specs), enabling rail-to-rail sensor biasing. Figure 5a/b in the datasheet demonstrates clean clipping and recovery with ±5.2 V input swing - confirming absence of phase reversal under overdrive conditions.
What is the purpose of the NC pin (Pin 5) on LT1793IN8#PBF, and how should it be handled on PCB layout?
Pin 5 of the LT1793IN8#PBF is a no-connect terminal - electrically isolated and not bonded internally. It must remain unconnected on the PCB; routing traces or applying solder paste to this pad violates Linear Technology's assembly guidelines and may compromise thermal performance or ESD robustness.
How does LT1793IN8#PBF achieve lower total input noise than bipolar op amps in high-impedance applications?
The LT1793IN8#PBF achieves lower total input noise above 50 kΩ source resistance by combining 6 nV/√Hz voltage noise with 0.8 fA/√Hz current noise - resulting in negligible 2qIBR2 contribution versus the dominant 4kTR thermal noise of high-Z transducers. Bipolar op amps exhibit higher current noise (>100 fA/√Hz), causing total noise to degrade rapidly as RS increases.
LT1793IN8#PBF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 8-DIP (0.300", 7.62mm)
- Packaging:
- Tube
- Product Status:
- Active
- Amplifier Type:
- J-FET
- Number of Circuits:
- 1
- Output Type:
- -
- Slew Rate:
- 3.4V/µs
- Gain Bandwidth Product:
- 4.2 MHz
- -3db Bandwidth:
- -
- Current - Input Bias:
- 4 pA
- Voltage - Input Offset:
- 250 µV
- Current - Supply:
- 4.2mA
- Current - Output / Channel:
- -
- Voltage - Supply Span (Min):
- 9 V
- Voltage - Supply Span (Max):
- 40 V
- Operating Temperature:
- -40°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Through Hole
- Supplier Device Package:
- 8-PDIP
LT1793IN8#PBF FAQ
1.How can I place an order for LT1793IN8#PBF through Aetrix?
Please submit a Request for Quotation (RFQ) for LT1793IN8#PBF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LT1793IN8#PBF reliable?
The price and inventory of LT1793IN8#PBF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LT1793IN8#PBF is usually 5 days.
3.What payment methods are accepted for LT1793IN8#PBF?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LT1793IN8#PBF transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LT1793IN8#PBF?
LT1793IN8#PBF orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LT1793IN8#PBF order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LT1793IN8#PBF?
For technical support, including LT1793IN8#PBF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LT1793IN8#PBF requirements.
6.How does Aetrix verify that LT1793IN8#PBF is sourced from the original manufacturer or authorized distributors?
All LT1793IN8#PBF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LT1793IN8#PBF meets industry standards.
7.What is the process for return or replacement of LT1793IN8#PBF?
All LT1793IN8#PBF units undergo pre-shipment inspection (PSI). If there is an issue with LT1793IN8#PBF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LT1793IN8#PBF part is unused and in its original packaging.
Return procedure for LT1793IN8#PBF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
LT1793IN8#PBF Tags

-
LM358DT
STMicroelectronics

-
LM358DR
Texas Instruments

-
LM2904DR
Texas Instruments

-
LM358ADR
Texas Instruments
-
LM2904DGKR
Texas Instruments
-
LM324DR
Texas Instruments

-
MCP6006T-E/OT
Microchip Technology

-
MCP6006UT-E/OT
Microchip Technology

-
LM324PWR
Texas Instruments

-
LM2902PWR
Texas Instruments
-
LM2902DR
Texas Instruments

-
LM358P
Texas Instruments
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

