Analog Devices Inc. LT1804CDD#PBF

Overview

LT1804CDD#PBF from Analog Devices (formerly Linear Technology) is a dual rail-to-rail input and output operational amplifier in an 8-lead 3mm × 3mm DFN package, delivering 100 V/µs slew rate, 85 MHz gain bandwidth product, 21 nV/√Hz input voltage noise, ±42 mA output drive, and operation from 2.3 V to 12.6 V supplies - used in high-fidelity video line drivers and precision A/D converter front-ends.

For engineers reviewing the LT1804CDD#PBF datasheet, LT1804CDD#PBF pinout, LT1804CDD#PBF application, or LT1804CDD#PBF equivalent, this page provides verified package mapping (DD), confirmed dual-opamp circuit role, validated rail-to-rail I/O behavior, temperature-rated performance (–40°C to 85°C), and real-world design values for output swing, supply current, and noise density - all extracted from the official LT1803/LT1804/LT1805 datasheet (180345f).

Technical Context

The LT1804CDD#PBF integrates two independent high-speed amplifiers on a proprietary complementary bipolar process, with a dual-input-stage architecture (PNP + NPN) enabling rail-to-rail common-mode input range (V_S– to V_S+) and rail-to-rail output swing (within 20 mV of either rail). It maintains stable unity-gain operation with capacitive loads up to 100 pF when series output resistance is applied.

Its open-loop gain is 60 V/mV (typical at 25°C, 5 V supply), PSRR is 90 dB, CMRR is 96 dB, and it features internal ESD protection with back-to-back diodes on inputs. The DD package's underside metal is internally connected to V_S–, enabling low thermal resistance (θ_JA ≈ 50°C/W with PCB thermal pad connection).

Key Specifications

Pinout & Package

The LT1804CDD#PBF is housed in an 8-lead plastic DFN package (3 mm × 3 mm, 0.75 mm height) with exposed metal pad connected internally to V_S–. Thermal performance improves significantly when the pad is soldered to a PCB copper area.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar dual rail-to-rail op amp applications.

Compared with ADA4891-2ARZ-R7 and OPA2350UA/2K5, the LT1804CDD#PBF uniquely balances 100 V/µs slew rate, 85 MHz bandwidth, and 3 mA supply current in a thermally enhanced DFN package - making it optimal for space-constrained, high-fidelity analog signal paths requiring both speed and efficiency.

Availability

LT1804CDD#PBF is available at Aetrix Electronics and suitable for video line driving, A/D converter front-ends, active filter design, and rail-to-rail buffering applications requiring stable component supply, long-term lifecycle support, and traceable sourcing.

Supply support for LT1804CDD#PBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Analog Devices acquired Linear Technology in 2017 and maintains full technical and manufacturing continuity for the LT product family.

The LT1803/LT1804/LT1805 series was designed specifically for high-speed, low-voltage precision signal conditioning - targeting applications where rail-to-rail operation, low noise, and robust output drive must coexist in compact layouts.

FAQ

What is the operating temperature range for the LT1804CDD#PBF?

The LT1804CDD#PBF is specified for operation from –40°C to +85°C. This extended industrial temperature range is guaranteed per the LT1804I grade, and the C-grade (LT1804CDD#PBF) is characterized and expected to meet specifications across this full range, though final QA sampling occurs at 0°C to 70°C per datasheet Note 5.

Does the LT1804CDD#PBF support single-supply operation?

Yes, the LT1804CDD#PBF supports true single-supply operation from 2.3 V to 12.6 V. Its rail-to-rail input stage accepts common-mode voltages from V_S– (GND in single-supply mode) to V_S+, and its output swings within 20 mV of both rails - enabling full dynamic range utilization in 3.3 V or 5 V systems.

What is the thermal resistance (θ_JA) of the LT1804CDD#PBF under typical PCB layout conditions?

The LT1804CDD#PBF has a nominal θ_JA of 160°C/W when mounted on a standard JEDEC 2S2P test board. However, because its underside metal pad is internally connected to V_S–, soldering this pad to a ≥1 cm² copper pour reduces θ_JA to approximately 50°C/W - a critical design consideration for sustained ±42 mA output loading.

How does the input stage architecture of the LT1804CDD#PBF affect offset voltage behavior?

The LT1804CDD#PBF uses a dual-input-stage architecture (PNP + NPN) that switches around 1.3 V below V_S+. Input offset voltage changes at this transition point - typically <1 mV in the PNP region and ≤3.5 mV in the NPN region. Designers must avoid biasing inputs near the crossover to minimize offset discontinuity in precision DC applications.

Can the LT1804CDD#PBF drive a 150 Ω load at 1 MHz with <–75 dBc harmonic distortion?

Yes, the LT1804CDD#PBF achieves –75 dBc 2nd/3rd harmonic distortion at 1 MHz with 2 V_P-P output into 1 kΩ. When driving 150 Ω, distortion rises slightly but remains ≤–70 dBc at 1 MHz per Figure 12 in the 180345f datasheet - well within requirements for NTSC video and high-fidelity data acquisition using the LT1804CDD#PBF.