Analog Devices Inc. LT1813HVCS8#PBF
- Part No.:
- LT1813HVCS8#PBF
- Manufacturer:
- Analog Devices Inc.
- Category:
- Instrumentation, Op Amps, Buffer Amps
- Package:
- 8-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
LT1813HVCS8#PBF.pdf
- Description:
- IC VOLTAGE FEEDBACK 2 CIRC 8SO
- Quantity:
- Payment:

- Shipping:

Inventory:130
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
LT1813HVCS8#PBF from Analog Devices (formerly Linear Technology) is a dual high-speed voltage-feedback operational amplifier with 100MHz gain bandwidth, 750V/µs slew rate, and ±5V or single 5V supply operation. It delivers ±3.5V output swing into 100Ω with ±5V supplies and operates from –40°C to 85°C. Designed for video amplification, cable driving, and active filtering where precision, speed, and capacitive load stability are critical.
For engineers reviewing the LT1813HVCS8#PBF datasheet, LT1813HVCS8#PBF pinout, LT1813HVCS8#PBF application, or LT1813HVCS8#PBF equivalent, key selection criteria include its 750V/µs slew rate under ±5V, 100MHz GBW at ±5V, 3.6mA per amplifier supply current, ±3.5V input CMR, and guaranteed stability with up to 1000pF capacitive loads in unity gain.
Technical Context
The LT1813HVCS8#PBF uses a voltage-feedback topology with current-feedback slewing behavior, enabling both high DC accuracy and fast transient response. Its internal compensation dynamically adapts to capacitive loads up to 1000pF by sensing the output pole and injecting corrective phase margin via an RC network bootstrapped across the output stage.
Input stage employs complementary NPN/PNP transistors for first-order bias current cancellation; input offset current is tightly controlled (≤400nA), while input bias current polarity varies due to beta mismatch. The device is not intended for comparator use due to sustained differential input voltage limitations.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Gain Bandwidth Product | 100MHz at ±5V - enables stable closed-loop gain ≥2 up to 50MHz, suitable for wideband signal conditioning. |
| Slew Rate | 750V/µs at ±5V, AV = –1 - supports ≤30ns 0.1% settling for 5V steps, critical for pulse fidelity in video/cable drivers. |
| Supply Current | 3.6mA per amplifier max at ±5V - low power for dual-channel high-speed operation without thermal derating. |
| Input Offset Voltage | 1.5mV max at 25°C - ensures <±1mV error in precision DC-coupled gain stages with matched source impedances. |
| Capacitive Load Stability | Stable with 0–1000pF - eliminates need for external isolation resistors when driving coaxial cables or ADC input capacitance. |
| Input Common-Mode Range | ±3.5V at ±5V supplies - allows rail-to-rail input handling within ±1.5V of rails, supporting wide dynamic range sensor interfaces. |
| Output Drive | ±40mA min at VOUT = ±3V - drives 100Ω loads to ±3.5V, enabling direct termination of 75Ω video lines. |
Pinout & Package
LT1813HVCS8#PBF is housed in an 8-lead plastic SO package (S8), 3.9mm × 4.9mm × 1.75mm, with exposed pad internally connected to V– for thermal enhancement.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 (OUT A) | Amplifier A output | Low-impedance buffered output capable of ±40mA drive into 100Ω; requires series 75Ω resistor for optimal coaxial cable pulse fidelity. |
| 2 (–IN A) | Inverting input A | High-impedance node sensitive to layout; trace length must be minimized to avoid peaking; balanced source resistance recommended for DC accuracy. |
| 3 (+IN A) | Non-inverting input A | High-impedance node; differential input withstands ±6V transient without damage, but sustained use as comparator violates thermal limits. |
| 4 (V–) | Negative supply | Internally connects to exposed pad; must be solidly tied to ground plane for thermal management and PSRR optimization. |
| 5 (V+) | Positive supply | Bypass with 0.01µF ceramic + 1µF tantalum; PSRR >75dB up to 10MHz ensures immunity to digital supply noise. |
| 6 (OUT B) | Amplifier B output | Independent output channel; channel separation >80dB prevents crosstalk in dual-path applications like differential receivers. |
| 7 (–IN B) | Inverting input B | Electrically isolated from Pin 2; layout symmetry with Pin 2 required to maintain matching between channels. |
| 8 (+IN B) | Non-inverting input B | Matches Pin 3 characteristics; enables true dual-channel operation without shared reference path interference. |
Key Features
| Feature | Design Value |
|---|---|
| Voltage-feedback architecture with current-feedback slewing | Combines 100MHz GBW and 750V/µs slew rate-enables accurate wideband amplification without stability trade-offs. |
| Dynamic capacitive-load compensation | Maintains ≥45° phase margin with 1000pF load-eliminates external compensation components in buffer and cable driver designs. |
| Complementary NPN/PNP input stage | Reduces input offset current to ≤400nA-minimizes DC error in high-impedance transimpedance configurations. |
| High output drive into low-Z loads | Delivers ±3.5V into 100Ω with ±5V supplies-supports direct 75Ω video line driving without external buffers. |
| Wide supply range support | Operates from ±1.25V to ±6.5V (HV version)-enables use in legacy ±5V systems and newer low-voltage precision rails. |
Applications
| Video Signal Amplification | Cable Driver |
|---|---|
Use Scenario: Amplifying composite video signals (e.g., NTSC/PAL) before distribution to multiple monitors or recording devices. IC Role / Device Role / Timing Role: Dual-channel voltage amplifier providing gain-of-2, DC-coupled, with <0.22% differential gain and <0.21° differential phase error at 4.43MHz. Use Value: Preserves color fidelity and sync timing integrity over long coaxial runs without requiring AC coupling or level-shifting circuitry. | Use Scenario: Driving 75Ω coaxial cables in broadcast equipment, test instrumentation, or medical imaging front-ends. IC Role / Device Role / Timing Role: Unity-gain buffer with 750V/µs slew rate and 30ns 0.1% settling-ensures minimal rise-time degradation and overshoot on 5V video pulses. Use Value: Enables direct 75Ω source termination without external series resistor, reducing component count and board space while maintaining EMI compliance. |
| Active Filter Stage | Data Acquisition Front-End |
Use Scenario: Implementing high-Q bandpass filters in communication receivers or spectrum analyzers with independently adjustable fC, Q, and gain. IC Role / Device Role / Timing Role: Dual op-amp configured as transadmittance-based filter core with 100MHz GBW and low distortion (<–76dB THD). Use Value: Achieves 100kHz center frequency with Q=10 and <0.12dB passband peaking-replaces discrete op-amp + passive networks with single IC solution. | Use Scenario: Conditioning analog sensor outputs (e.g., strain gauges, thermocouples) prior to SAR or sigma-delta ADC sampling. IC Role / Device Role / Timing Role: Precision gain stage with 1.5mV max VOS, 8nV/√Hz input noise, and 100MHz bandwidth for anti-aliasing and settling control. Use Value: Supports 16-bit+ resolution at ≥1MSPS sampling rates by limiting noise contribution to <1LSB and ensuring full-scale step settles in <35ns. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual high-speed op-amp applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| LT1813CS8#PBF | Same die, standard supply voltage rating (12.6V total) vs HV's 13.5V; identical AC specs but lower max supply tolerance. | Not rated for ±6.5V operation; unsuitable for designs requiring headroom beyond ±5V or single 12V rail use. | Select LT1813HVCS8#PBF when operating at ±6.5V or needing guaranteed PSRR performance up to ±6.5V supply. |
| ADA4897-2ARZ | Lower supply current (1.2mA/amplifier), higher GBW (225MHz), but only ±3.5V output swing into 100Ω and no 1000pF capacitive load guarantee. | Requires external isolation for >100pF loads; less suitable for direct coaxial driving or legacy ±5V systems demanding full rail swing. | Choose ADA4897-2ARZ for ultra-low-power, high-GBW applications where capacitive load is <100pF and supply is ≤±3.3V. |
Compared with LT1813CS8#PBF, the LT1813HVCS8#PBF extends usable supply range by ±0.5V per rail while retaining identical noise, distortion, and settling performance; versus ADA4897-2ARZ, it trades 125MHz GBW for guaranteed 1000pF stability and ±3.5V drive into 100Ω-making it superior for robust video and cable interface designs.
Availability
LT1813HVCS8#PBF is available at Aetrix Electronics and suitable for video signal amplification, cable driving, and active filter applications requiring stable component supply, long-term industrial availability, and guaranteed parametric performance across –40°C to 85°C.
Supply support for LT1813HVCS8#PBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices, Inc. (ADI) is a global leader in high-performance analog, mixed-signal, and digital signal processing technologies, serving industrial, automotive, communications, and healthcare markets.
The LT1813HVCS8#PBF belongs to ADI's legacy Linear Technology high-speed op-amp product line, engineered specifically for applications demanding simultaneous high bandwidth, precision DC performance, and robust capacitive load drive capability.
FAQ
What is the maximum supply voltage for LT1813HVCS8#PBF?
The LT1813HVCS8#PBF supports a total supply voltage of up to 13.5V (e.g., ±6.5V or +12V/–1.5V), exceeding the 12.6V limit of the standard LT1813CS8#PBF. This extended rating allows safe operation in systems with higher rail margins or single-supply configurations requiring >10V headroom, while maintaining all specified AC and DC performance parameters.
Does LT1813HVCS8#PBF require external compensation for capacitive loads?
No, the LT1813HVCS8#PBF does not require external compensation for capacitive loads. Its internal adaptive compensation circuitry ensures stability with capacitive loads ranging from 0pF to 1000pF in unity gain, as verified in the datasheet's G30–G36 transient plots. This eliminates the need for series isolation resistors or parallel feedback capacitors in cable driver and ADC buffer applications.
What is the input bias current polarity behavior of LT1813HVCS8#PBF?
The LT1813HVCS8#PBF uses complementary NPN/PNP input transistors, resulting in input bias current polarity that may be positive or negative depending on beta matching variations. However, its input offset current is tightly controlled (≤400nA), so DC accuracy is best preserved by using balanced source impedances at both inputs-e.g., 100Ω on +IN and –IN-to cancel bias-induced offset errors.
Can LT1813HVCS8#PBF be used as a comparator?
No, the LT1813HVCS8#PBF is not designed or characterized for comparator operation. While its inputs tolerate ±6V differential voltage transiently, sustained differential input causes excessive internal power dissipation and risks junction overheating. Its recovery time from saturation is unspecified, and propagation delay is not characterized-use dedicated comparators like the LT1719 for such functions.
How does LT1813HVCS8#PBF perform in single 5V supply applications?
In single 5V supply operation (V+ = 5V, V– = 0V), the LT1813HVCS8#PBF delivers an output swing from 1.1V to 3.9V into a 100Ω load referenced to 2.5V, with 3.6mA supply current per amplifier and 94MHz GBW. Its input common-mode range extends from 0.8V to 4.2V, supporting rail-to-rail input sensing when biased appropriately-ideal for portable video and data acquisition systems.
LT1813HVCS8#PBF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- LT®
- Package/Case:
- 8-SOIC (0.154", 3.90mm Width)
- Packaging:
- Tube
- Product Status:
- Active
- Amplifier Type:
- Voltage Feedback
- Number of Circuits:
- 2
- Output Type:
- -
- Slew Rate:
- 750V/µs
- Gain Bandwidth Product:
- 100 MHz
- -3db Bandwidth:
- 200 MHz
- Current - Input Bias:
- 900 nA
- Voltage - Input Offset:
- 500 µV
- Current - Supply:
- 3mA (x2 Channels)
- Current - Output / Channel:
- 60 mA
- Voltage - Supply Span (Min):
- 2.5 V
- Voltage - Supply Span (Max):
- 12.6 V
- Operating Temperature:
- -40°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-SO
LT1813HVCS8#PBF FAQ
1.How can I place an order for LT1813HVCS8#PBF through Aetrix?
Please submit a Request for Quotation (RFQ) for LT1813HVCS8#PBF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LT1813HVCS8#PBF reliable?
The price and inventory of LT1813HVCS8#PBF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LT1813HVCS8#PBF is usually 5 days.
3.What payment methods are accepted for LT1813HVCS8#PBF?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LT1813HVCS8#PBF transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LT1813HVCS8#PBF?
LT1813HVCS8#PBF orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LT1813HVCS8#PBF order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LT1813HVCS8#PBF?
For technical support, including LT1813HVCS8#PBF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LT1813HVCS8#PBF requirements.
6.How does Aetrix verify that LT1813HVCS8#PBF is sourced from the original manufacturer or authorized distributors?
All LT1813HVCS8#PBF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LT1813HVCS8#PBF meets industry standards.
7.What is the process for return or replacement of LT1813HVCS8#PBF?
All LT1813HVCS8#PBF units undergo pre-shipment inspection (PSI). If there is an issue with LT1813HVCS8#PBF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LT1813HVCS8#PBF part is unused and in its original packaging.
Return procedure for LT1813HVCS8#PBF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
LT1813HVCS8#PBF Tags

-
LM358DT
STMicroelectronics

-
LM358DR
Texas Instruments

-
LM2904DR
Texas Instruments

-
LM358ADR
Texas Instruments
-
LM2904DGKR
Texas Instruments
-
LM324DR
Texas Instruments

-
MCP6006T-E/OT
Microchip Technology

-
MCP6006UT-E/OT
Microchip Technology

-
LM324PWR
Texas Instruments

-
LM2902PWR
Texas Instruments
-
LM2902DR
Texas Instruments

-
LM358P
Texas Instruments
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…
