My Inquiry
My Account
Analog Devices Inc. LT1940LEFE#PBF
- Part No.:
- LT1940LEFE#PBF
- Manufacturer:
- Analog Devices Inc.
- Package:
- 16-TSSOP (0.173", 4.40mm Width) Exposed Pad
- Datasheet:
-
LT1940LEFE#PBF.pdf
- Description:
- IC REG BUCK ADJ 1.4A DL 16TSSOP
- Quantity:
- Payment:
- Shipping:
Inventory:3,570
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
LT1940LEFE#PBF from Analog Devices (formerly Linear Technology) is a dual monolithic 1.4A, 1.1MHz step-down DC/DC switching regulator with internal bipolar NPN power switches, designed for independent 3.3V/5V or 1.8V/3.3V dual-rail generation in space-constrained systems. It operates from 3.6V to 7V input, delivers anti-phase switching to reduce input ripple, and integrates independent shutdown, soft-start, and power-good indicators for precise supply sequencing in DSP and disk drive power supplies.
For engineers reviewing the LT1940LEFE#PBF datasheet, LT1940LEFE#PBF pinout, LT1940LEFE#PBF application, or LT1940LEFE#PBF equivalent, key selection criteria include its 3.6V–7V input range, 1.25V feedback reference, 1.1MHz fixed-frequency operation, thermal-enhanced 16-lead TSSOP package with exposed GND pad, and dual-channel current-mode control enabling stable regulation under fast transients in DSL/cable modem and distributed power systems.
Technical Context
The LT1940LEFE#PBF implements two independent current-mode PWM buck regulators synchronized to a single 1.1MHz master oscillator with 180° phase offset-reducing input RMS ripple by canceling harmonic components. Each channel uses an internal error amplifier (GM = 330 µmhos, gain = 180 V/V) controlling peak switch current via the VC pin, with 0.75V threshold and 1.8V clamp.
It employs bipolar NPN power switches (2A rated, 320 mV VCE(SAT) at 1A), requiring external BOOST capacitors and Schottky diodes to generate gate drive voltage > VIN. Power-good comparators monitor FB pins with ±125 mV threshold offset and open-collector outputs valid only when VIN > 2.4V and RUN/SS > 0.6V.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Input Voltage Range | 3.6V to 7V - matches regulated 5V system rails; excludes wide-range LT1940 variant. |
| Switching Frequency | 1.1 MHz (±15%) - enables use of sub-5mm ceramic inductors (e.g., 3.3µH Sumida CR43-3R3) and low-ESR X5R/X7R output caps. |
| Output Current per Channel | 1.4 A continuous - limited by internal 2.4A switch current limit and thermal design in TSSOP package. |
| Feedback Reference Voltage | 1.25 V (±1.2%) - sets output via resistor divider; 10kΩ max R2 avoids bias-current-induced error. |
| Power-Good Threshold | FB within ±125 mV of 1.25V - provides sequenced enable signal for microcontrollers/DSPs without external monitoring. |
| Quiescent Current | 4.8 mA - supports low-noise biasing of analog circuitry during active regulation. |
| Shutdown Current | 45 µA - enables deep sleep mode for battery-backed or low-power standby states. |
Pinout & Package
LT1940LEFE#PBF is housed in a 16-lead thermally enhanced TSSOP package with exposed GND pad (Pin 17), requiring soldering to PCB for thermal and electrical integrity. Pin numbering follows standard JEDEC TSSOP top-view convention.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| BOOST1, BOOST2 (1, 8) | Bootstrap drive voltage input | Accepts externally generated voltage ≥2.5V above SW to fully saturate internal NPN switches; tied via diode to VOUT or VIN. |
| SW1, SW2 (2, 7) | Internal switch collector output | Connects to inductor and catch diode; voltage swings from GND to VIN; requires local high-frequency bypassing. |
| VIN (3–6) | Main power input | Four parallel pins share 7V max input; must be locally bypassed with ≥4.7µF X7R ceramic capacitor. |
| FB1, FB2 (9, 16) | Output voltage sense input | Regulated to 1.25V; connects to resistor divider tap; bias current ≤1200 nA affects accuracy at high R2 values. |
| VC1, VC2 (10, 15) | Error amplifier output | Controls peak switch current; clamped at 0.75V turn-on / 1.8V max; used for loop compensation or override shutdown. |
| PG1, PG2 (11, 14) | Open-collector power-good indicator | Pulled low until FB reaches 90% of target; enables supply sequencing; requires external pull-up resistor. |
| RUN/SS1, RUN/SS2 (12, 13) | Enable + soft-start control | Threshold = 0.6V; internal 2µA current source charges external cap for controlled startup; grounding disables channel. |
| GND (17) | Ground reference & thermal path | Exposed pad must be soldered to large copper area for θJA = 45°C/W and reliable 1.4A operation. |
Key Features
| Feature | Design Value |
|---|---|
| Anti-phase switching | Reduces input ripple current magnitude by up to 50% vs. in-phase dual converters-lowers required input capacitance and EMI filter size. |
| Independent power-good outputs | Enables hardware-based sequencing of downstream logic (e.g., FPGA core/I/O rails) without software intervention or external supervisors. |
| Current-mode PWM architecture | Provides inherent cycle-by-cycle overcurrent protection and stable loop response with minimal compensation (single-pole RC on VC pin). |
| Thermally enhanced TSSOP | Exposes die attach pad as GND; achieves 10°C/W junction-to-case thermal resistance-critical for sustained 1.4A/channel operation at 85°C ambient. |
| Frequency foldback under fault | Automatically reduces switching frequency during short-circuit or overload, limiting power dissipation and preventing thermal runaway. |
Applications
| Disk Drive Power Supply | DSP Core & I/O Rail Generation |
|---|---|
Use Scenario: Dual-rail power for 2.5-inch SATA HDD requiring independent 5V motor and 3.3V logic supply with tight sequencing. IC Role / Device Role / Timing Role: Primary dual-buck controller managing both rails; PG1/PG2 coordinate spin-up sequence via FPGA enable signals. Use Value: Anti-phase operation cuts input ripple by 40%, allowing smaller 10µF X7R input cap instead of bulk tantalum-reducing board area by 35%. | Use Scenario: Powering TI C6000 DSP with 1.2V core and 3.3V I/O from a single 5V intermediate rail. IC Role / Device Role / Timing Role: Generates both rails simultaneously; RUN/SS2 delayed via RC network ensures I/O powers before core. Use Value: Independent soft-start prevents inrush current clash; 1.1MHz operation permits 2.2µH inductors-enabling full solution in <1.2 cm² footprint. |
| DSL Modem Line Card | Cable Modem Embedded CPU |
Use Scenario: Compact line card with ADI AD9862 mixed-signal front-end requiring clean 3.3V analog and 1.8V digital supplies. IC Role / Device Role / Timing Role: Dual regulator delivering low-noise rails; VC pins filtered to suppress switching noise coupling into ADC reference paths. Use Value: 1.25V reference tolerance ±1.2% ensures <±1% output accuracy-meeting AD9862's AVDD specification without post-regulation LDOs. | Use Scenario: Broadcom BCM3383 SoC powering Ethernet PHY, DOCSIS MAC, and flash memory from 5V wall adapter. IC Role / Device Role / Timing Role: Supplies 1.2V CPU core and 3.3V interface rails; PG outputs feed reset controller for deterministic boot timing. Use Value: 45µA shutdown current extends standby time in always-on cable modems; thermal TSSOP sustains 85°C ambient without derating. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-output buck regulator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| LTC3631EFE#PBF | Monolithic dual 1.5A buck; 3.1V–35V input; 350kHz–2MHz programmable frequency; integrated MOSFETs (no external diodes needed). | Wider input range suits unregulated 12V/24V systems; higher efficiency at light loads due to Burst Mode™; no BOOST diode/cap required. | Select when input exceeds 7V or when simplifying bill-of-materials by eliminating external diodes/caps is critical. |
| TPS65270RGET | Dual 2A/1.5A buck; 4.5V–18V input; 350kHz–2.2MHz sync capability; integrated power-good and enable sequencing logic. | Higher current rating supports future-proofing; built-in sequencing engine replaces discrete RC networks; automotive-grade AEC-Q100 option available. | Select for new designs needing >1.4A per rail or automated multi-rail sequencing without firmware dependency. |
Compared with LTC3631EFE#PBF and TPS65270RGET, LT1940LEFE#PBF offers lower quiescent current (4.8mA vs. 12mA/25mA), tighter feedback reference (±1.2% vs. ±1.5%), and proven reliability in legacy telecom infrastructure-but lacks programmable frequency and requires external BOOST components.
Availability
LT1940LEFE#PBF is available at Aetrix Electronics and suitable for disk drive power supplies, DSP power supplies, and DSL/cable modem applications requiring stable component supply, long-term lifecycle support, and traceable sourcing for industrial and telecom OEMs.
Supply support for LT1940LEFE#PBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices, Inc. (acquired Linear Technology in 2017) is a global leader in high-performance analog, mixed-signal, and power management semiconductors, serving precision instrumentation, communications, and industrial markets.
The LT1940 family was developed by Linear Technology specifically for compact, high-efficiency dual-rail DC/DC conversion in datacom and storage equipment-emphasizing sequencing integrity, thermal robustness in surface-mount packages, and compatibility with ceramic passives.
FAQ
What is the maximum input voltage rating for LT1940LEFE#PBF?
The absolute maximum input voltage for LT1940LEFE#PBF is 7V, as specified in the Absolute Maximum Ratings table. This distinguishes it from the standard LT1940 (25V max). Exceeding 7V risks permanent damage to the internal power switches and BOOST circuitry. The device is intended for use with regulated 5V supplies, such as those derived from upstream AC/DC adapters or point-of-load converters.
Does LT1940LEFE#PBF require external catch diodes?
Yes, LT1940LEFE#PBF requires external Schottky catch diodes (e.g., MBRM120LT3 or UPS120) connected from SW pins to output rails. Unlike synchronous buck controllers, LT1940LEFE#PBF uses bipolar NPN internal switches and cannot actively sink inductor current-so the diode provides the freewheeling path during switch-off periods. Diode reverse voltage rating must exceed the maximum input voltage (≥7V).
How does the anti-phase switching in LT1940LEFE#PBF reduce input ripple?
LT1940LEFE#PBF synchronizes its two buck channels to a single 1.1MHz oscillator with 180° phase offset. This causes input current pulses from each channel to occur alternately, resulting in cancellation of fundamental and lower-order harmonic ripple components. Measured input ripple current is reduced by ~40–50% compared to in-phase operation-allowing smaller input capacitors and relaxed EMI filtering requirements in compact designs.
Can LT1940LEFE#PBF operate with ceramic output capacitors only?
Yes, LT1940LEFE#PBF is fully compatible with ceramic-only output capacitors-including X5R and X7R types-as its current-mode control loop does not rely on capacitor ESR for stability. A typical 10µF/6.3V X7R ceramic capacitor delivers low output ripple (<15mVpp) and excellent transient response for 1.4A loads. Avoid Y5V/Z5U dielectrics due to severe capacitance loss at bias voltage.
What thermal management is required for LT1940LEFE#PBF at full 1.4A load per channel?
LT1940LEFE#PBF requires soldering of its exposed GND pad (Pin 17) to a minimum 200 mm² copper area on the PCB to achieve the specified θJA = 45°C/W. At 85°C ambient and full 1.4A per channel, junction temperature reaches ~115°C-within the 125°C maximum. Adding thermal vias (≥6×0.3mm) beneath the pad to inner ground planes further improves heat dissipation and enables sustained operation without derating.
LT1940LEFE#PBF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 16-TSSOP (0.173", 4.40mm Width) Exposed Pad
- Packaging:
- Tube
- Product Status:
- Active
- Function:
- Step-Down
- Output Configuration:
- Positive
- Topology:
- Buck
- Output Type:
- Adjustable
- Number of Outputs:
- 2
- Voltage - Input (Min):
- 3.6V
- Voltage - Input (Max):
- 7V
- Voltage - Output (Min/Fixed):
- 1.25V
- Voltage - Output (Max):
- 6.16V
- Current - Output:
- 1.4A
- Frequency - Switching:
- 1.1MHz
- Synchronous Rectifier:
- No
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 16-TSSOP-EP
LT1940LEFE#PBF FAQ
1.How can I place an order for LT1940LEFE#PBF through Aetrix?
Please submit a Request for Quotation (RFQ) for LT1940LEFE#PBF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LT1940LEFE#PBF reliable?
The price and inventory of LT1940LEFE#PBF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LT1940LEFE#PBF is usually 5 days.
3.What payment methods are accepted for LT1940LEFE#PBF?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LT1940LEFE#PBF transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LT1940LEFE#PBF?
LT1940LEFE#PBF orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LT1940LEFE#PBF order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LT1940LEFE#PBF?
For technical support, including LT1940LEFE#PBF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LT1940LEFE#PBF requirements.
6.How does Aetrix verify that LT1940LEFE#PBF is sourced from the original manufacturer or authorized distributors?
All LT1940LEFE#PBF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LT1940LEFE#PBF meets industry standards.
7.What is the process for return or replacement of LT1940LEFE#PBF?
All LT1940LEFE#PBF units undergo pre-shipment inspection (PSI). If there is an issue with LT1940LEFE#PBF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LT1940LEFE#PBF part is unused and in its original packaging.
Return procedure for LT1940LEFE#PBF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
LT1940LEFE#PBF Tags
-
TPS562201DDCR
Texas Instruments
-
MC34063ABD-TR
STMicroelectronics
-
TPS561201DDCR
Texas Instruments
-
MC33063ADR
Texas Instruments
-
MC34063ADR
Texas Instruments
-
TPS560200DBVR
Texas Instruments
-
AP3012KTR-G1
Diodes Incorporated
-
TLV61048DBVR
Texas Instruments
-
AZ34063UMTR-G1
Diodes Incorporated
-
TPS562200DDCR
Texas Instruments
-
AP62300TWU-7
Diodes Incorporated
-
MC34063EBD-TR
STMicroelectronics
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…
