My Inquiry
My Account
Analog Devices Inc. LT1952MPGN-1#PBF
- Part No.:
- LT1952MPGN-1#PBF
- Manufacturer:
- Analog Devices Inc.
- Category:
- DC DC Switching Controllers
- Package:
- 16-SSOP (0.154", 3.90mm Width)
- Datasheet:
-
LT1952MPGN-1#PBF.pdf
- Description:
- IC REG CTRLR FWRD CONV 16SSOP
- Quantity:
- Payment:
- Shipping:
Inventory:3,052
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
LT1952MPGN-1#PBF from Analog Devices (formerly Linear Technology) is a current-mode PWM controller optimized for single-switch synchronous forward converters, featuring programmable volt-second clamp, 107mV precision overcurrent threshold, 100kHz–500kHz adjustable switching frequency, and dual gate drivers (OUT ±1A, SOUT ±50mA) for primary MOSFET and synchronous rectifier control - deployed in 36V–72V telecom bus converters delivering 12V/20A.
For engineers reviewing the LT1952MPGN-1#PBF datasheet, LT1952MPGN-1#PBF pinout, LT1952MPGN-1#PBF application, or LT1952MPGN-1#PBF equivalent, key selection considerations include its –55°C to 125°C MP-grade temperature range, adaptive duty cycle clamping for transformer reset safety, low 400µA startup current enabling bootstrap start from low input voltages, and independent slope compensation/leading edge blanking for robust loop stability across wide inductor/MOSFET selections.
Technical Context
The LT1952MPGN-1#PBF implements true current-mode control with an op-amp-based error amplifier (65–85dB open-loop gain, 3MHz unity-gain bandwidth), enabling flexible compensation networks. Its adaptive volt-second clamp uses resistor-ratio programming via SD_VSEC and SS_MAXDC pins - eliminating external timing capacitors and reducing oscillator drift dependency by an order of magnitude versus capacitor-based clamps.
It integrates two synchronized gate drivers: OUT delivers ±1A peak into a 13V-clamped output for primary N-MOSFET drive, while SOUT provides ±50mA into a 12V-clamped signal for secondary-side synchronous rectifier timing, with programmable delay (40–120ns) between SOUT and OUT edges via the DELAY pin - critical for optimizing forward converter efficiency under varying load/line conditions.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Operating Input Voltage | 36V to 72V system input range; VIN supply pin operates from 7.75V (ON) to 6.5V (OFF) - enabling reliable bootstrap start-up from low-voltage auxiliary windings. |
| Switching Frequency Range | 100kHz to 500kHz, programmable via ROSC pin resistor; supports synchronization to external clock up to 1.5×fOSC - allows EMI optimization and multi-phase interleaving. |
| Overcurrent Threshold | Precision 107mV OC pin threshold, independent of duty cycle - ensures consistent hiccup-mode short-circuit protection without gain drift across operating conditions. |
| Output Driver Capability | OUT: ±1A peak, 13V-clamped; SOUT: ±50mA peak, 12V-clamped - enables direct drive of medium-power primary MOSFETs and precise timing control of synchronous rectifiers. |
| Temperature Range | –55°C to 125°C junction operating range (MP-grade) - qualified for military, aerospace, and harsh industrial environments requiring extended thermal reliability. |
| Volt-Second Clamp | Programmable via SD_VSEC and SS_MAXDC resistor dividers - provides adaptive maximum duty cycle limiting to prevent transformer saturation without external capacitor. |
| Startup Current | 400µA typical at VIN ON = 7.75V - permits low-power RC-based bootstrap start-up from high-impedance bias sources, reducing auxiliary winding complexity. |
Pinout & Package
LT1952MPGN-1#PBF is housed in a 16-pin plastic SSOP (Shrink Small Outline Package) with exposed pad for thermal enhancement, footprint compatible with JEDEC MO-153 standard and optimized for high-density DC/DC converter layouts.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| COMP (1) | Error amplifier output | Op-amp output driving compensation network; 0.8V–2.5V range maps to 0–220mV ISENSE threshold - enables isolated (optocoupler) or non-isolated loop design. |
| FB (2) | Feedback input | Compares output voltage divider against internal 1.23V reference; FB = VREF disables error amplifier - supports remote sensing and disable functionality. |
| ROSC (3) | Oscillator programming | Resistor-to-ground sets fOSC from 100kHz–500kHz; nominal 1.0V pin voltage - allows precise frequency tuning and EMI spread-spectrum implementation. |
| SYNC (4) | External clock input | Logic-compatible input accepting 10%–90% duty cycle signals up to 500kHz - enables synchronization to system clocks or noise-sensitive timing domains. |
| SS_MAXDC (5) | Soft-start & max duty clamp | Capacitorless soft-start ramp and adaptive duty cycle limit control; voltage sets clamp level - eliminates timing capacitor drift and simplifies BOM. |
| VREF (6) | 2.5V reference output | Stable 2.5V source capable of 2.5mA sink/source; used for resistor dividers on SD_VSEC, SS_MAXDC, BLANK, DELAY - reduces external reference components. |
| SD_VSEC (7) | UVLO & volt-second clamp | 1.32V accurate threshold for shutdown and transformer reset safeguard; 10µA hysteresis enables programmable UVLO - replaces discrete supervisor ICs. |
| GND (8) | Analog ground | Reference for FB, COMP, ROSC, SYNC - must be separated from PGND to minimize noise coupling into control loop. |
| BLANK (9) | Leading edge blanking | Resistor-to-ground programs blanking time (180–540ns); prevents false OC trips during MOSFET turn-on noise - improves reliability in high-dV/dt environments. |
| ISENSE (10) | Current sense input | Connects to source of primary MOSFET; accepts slope compensation resistor - forms inner current loop for fast transient response and inherent cycle-by-cycle protection. |
| OC (11) | Overcurrent detection | Direct connection to sense resistor; 107mV threshold triggers immediate soft-start latch - provides deterministic fault response without software intervention. |
| DELAY (12) | Synchronous timing delay | Resistor-to-ground programs 40–120ns SOUT-to-OUT delay - aligns secondary rectifier conduction with optimal transformer reset window. |
| PGND (13) | Power ground | Return path for OUT/SOUT drivers and internal power switches - requires low-inductance connection to minimize ground bounce and EMI. |
| OUT (14) | Primary MOSFET driver | ±1A gate driver with 13V clamp; active pull-off in shutdown - drives N-channel MOSFETs directly without external buffer stages. |
| VIN (15) | Supply input | Input for internal circuitry; 7.75V ON / 6.5V OFF thresholds (LT1952-1 variant); 400µA startup current - enables operation from low-voltage bias windings. |
| SOUT (16) | Synchronous rectifier sync | ±50mA 12V-clamped output in phase with OUT; programmable delay - controls timing of secondary-side FETs for >90% forward converter efficiency. |
Key Features
| Feature | Design Value |
|---|---|
| Synchronous rectifier control | Dual-output architecture (SOUT + OUT) with programmable inter-output delay enables precise timing of secondary-side FETs - eliminating body-diode conduction losses in forward converters. |
| Adaptive volt-second clamp | Resistor-ratio-based SD_VSEC/SS_MAXDC interface replaces capacitor-dependent clamps - achieves <1% duty cycle error vs. >10% in capacitor-timed solutions, preventing transformer saturation under transients. |
| True PWM soft-start | SS_MAXDC pin ramps maximum duty cycle linearly from zero - avoids inrush current stress on MOSFETs, transformers, and output capacitors during power-up. |
| Hiccup-mode short-circuit protection | 107mV OC threshold triggers immediate soft-start latch and automatic recovery - limits average fault energy to safe levels without requiring external current-limit ICs. |
| Low-current bootstrap start-up | 400µA VIN start-up current at 7.75V enables RC-based bias from auxiliary windings - eliminates need for dedicated start-up regulators in space-constrained telecom modules. |
| Programmable slope compensation | Resistor on ISENSE pin adjusts compensation ramp amplitude - maintains stable current-mode operation across wide ranges of inductance and MOSFET RDS(on). |
Applications
| Telecom 48V Bus Converter | Industrial Isolated DC/DC |
|---|---|
|
Use Scenario: 36V–72V input telecom power system delivering regulated 12V/20A semi-regulated bus for line cards and baseband units. IC Role / Device Role / Timing Role: Primary-side PWM controller managing single-MOSFET forward topology with synchronous rectification on secondary side. Use Value: Adaptive volt-second clamp allows >50% duty cycle operation at high input voltages - increasing transformer and MOSFET utilization while maintaining safe reset margin. |
Use Scenario: DIN-rail mounted 24V/48V input industrial power supply generating isolated 5V/3.3V rails for PLC I/O and sensor interfaces. IC Role / Device Role / Timing Role: Core controller implementing current-mode regulation with optocoupler feedback and programmable slope compensation. Use Value: True op-amp COMP pin enables wide-bandwidth compensation - achieving <50µs load transient response for real-time control applications. |
| Military/Aerospace Power | High-Efficiency Server PSU |
|
Use Scenario: Ruggedized 28V aircraft power system converting to 28V/15A output with extended temperature operation and radiation-tolerant layout. IC Role / Device Role / Timing Role: MP-grade controller providing –55°C to 125°C operation with low 400µA startup current for cold-start capability. Use Value: SD_VSEC-based UVLO with programmable hysteresis ensures clean power sequencing across wide ambient temperature swings - meeting MIL-STD-704E requirements. |
Use Scenario: High-density server board power delivery using forward converter to generate 12V intermediate bus from 48V backplane. IC Role / Device Role / Timing Role: Dual-driver controller synchronizing primary switch and secondary synchronous rectifiers with nanosecond-level delay tuning. Use Value: Programmable 40–120ns SOUT-to-OUT delay minimizes dead-time losses - improving full-load efficiency by 1.2% versus fixed-delay controllers. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar forward converter controller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| LT3748IMS#PBF | Integrated MOSFET gate drivers with 105°C max junction temp; no SOUT pin; relies on external sync for secondary timing. | Designed for flyback/isolated buck; lacks adaptive volt-second clamp and dual-output timing - unsuitable for high-duty-cycle forward topologies. | Select LT3748 only for flyback designs requiring integrated drivers; avoid for forward converters needing >50% duty cycle or precise synchronous rectifier timing. |
| UCC2891DR | Fixed 100kHz frequency; no programmable slope compensation; 1.25V reference; SOIC-16 package with 0°C to 70°C rating. | Targeted at cost-sensitive industrial supplies; lacks MP-grade temp range, programmable frequency, and adaptive clamp - limited to lower-power, less demanding environments. | Choose UCC2891 for commercial-temp, fixed-frequency forward converters below 150W; reject for telecom/military use requiring wide temp range or adaptive reset control. |
Compared with LT3748IMS#PBF and UCC2891DR, the LT1952MPGN-1#PBF uniquely combines MP-grade temperature support, resistor-programmed volt-second clamp, and dual synchronized outputs - making it the only option among the three qualified for high-reliability, high-efficiency forward converters operating above 50% duty cycle across –55°C to 125°C.
Availability
LT1952MPGN-1#PBF is available at Aetrix Electronics and suitable for telecommunications power supplies, industrial isolated DC/DC converters, and aerospace power systems requiring stable component supply, long-term lifecycle assurance, and extended temperature performance.
Supply support for LT1952MPGN-1#PBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices (acquired Linear Technology in 2017) is a global leader in high-performance analog, mixed-signal, and power management semiconductors, serving precision instrumentation, communications, and industrial markets.
The LT1952MPGN-1#PBF belongs to Linear's legacy high-efficiency DC/DC controller family, designed specifically for single-switch forward converters in telecom and industrial power systems demanding reliability, adaptive transformer reset, and synchronous rectification control.
FAQ
What is the operating temperature range for the LT1952MPGN-1#PBF?
The LT1952MPGN-1#PBF is rated for a junction operating temperature range of –55°C to 125°C (MP-grade), verified per manufacturer test data. This extended range supports deployment in military, aerospace, and harsh industrial environments where standard commercial or industrial grade parts would fail. The LT1952MPGN-1#PBF undergoes full characterization across this range, including startup behavior, duty cycle clamp accuracy, and OC threshold stability.
How does the LT1952MPGN-1#PBF implement adaptive volt-second clamp without an external capacitor?
The LT1952MPGN-1#PBF implements adaptive volt-second clamp using resistor-ratio programming between SD_VSEC and SS_MAXDC pins - referencing the internal 2.5V VREF. An increase in SD_VSEC voltage (e.g., from a resistor divider off the input bus) directly reduces the maximum allowable duty cycle, preventing transformer saturation. This method eliminates capacitor drift and oscillator tolerance errors inherent in RC-based clamps, achieving <1% duty cycle error versus >10% in capacitor-timed alternatives.
What is the difference between LT1952MPGN-1#PBF and LT1952MPGN#PBF?
The LT1952MPGN-1#PBF features lower VIN undervoltage lockout thresholds (7.75V ON / 6.5V OFF) and reduced 400µA startup current, enabling reliable bootstrap start-up from low-voltage auxiliary windings. In contrast, the LT1952MPGN#PBF has higher thresholds (14.25V ON / 8.75V OFF) and 460µA startup current - optimized for high-input-voltage systems. Both share identical pinout, MP-grade temperature range, and functional architecture.
Can the LT1952MPGN-1#PBF synchronize to an external clock, and what is the maximum frequency?
Yes, the LT1952MPGN-1#PBF accepts external synchronization via the SYNC pin, which is logic-compatible and accepts signals with 10%–90% duty cycle. The maximum supported SYNC frequency is 500kHz - corresponding to 1.5× the maximum programmable oscillator frequency (fOSC ≤ 500kHz). This allows precise EMI reduction through frequency dithering or multi-phase interleaving in high-density power systems.
What is the purpose of the SOUT pin on the LT1952MPGN-1#PBF?
The SOUT pin on the LT1952MPGN-1#PBF delivers a ±50mA, 12V-clamped signal synchronized with the primary OUT driver - specifically intended to control the gate timing of secondary-side synchronous rectifier MOSFETs in forward converters. Its delay relative to OUT is programmable via the DELAY pin resistor (40–120ns), enabling optimization of conduction overlap and dead-time to maximize efficiency across load and line variations.
LT1952MPGN-1#PBF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 16-SSOP (0.154", 3.90mm Width)
- Packaging:
- Tube
- Product Status:
- Active
- Output Type:
- Transistor Driver
- Function:
- Step-Up/Step-Down
- Output Configuration:
- Positive, Isolation Capable
- Topology:
- Forward Converter
- Number of Outputs:
- 1
- Output Phases:
- 1
- Voltage - Supply (Vcc/Vdd):
- 6.82V ~ 25V
- Frequency - Switching:
- 100kHz ~ 500kHz
- Duty Cycle (Max):
- 90%
- Synchronous Rectifier:
- Yes
- Clock Sync:
- Yes
- Serial Interfaces:
- -
- Control Features:
- Enable, Frequency Control
- Operating Temperature:
- -55°C ~ 125°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 16-SSOP
LT1952MPGN-1#PBF FAQ
1.How can I place an order for LT1952MPGN-1#PBF through Aetrix?
Please submit a Request for Quotation (RFQ) for LT1952MPGN-1#PBF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LT1952MPGN-1#PBF reliable?
The price and inventory of LT1952MPGN-1#PBF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LT1952MPGN-1#PBF is usually 5 days.
3.What payment methods are accepted for LT1952MPGN-1#PBF?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LT1952MPGN-1#PBF transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LT1952MPGN-1#PBF?
LT1952MPGN-1#PBF orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LT1952MPGN-1#PBF order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LT1952MPGN-1#PBF?
For technical support, including LT1952MPGN-1#PBF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LT1952MPGN-1#PBF requirements.
6.How does Aetrix verify that LT1952MPGN-1#PBF is sourced from the original manufacturer or authorized distributors?
All LT1952MPGN-1#PBF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LT1952MPGN-1#PBF meets industry standards.
7.What is the process for return or replacement of LT1952MPGN-1#PBF?
All LT1952MPGN-1#PBF units undergo pre-shipment inspection (PSI). If there is an issue with LT1952MPGN-1#PBF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LT1952MPGN-1#PBF part is unused and in its original packaging.
Return procedure for LT1952MPGN-1#PBF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
LT1952MPGN-1#PBF Tags
-
UCC28C45DR
Texas Instruments
-
UCC28C40DR
Texas Instruments
-
UCC28C43DR
Texas Instruments
-
ZXSC410E6TA
Diodes Incorporated
-
LM3524DMX/NOPB
Texas Instruments
-
LM3489MMX/NOPB
Texas Instruments
-
MIC2102YML-TR
Microchip Technology
-
LM5148RGYR
Texas Instruments
-
TL598CDR
Texas Instruments
-
LM5155DSSR
Texas Instruments
-
LM25085MYX/NOPB
Texas Instruments
-
UCC2813DTR-0
Texas Instruments
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…
