Analog Devices Inc. LT1993IUD-2#PBF
- Part No.:
- LT1993IUD-2#PBF
- Manufacturer:
- Analog Devices Inc.
- Category:
- Instrumentation, Op Amps, Buffer Amps
- Package:
- 16-WFQFN Exposed Pad
- Datasheet:
-
LT1993IUD-2#PBF.pdf
- Description:
- IC OPAMP DIFF 2 CIRCUIT 16QFN
- Quantity:
- Payment:

- Shipping:

Inventory:4,328
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Product details
Overview
LT1993IUD-2#PBF from Analog Devices (formerly Linear Technology) is a fixed-gain 2V/V differential amplifier and ADC driver optimized for high-speed data acquisition from DC to 800MHz. It delivers –70dBc HD3 at 70MHz, 3.8nV/√Hz input noise, 175MHz integrated low-pass filtered outputs, adjustable VOCM control, and operates on 5V supply drawing 100mA. It is used in IF sampling receivers and WCDMA baseband chains driving 14-bit ADCs like LTC2255.
For engineers reviewing the LT1993IUD-2#PBF datasheet, LT1993IUD-2#PBF pinout, LT1993IUD-2#PBF application, or LT1993IUD-2#PBF equivalent, key selection criteria include its 800MHz –3dB bandwidth, dual-output architecture (unfiltered +OUT/–OUT and filtered +OUTFILTERED/–OUTFILTERED), VOCM-adjustable common-mode output, 200Ω differential input impedance, and guaranteed operation from –40°C to 85°C in the 3×3 QFN package.
Technical Context
The LT1993IUD-2#PBF employs a closed-loop topology with three internal amplifiers: two matched gain stages (A and B) drive differential outputs, while a third (C) controls output common-mode voltage via the VOCM pin. Its fixed 2V/V gain is set by internal 200Ω feedback resistors and remains stable across load variations.
It integrates a passive RC filter (25Ω series + 12pF shunt per output) on the filtered pins, yielding a 175MHz –3dB low-pass response. The VOCM pin supports 1.1V to 3.6V adjustment range with 0.9V/V common-mode gain, enabling direct interface to ADC inputs without transformers or AC-coupling capacitors.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Gain | Fixed 2V/V (6dB); independent of load, simplifies gain staging in ADC front-ends. |
| –3dB Bandwidth | 800MHz on unfiltered outputs; enables baseband-to-IF signal conditioning up to UHF. |
| Input Noise Density | 3.8nV/√Hz at 70MHz; preserves SNR when driving 14-bit ADCs at high input frequencies. |
| OIP3 | 38dBm at 70MHz; supports high dynamic range in multi-tone communication signals. |
| Output Common Mode Range | 1.1V to 3.6V via VOCM pin; matches typical ADC input common-mode requirements without level-shifting circuitry. |
| Supply Current | 100mA at 5V; enables high slew rate (1100V/µs) and fast settling (4ns to 1%) while maintaining thermal manageability in compact layouts. |
| Operating Temperature | –40°C to 85°C; qualified for industrial and communications infrastructure environments. |
Pinout & Package
The LT1993IUD-2#PBF is housed in a 16-lead 3mm × 3mm plastic QFN package with exposed thermal pad (Pin 17) that must be soldered to VEEC (Pin 12). Package height is 0.75mm, suitable for space-constrained RF and data acquisition modules.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| +INA / +INB (Pins 15, 16) | Positive differential input pair | Internally tied; accepts DC- or AC-coupled single-ended or differential signals; self-biases to VOCM voltage when AC-coupled. |
| –INA / –INB (Pins 14, 13) | Negative differential input pair | Internally tied; complements +INA/+INB for full differential operation; same biasing behavior. |
| +OUT / –OUT (Pins 5, 8) | High-bandwidth unfiltered outputs | DC-coupled, low-impedance (0.3Ω), support 800MHz bandwidth; output common mode set by VOCM. |
| +OUTFILTERED / –OUTFILTERED (Pins 6, 7) | Integrated 175MHz low-pass filtered outputs | Each includes 25Ω series resistor and 12pF shunt to VEE; reduces external filtering needs for anti-aliasing before ADCs. |
| VOCM (Pin 2) | Output common-mode voltage control | High-impedance input (0.8–3MΩ); sets average DC level of +OUT/–OUT and +OUTFILTERED/–OUTFILTERED outputs. |
| ENABLE (Pin 11) | Power-down control | TTL-compatible; pulls supply current from 100mA to 250µA when driven high, enabling power gating in burst-mode systems. |
| VCCA/VCCB/VCCC (Pins 3, 10, 1) | Positive supply rails | All must be tied to same 4–5.5V rail; each requires local 1000pF + 0.1µF bypassing for RF stability. |
| VEEA/VEEB/VEEC (Pins 4, 9, 12) | Negative supply rails | All must be tied to same ground or negative rail; exposed pad (Pin 17) connects to VEEC for thermal and electrical integrity. |
Key Features
| Feature | Design Value |
|---|---|
| Dual-output architecture | Simultaneous access to full-bandwidth (+OUT/–OUT) and anti-aliased (+OUTFILTERED/–OUTFILTERED) outputs eliminates need for external filter redesign. |
| VOCM-controlled common-mode | Enables direct coupling to ADC inputs across diverse supply domains (e.g., 1.8V, 2.5V, 3.3V) without level shifters or transformers. |
| 200Ω differential input impedance | Matches standard RF sources and simplifies termination-no external resistors needed for 50Ω differential drive. |
| DC-coupled operation | Supports baseband applications down to 0Hz (e.g., instrumentation, DC-coupled oscilloscope front-ends) without AC-coupling capacitor drift or size penalties. |
| Low distortion at high frequency | –70dBc HD3 at 70MHz ensures clean spectral purity in wideband communication receivers and spectrum analyzers. |
Applications
| IF Sampling Receiver | WCDMA Baseband Chain |
|---|---|
Use Scenario: Downconverting 70MHz IF signals in cellular basestation receivers prior to digitization. IC Role / Device Role / Timing Role: Differential ADC driver conditioning analog IF output from mixer for LTC2255 14-bit ADC sampling at 92.16Msps. Use Value: Integrated 175MHz filtering reduces external anti-aliasing components; VOCM control aligns output swing to ADC input range without AC coupling. | Use Scenario: Processing four-tone WCDMA waveforms in 4-channel receive paths for multi-carrier baseband processing. IC Role / Device Role / Timing Role: High-linearity gain block driving parallel ADCs with minimal intermodulation distortion across adjacent channels. Use Value: 38dBm OIP3 at 70MHz maintains EVM compliance; 800MHz bandwidth accommodates wide channel spacing and guard bands. |
| High-Speed Data Acquisition | SAW Filter Buffering |
Use Scenario: Digitizing DC–100MHz sensor outputs (e.g., ultrasound, radar echo) in test equipment and medical imaging systems. IC Role / Device Role / Timing Role: Low-noise, low-distortion front-end amplifier providing precise gain and common-mode control before 12-/14-bit ADCs. Use Value: 3.8nV/√Hz input noise preserves small-signal resolution; DC coupling enables true zero-Hz response for static measurements. | Use Scenario: Isolating and driving SAW bandpass filters in GPS/GNSS front-ends where impedance matching and phase linearity are critical. IC Role / Device Role / Timing Role: Impedance-matched buffer between filter and ADC, minimizing passband ripple and group delay variation. Use Value: 200Ω differential input impedance matches typical SAW filter Z0; low output impedance prevents filter loading and maintains shape factor. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar differential ADC driver applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| ADA4940-2ARUZ | Lower noise (2.9nV/√Hz), lower power (38mA), but narrower bandwidth (560MHz –3dB) and no integrated filtering. | Better suited for battery-powered portable instruments; lacks built-in 175MHz filter, requiring external components for anti-aliasing. | Select when ultra-low power and noise dominate over bandwidth and integration. |
| THS4561IRGET | Higher bandwidth (3.2GHz), higher OIP3 (42dBm at 100MHz), but no VOCM pin or filtered outputs; requires external common-mode setting. | Ideal for mmWave and high-IF sampling (>500MHz), but adds design complexity for ADC interfacing and filtering. | Select when maximum bandwidth and linearity are required, and board area allows external support circuitry. |
Compared with ADA4940-2ARUZ and THS4561IRGET, the LT1993IUD-2#PBF uniquely combines 800MHz bandwidth, integrated 175MHz filtering, and VOCM control in a single 3×3 QFN-reducing BOM count and layout risk in space-constrained, high-performance ADC interfaces.
Availability
LT1993IUD-2#PBF is available at Aetrix Electronics and suitable for high-speed data acquisition, IF sampling receivers, and WCDMA baseband chains requiring stable component supply across industrial temperature ranges.
Supply support for LT1993IUD-2#PBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices, Inc. (ADI) is a global leader in high-performance analog, mixed-signal, and digital signal processing technologies, serving precision instrumentation, communications, and industrial markets.
The LT1993IUD-2#PBF belongs to ADI's legacy Linear Technology high-speed amplifier portfolio, engineered specifically for demanding ADC driver applications requiring wide bandwidth, low distortion, and seamless DC-to-IF signal chain integration.
FAQ
What is the operating temperature range for the LT1993IUD-2#PBF?
The LT1993IUD-2#PBF is specified for continuous operation from –40°C to +85°C. This industrial-grade temperature range is guaranteed for all electrical parameters in the datasheet, making it suitable for base station radios, test equipment, and embedded data acquisition systems deployed in harsh environments.
Does the LT1993IUD-2#PBF require external gain-setting resistors?
No, the LT1993IUD-2#PBF has a fixed 2V/V (6dB) gain set by internal 200Ω feedback resistors. No external resistors are needed for gain configuration, reducing component count and layout sensitivity while ensuring consistent performance across units and temperatures.
How does the ENABLE pin function on the LT1993IUD-2#PBF?
The ENABLE pin (Pin 11) is a TTL-compatible logic input referenced to VEEC. When pulled low (<0.8V), the LT1993IUD-2#PBF operates normally with 100mA supply current. When driven high (>2V), it enters low-power shutdown mode, drawing only 250µA-ideal for power-gated receiver chains in time-division systems.
Can the LT1993IUD-2#PBF drive ADCs with different input common-mode voltages?
Yes. The VOCM pin (Pin 2) allows precise setting of the output common-mode voltage from 1.1V to 3.6V. This lets the LT1993IUD-2#PBF directly interface with ADCs requiring 1.8V, 2.5V, or 3.3V common-mode inputs-eliminating level shifters, transformers, or AC-coupling capacitors in the signal path.
What is the purpose of the +OUTFILTERED and –OUTFILTERED pins on the LT1993IUD-2#PBF?
The +OUTFILTERED and –OUTFILTERED pins provide built-in 175MHz –3dB low-pass filtering via internal 25Ω series resistors and 12pF shunt capacitors. They reduce external anti-aliasing filter complexity when driving high-speed ADCs, especially in IF sampling applications where out-of-band noise must be suppressed before digitization.
LT1993IUD-2#PBF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 16-WFQFN Exposed Pad
- Packaging:
- Tube
- Product Status:
- Active
- Amplifier Type:
- -
- Number of Circuits:
- -
- Output Type:
- -
- Slew Rate:
- -
- Gain Bandwidth Product:
- -
- -3db Bandwidth:
- -
- Current - Input Bias:
- -
- Voltage - Input Offset:
- -
- Current - Supply:
- -
- Current - Output / Channel:
- -
- Voltage - Supply Span (Min):
- -
- Voltage - Supply Span (Max):
- -
- Operating Temperature:
- -
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 16-QFN (3x3)
LT1993IUD-2#PBF FAQ
1.How can I place an order for LT1993IUD-2#PBF through Aetrix?
Please submit a Request for Quotation (RFQ) for LT1993IUD-2#PBF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LT1993IUD-2#PBF reliable?
The price and inventory of LT1993IUD-2#PBF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LT1993IUD-2#PBF is usually 5 days.
3.What payment methods are accepted for LT1993IUD-2#PBF?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LT1993IUD-2#PBF transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LT1993IUD-2#PBF?
LT1993IUD-2#PBF orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LT1993IUD-2#PBF order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LT1993IUD-2#PBF?
For technical support, including LT1993IUD-2#PBF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LT1993IUD-2#PBF requirements.
6.How does Aetrix verify that LT1993IUD-2#PBF is sourced from the original manufacturer or authorized distributors?
All LT1993IUD-2#PBF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LT1993IUD-2#PBF meets industry standards.
7.What is the process for return or replacement of LT1993IUD-2#PBF?
All LT1993IUD-2#PBF units undergo pre-shipment inspection (PSI). If there is an issue with LT1993IUD-2#PBF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LT1993IUD-2#PBF part is unused and in its original packaging.
Return procedure for LT1993IUD-2#PBF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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