Analog Devices Inc. LT1997IDF-3#PBF
- Part No.:
- LT1997IDF-3#PBF
- Manufacturer:
- Analog Devices Inc.
- Category:
- Instrumentation, Op Amps, Buffer Amps
- Package:
- 14-WFDFN Exposed Pad, 12 Leads
- Datasheet:
-
LT1997IDF-3#PBF.pdf
- Description:
- IC OPAMP GP 1 CIRCUIT 14DFN
- Quantity:
- Payment:

- Shipping:

Inventory:122
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Product details
Overview
LT1997IDF-3#PBF from Analog Devices is a precision, wide-voltage-range, gain-selectable difference amplifier IC with integrated matched resistor network. It delivers ±0.006% (60 ppm) gain accuracy at G = 1, 91 dB minimum DC CMRR, ±160 V common-mode input range, and rail-to-rail output swing - enabling high-side current sensing in industrial power supplies and motor drives.
For engineers reviewing the LT1997IDF-3#PBF datasheet, LT1997IDF-3#PBF pinout, LT1997IDF-3#PBF application, or LT1997IDF-3#PBF equivalent, this page provides verified package mapping (DFN-14), confirmed pin functions for difference/inverting/noninverting configurations, thermal and supply voltage derating guidance, and real-world performance data including CMRR vs temperature and gain nonlinearity ≤2 ppm.
Technical Context
The LT1997IDF-3#PBF integrates a precision op amp with laser-trimmed thin-film resistors (22.5 kΩ, 7.5 kΩ, 2.5 kΩ) to enable three fixed gains (1, 3, 9) without external components. Its internal topology supports difference, inverting, and noninverting configurations via pin-strapping of +INA/–INA, +INB/–INB, or +INC/–INC inputs.
It operates across 3.3 V to 50 V total supply, maintains <1 ppm/°C gain drift, and sustains >81 dB CMRR even at ±160 V common-mode voltage (DFN package, TA = –40°C to 85°C). The exposed pad (Pin 15) is electrically connected to V– and must be soldered for thermal and electrical integrity.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Gain Accuracy (G = 1) | ±0.006% max - enables sub-100 µV offset error in 10 V full-scale current-sense outputs |
| CMRR (DC, G = 1) | ≥91 dB - rejects >99.99% of common-mode noise in high-side shunt monitoring |
| Input Voltage Range | ±160 V on +INA/–INA - supports direct connection to 300 VDC bus rails without level-shifting |
| Supply Range | 3.3 V to 50 V - interoperates with 5 V logic, ±15 V analog, and 24/48 V industrial systems |
| Output Swing | Within 15 mV of rails (no load) - preserves dynamic range in low-voltage ADC interfaces |
| Quiescent Current | 330 µA typical - allows always-on monitoring in battery-backed or energy-constrained systems |
| Gain Nonlinearity | ≤2 ppm - ensures monotonicity and linearity compliance for Class 0.1 energy metering |
Pinout & Package
LT1997IDF-3#PBF uses a 14-lead (4 mm × 4 mm) plastic DFN package with exposed thermal pad (Pin 15 = V–). Pin numbering follows top-view orientation per JEDEC MO-229.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| +INA (Pin 1) | Noninverting Gain-1 Input | Connects internally to 22.5 kΩ resistor; configures difference amplifier with ±160 V CMR |
| +INB (Pin 3) | Noninverting Gain-3 Input | Connects to 7.5 kΩ resistor; enables higher gain for low-level signals with reduced bandwidth |
| +INC (Pin 5) | Noninverting Gain-9 Input | Connects to 2.5 kΩ resistor; optimizes sensitivity for microvolt-level differential inputs |
| –INA (Pin 14) | Inverting Gain-1 Input | Matches +INA path; critical for CMRR >91 dB in shunt-based current sensing |
| –INB (Pin 12) | Inverting Gain-3 Input | Matches +INB; maintains resistor ratio tolerance for accurate G = 3 scaling |
| –INC (Pin 10) | Inverting Gain-9 Input | Matches +INC; ensures <0.03% gain error at G = 9 per datasheet Table 1 |
| REF (Pin 7) | Reference Input | Sets output zero point; accepts DC bias or filtered feedback for level translation |
| SHDN (Pin 6) | Shutdown Control | Active-high logic: ≥(V+ – 1.2 V) = active; ≤(V+ – 2.5 V) = 20 µA shutdown mode |
| V+ (Pin 11) | Positive Supply | Accepts up to +50 V; requires local 100 nF ceramic bypass near pin |
| V– (Pin 15, Exposed Pad) | Negative Supply / Thermal Path | Must be soldered to PCB ground plane for θJA = 45°C/W and ESD/safety compliance |
| OUT (Pin 8) | Analog Output | Drives 10 kΩ loads; stable with ≤1000 pF capacitive load per Figure 26–29 |
Key Features
| Feature | Design Value |
|---|---|
| Pin-configurable gain (1/3/9) | Eliminates external resistors and layout-dependent matching errors in production PCBs |
| ±160 V common-mode input range | Enables direct high-side current sensing on 300 VDC buses without isolated amplifiers or transformers |
| 0.006% max gain error (G = 1) | Reduces calibration burden in factory test; supports single-point trim for 0.1% system accuracy |
| Rail-to-rail output with 15 mV headroom | Maximizes utilization of 12-bit/16-bit ADC input range when interfacing to microcontrollers |
| 1 ppm/°C max gain drift | Maintains measurement stability across –40°C to +85°C ambient without software compensation |
| 20 µA shutdown current | Extends battery life in portable diagnostic tools or wake-on-event sensor nodes |
Applications
| High-Side Current Sensing | Bidirectional Wide Common-Mode Current Sensing |
|---|---|
Use Scenario: Monitoring phase current in a 400 VDC industrial motor drive using a 1 mΩ shunt resistor placed between bus+ and inverter leg. IC Role / Device Role / Timing Role: Difference amplifier configured at G = 1, rejecting 400 V common-mode while amplifying ±40 mV differential shunt voltage. Use Value: Achieves 91 dB CMRR to suppress PWM switching noise; output swings rail-to-rail into 12-bit SAR ADC with <0.01% gain error over temperature. | Use Scenario: Measuring bidirectional battery current in an EV charging station with ±200 A range and ±400 V bus potential. IC Role / Device Role / Timing Role: G = 1 difference amplifier with REF biased to mid-supply, delivering bipolar output proportional to current direction and magnitude. Use Value: ±160 V input range accommodates full bus swing; 2 ppm nonlinearity ensures SOC calculation accuracy within ±0.3% over full scale. |
| High-Voltage to Low-Voltage Level Translation | Industrial Data-Acquisition Front-Ends |
Use Scenario: Converting a ±150 V sensor signal from a piezoelectric pressure transducer to a 0–5 V range compatible with MCU ADC. IC Role / Device Role / Timing Role: Noninverting amplifier (G = 3) with REF = 2.5 V, translating high-voltage analog domain to low-voltage digital domain. Use Value: Integrated 7.5 kΩ/22.5 kΩ ratio eliminates external resistor mismatch; 60 µV offset ensures <1 LSB error at 12-bit resolution. | Use Scenario: Signal conditioning front-end for a modular PLC analog input module accepting ±10 V, 4–20 mA, and thermocouple inputs. IC Role / Device Role / Timing Role: Reconfigurable gain block supporting multiple input types via pin-strapped gain selection and REF adjustment. Use Value: Single-component solution reduces BOM count and layout area; guaranteed specs over –40°C to +85°C meet industrial environmental requirements. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar difference amplifier applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AD8479ARZ | Fixed G = 1 only; ±600 V CMR; higher 200 µV offset; 200 kHz BW | Targeted at ultra-high-CMR (>100 dB) medical/defibrillator isolation replacement | Select for >±300 V CMR needs; avoid if G = 3/9 flexibility or <100 kHz BW required |
| INA240A1D | Current-sense specific; G = 20/50/100/200; 80 V common-mode; 120 kHz BW | Optimized for low-side/high-side current sensing below 80 V; includes integrated reference | Select for cost-sensitive, high-volume motor control; avoid for >80 V or precision difference-amplifier use cases |
Compared with AD8479ARZ and INA240A1D, the LT1997IDF-3#PBF uniquely balances ±160 V CMR, multi-gain configurability, and 0.006% gain accuracy - making it optimal for industrial power monitoring where both voltage range and precision are simultaneously constrained.
Availability
LT1997IDF-3#PBF is available at Aetrix Electronics and suitable for industrial motor drives, battery management systems, and programmable logic controller (PLC) analog input modules requiring stable component supply across extended temperature and voltage ranges.
Supply support for LT1997IDF-3#PBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, serving industrial, automotive, communications, and healthcare markets.
The LT1997-3 product line was designed to simplify precision high-voltage signal conditioning by integrating laser-trimmed resistors and a low-drift op amp - targeting applications where board space, calibration complexity, and common-mode rejection are critical constraints.
FAQ
What is the maximum common-mode voltage supported by the LT1997IDF-3#PBF?
The LT1997IDF-3#PBF supports ±160 V on the +INA and –INA pins, enabling direct connection to 300 VDC bus rails. This rating applies specifically to the DFN-14 package (LT1997IDF-3#PBF) at –40°C to +85°C. Operation beyond ±160 V violates absolute maximum ratings and risks permanent damage.
Can the LT1997IDF-3#PBF be used as a standard op amp with external feedback?
No - the LT1997IDF-3#PBF is not configurable as a general-purpose op amp. Its internal resistors are permanently connected to designated input pins (+INA/–INA, etc.), and the op amp's inverting/noninverting inputs are inaccessible. It functions exclusively as a gain-selectable difference/inverting/noninverting amplifier per its pin-strapped configuration.
How does the exposed thermal pad (Pin 15) function in the LT1997IDF-3#PBF?
In the LT1997IDF-3#PBF, the exposed pad (Pin 15) is electrically connected to V– and serves as the primary thermal conduction path. It must be soldered to a PCB copper pour tied to the system ground plane to achieve the specified θJA = 45°C/W and ensure reliable operation at full 50 V supply and 350 µA quiescent current.
What is the gain error drift specification for the LT1997IDF-3#PBF over temperature?
The LT1997IDF-3#PBF guarantees ±1 ppm/°C maximum gain error drift over –40°C to +85°C. This value is measured under G = 1 conditions with VOUT = ±10 V and reflects the combined effect of resistor TC and op amp drift - critical for maintaining accuracy in uncalibrated industrial sensors.
Does the LT1997IDF-3#PBF require external capacitors for stability?
The LT1997IDF-3#PBF is unity-gain stable and does not require external compensation. However, capacitive loads >560 pF may induce peaking or ringing; Figure 26–29 in the datasheet confirms stability with ≤1000 pF at G = 1, 3, and 9. A 100 nF ceramic capacitor is mandatory between V+ and V– near the package for supply decoupling.
LT1997IDF-3#PBF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 14-WFDFN Exposed Pad, 12 Leads
- Packaging:
- Tube
- Product Status:
- Active
- Amplifier Type:
- General Purpose
- Number of Circuits:
- 1
- Output Type:
- Rail-to-Rail
- Slew Rate:
- 0.75V/µs
- Gain Bandwidth Product:
- -
- -3db Bandwidth:
- 1.1 MHz
- Current - Input Bias:
- -
- Voltage - Input Offset:
- -
- Current - Supply:
- 350µA
- Current - Output / Channel:
- -
- Voltage - Supply Span (Min):
- 3 V
- Voltage - Supply Span (Max):
- 50 V
- Operating Temperature:
- -40°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 14-DFN (4x4)
LT1997IDF-3#PBF FAQ
1.How can I place an order for LT1997IDF-3#PBF through Aetrix?
Please submit a Request for Quotation (RFQ) for LT1997IDF-3#PBF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LT1997IDF-3#PBF reliable?
The price and inventory of LT1997IDF-3#PBF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LT1997IDF-3#PBF is usually 5 days.
3.What payment methods are accepted for LT1997IDF-3#PBF?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LT1997IDF-3#PBF transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LT1997IDF-3#PBF?
LT1997IDF-3#PBF orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LT1997IDF-3#PBF order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LT1997IDF-3#PBF?
For technical support, including LT1997IDF-3#PBF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LT1997IDF-3#PBF requirements.
6.How does Aetrix verify that LT1997IDF-3#PBF is sourced from the original manufacturer or authorized distributors?
All LT1997IDF-3#PBF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LT1997IDF-3#PBF meets industry standards.
7.What is the process for return or replacement of LT1997IDF-3#PBF?
All LT1997IDF-3#PBF units undergo pre-shipment inspection (PSI). If there is an issue with LT1997IDF-3#PBF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LT1997IDF-3#PBF part is unused and in its original packaging.
Return procedure for LT1997IDF-3#PBF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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