Analog Devices Inc. LT3094MPDD#TRPBF
- Part No.:
- LT3094MPDD#TRPBF
- Manufacturer:
- Analog Devices Inc.
- Package:
- 12-WFDFN Exposed Pad
- Datasheet:
-
LT3094MPDD#TRPBF.pdf
- Description:
- IC REG LIN NEG ADJ 500MA 12DFN
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
LT3094MPDD#TRPBF from Analog Devices is an ultralow-noise, ultrahigh-PSRR negative linear regulator delivering 500mA output current with 235mV typical dropout voltage, 0.8µVRMS integrated output noise (10Hz–100kHz), and 74dB PSRR at 1MHz. It operates across –1.8V to –20V input and 0V to –19.5V output ranges, supporting precision analog power in RF transceivers and high-speed data converters.
For engineers reviewing the LT3094MPDD#TRPBF datasheet, LT3094MPDD#TRPBF pinout, LT3094MPDD#TRPBF application, or LT3094MPDD#TRPBF equivalent, key selection criteria include its bipolar enable/UVLO pin, programmable current limit via ILIM resistor, VIOC-controlled upstream supply tracking, and guaranteed –55°C to +150°C operation in the 12-lead 3mm × 3mm DFN package.
Technical Context
The LT3094MPDD#TRPBF uses a unity-gain error amplifier architecture that maintains constant noise, PSRR, bandwidth, and load regulation regardless of programmed output voltage. Its SET pin draws a precise 100µA reference current (±1% initial accuracy) to set output voltage via a single external resistor.
It incorporates a dedicated VIOC pin that drives an upstream regulator to maintain constant VIN–VOUT differential, minimizing power dissipation and optimizing PSRR. The device also features fast start-up capability enabled by elevated SET pin current during turn-on and programmable power good indication referenced to the PGFB pin.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Output Current | 500mA maximum continuous output ensures sufficient headroom for precision ADC/DAC bias rails and RF LNA stages. |
| Dropout Voltage | 235mV typical at 500mA enables efficient regulation even with tight input-output differentials in multi-rail systems. |
| Output Noise | 0.8µVRMS (10Hz–100kHz) supports ultra-low-noise applications such as medical imaging front-ends and seismic sensors. |
| PSRR | 74dB at 1MHz suppresses switching ripple from upstream DC/DC converters, critical for post-regulation in mixed-signal SoCs. |
| Input Voltage Range | –1.8V to –20V allows compatibility with standard negative supply rails and industrial –15V/-12V infrastructure. |
| Operating Temp | –55°C to +150°C (MP grade) qualifies for aerospace, downhole, and military embedded systems requiring extended thermal robustness. |
| Package | 12-lead 3mm × 3mm DFN with exposed IN pad provides low thermal resistance (θJC = 5.5°C/W) for high-power-density layouts. |
Pinout & Package
The LT3094MPDD#TRPBF is housed in a thermally enhanced 12-lead (3mm × 3mm) plastic DFN package with exposed IN pad (Pin 13) that must be soldered to PCB for thermal and electrical integrity. Pin count and layout match the LT3094 family's standardized footprint.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| IN (Pins 1,2,13) | Input supply connection | Exposed pad (Pin 13) is electrically tied to IN and serves as primary thermal path; requires solid copper pour for thermal management. |
| OUT (Pins 3,4) | Regulated negative output | Dual OUT pins reduce trace inductance and improve high-frequency PSRR; both must be connected to output capacitor. |
| OUTS (Pin 5) | Sense node for output voltage | Direct tie to OUT per datasheet Note 9; used internally for feedback-no external connection required. |
| GND (Pin 6) | Ground reference | Low-impedance return for internal circuitry; separate from power ground to minimize noise coupling into error amplifier. |
| SET (Pin 7) | Reference current input | 100µA sink sets output voltage (VOUT = –RSET × 100µA); bypass capacitor here reduces output noise spectral density. |
| VIOC (Pin 8) | Upstream regulator control | Drives external NPN/PNP or NMOS/PMOS pass element to maintain fixed VIN–VOUT differential for optimal PSRR and thermal performance. |
| EN/UV (Pin 9) | Bipolar enable & UVLO | Turns device on when voltage exceeds ±1.26V relative to IN; hysteresis prevents chatter near threshold during brownout conditions. |
| PG (Pin 10) | Power good open-drain output | Asserts low when output is within ±2.5% regulation; requires external pull-up for system sequencing or fault monitoring. |
| PGFB (Pin 11) | Power good feedback | Internal comparator references –300mV; external resistor divider programs precise PG trip point for custom output tolerance windows. |
| ILIM (Pin 12) | Programmable current limit | Sinks current proportional to RILIM value; sets foldback-limited current limit independent of internal backup limit (550mA min). |
Key Features
| Feature | Design Value |
|---|---|
| Ultralow RMS noise | 0.8µVRMS (10Hz–100kHz) enables direct powering of 24-bit delta-sigma ADCs without additional filtering. |
| Ultrahigh PSRR | 74dB at 1MHz ensures >180× attenuation of 1MHz switching noise from buck converters feeding the LT3094MPDD#TRPBF input. |
| Unity-gain error amp | Delivers flat noise/PSRR vs. output voltage-eliminates re-characterization when scaling output from –1.8V to –19.5V. |
| VIOC tracking function | Maintains constant VIN–VOUT differential to minimize dissipation and maximize PSRR across line/load transients. |
| Fast start-up mode | Elevates SET pin current to 1.8mA during turn-on, reducing start-up time to 10ms (90% VOUT) with CSET = 4.7µF. |
| Programmable current limit | Configurable from ~90mA to 560mA using single resistor-supports safe operation with varying downstream capacitance and fault conditions. |
Applications
| RF Power Amplifier Bias | High-Speed Data Converter Supply |
|---|---|
Use Scenario: Providing clean, low-noise bias to GaAs or GaN RF power amplifiers in 5G base station transceivers where phase noise directly impacts EVM. IC Role / Device Role / Timing Role: Negative LDO delivering stable –5V rail with <1nV/√Hz spot noise at 10kHz to suppress AM-to-PM conversion in PA stages. Use Value: Enables >45dB ACLR in 100MHz OFDM signals by reducing supply-induced phase perturbation below –165dBc/Hz. | Use Scenario: Powering the analog supply (AVDD) of 16-bit, 125MSPS pipeline ADCs in radar digitizers requiring sub-LSB noise floor. IC Role / Device Role / Timing Role: Post-regulator for switched-capacitor charge pumps, rejecting 500mVP-P 100kHz ripple with 75dB attenuation. Use Value: Maintains ENOB >15.2 bits by limiting integrated noise contribution to <0.3 LSB RMS across full Nyquist band. |
| Medical Imaging Front-End | Industrial Precision Sensor Excitation |
Use Scenario: Supplying bias to low-noise preamplifiers and photodiode TIA stages in PET/MRI detector modules operating at –15°C to +70°C ambient. IC Role / Device Role / Timing Role: Ultra-stable –3.3V rail with <1µVRMS noise and ±0.01% load regulation over 1mA–500mA range. Use Value: Reduces baseline drift in 20-bit sigma-delta ADCs by >40% versus standard LDOs, improving SNR by 3.2dB in low-count photon detection. | Use Scenario: Generating precise negative excitation voltage for 4-wire RTD bridges and piezoresistive pressure sensors in oil & gas downhole tools. IC Role / Device Role / Timing Role: Programmable –10V output with 0.001%/V line regulation and 0.03mV load regulation for <0.02% total system gain error. Use Value: Eliminates need for trimming resistors in sensor signal chains, reducing calibration time by 65% and BOM count by 3 components per channel. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar negative linear regulator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| LT3015MPDE#TRPBF | Lower max output current (1.5A vs. 500mA), higher dropout (340mV), no VIOC or PGFB pins, wider input range (–3V to –45V). | Targeted at high-current industrial motor drivers rather than ultra-low-noise signal chain rails. | Select when >1A output and extreme input voltage range outweigh noise/PSRR requirements. |
| LT3092IMS8#TRPBF | 2-terminal adjustable current source (0.1–200mA), not a voltage regulator; no PG, VIOC, or EN/UV functionality. | Used for biasing op-amp IBIAS inputs or LED drivers-not for regulated voltage rails. | Choose only for precision current sourcing; not a functional substitute for LT3094MPDD#TRPBF's voltage regulation role. |
Compared with LT3094MPDD#TRPBF, LT3015MPDE#TRPBF trades 30dB lower PSRR and higher noise for 3× output current and extended input range, while LT3092IMS8#TRPBF serves entirely different current-source applications-neither offers drop-in replacement capability for ultralow-noise negative voltage regulation.
Availability
LT3094MPDD#TRPBF is available at Aetrix Electronics and suitable for RF transceiver design, high-speed data acquisition, and medical imaging equipment requiring stable component supply across extended temperature ranges and long production lifecycles.
Supply support for LT3094MPDD#TRPBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices, Inc. (ADI) is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, founded in 1965 and headquartered in Wilmington, MA.
The LT3094MPDD#TRPBF belongs to ADI's Ultralow-Noise Linear Regulator product line, engineered specifically for powering noise-sensitive signal chain components-including high-resolution ADCs, precision DACs, RF synthesizers, and medical sensor front-ends-where sub-microvolt noise and >70dB PSRR are mandatory.
FAQ
What is the guaranteed operating temperature range for the LT3094MPDD#TRPBF?
The LT3094MPDD#TRPBF is specified and 100% tested over –55°C to +150°C junction temperature, making it suitable for aerospace, defense, and downhole industrial applications where extended thermal reliability is required. This MP-grade qualification exceeds commercial and industrial temperature grades offered in other LT3094 variants.
How does the VIOC pin function in the LT3094MPDD#TRPBF?
The VIOC pin in the LT3094MPDD#TRPBF drives an external pass transistor to maintain a constant voltage difference between IN and OUT, minimizing power dissipation and optimizing PSRR. When VOUT ≤ –1.5V, VIOC outputs VIN – VOUT; for higher outputs (0V to –1.5V), it clamps to VIN + 1.5V per datasheet Note 15.
Can the LT3094MPDD#TRPBF be paralleled for higher current or lower noise?
Yes, the LT3094MPDD#TRPBF supports easy paralleling via its precision current-source architecture: connecting SET pins together and using matched RSET resistors ensures balanced current sharing. Paralleling two units cuts output noise by √2 and doubles output current capacity while maintaining regulation accuracy.
What is the minimum output capacitance required for stability with the LT3094MPDD#TRPBF?
The LT3094MPDD#TRPBF is stable with a minimum 10µF ceramic output capacitor, as confirmed in the Absolute Maximum Ratings and Applications Information sections. Using smaller values or non-ceramic types may cause instability or degraded PSRR; X7R or X5R dielectrics are recommended for temperature stability.
Does the LT3094MPDD#TRPBF include built-in protection features?
Yes, the LT3094MPDD#TRPBF integrates internal current limit with foldback protection, thermal shutdown with 8°C hysteresis, and reverse-input protection via internal clamp diodes. These features protect against short-circuit, overtemperature, and miswiring events without requiring external components.
LT3094MPDD#TRPBF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 12-WFDFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Output Configuration:
- Negative
- Output Type:
- Adjustable
- Number of Regulators:
- 1
- Voltage - Input (Max):
- -2.3V
- Voltage - Output (Min/Fixed):
- -19.5V
- Voltage - Output (Max):
- 0V
- Voltage Dropout (Max):
- 0.41V @ 500mA
- Current - Output:
- 500mA
- Current - Quiescent (Iq):
- 2.35 mA
- Current - Supply (Max):
- 23 mA
- PSRR:
- 108dB ~ 28dB (120Hz ~ 10MHz)
- Control Features:
- Enable, Power Good, Soft Start
- Protection Features:
- Over Current, Over Temperature, Short Circuit, Under Voltage Lockout (UVLO)
- Operating Temperature:
- -55°C ~ 150°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 12-DFN (3x3)
LT3094MPDD#TRPBF FAQ
1.How can I place an order for LT3094MPDD#TRPBF through Aetrix?
Please submit a Request for Quotation (RFQ) for LT3094MPDD#TRPBF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LT3094MPDD#TRPBF reliable?
The price and inventory of LT3094MPDD#TRPBF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LT3094MPDD#TRPBF is usually 5 days.
3.What payment methods are accepted for LT3094MPDD#TRPBF?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LT3094MPDD#TRPBF transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LT3094MPDD#TRPBF?
LT3094MPDD#TRPBF orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LT3094MPDD#TRPBF order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LT3094MPDD#TRPBF?
For technical support, including LT3094MPDD#TRPBF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LT3094MPDD#TRPBF requirements.
6.How does Aetrix verify that LT3094MPDD#TRPBF is sourced from the original manufacturer or authorized distributors?
All LT3094MPDD#TRPBF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LT3094MPDD#TRPBF meets industry standards.
7.What is the process for return or replacement of LT3094MPDD#TRPBF?
All LT3094MPDD#TRPBF units undergo pre-shipment inspection (PSI). If there is an issue with LT3094MPDD#TRPBF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LT3094MPDD#TRPBF part is unused and in its original packaging.
Return procedure for LT3094MPDD#TRPBF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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