Analog Devices Inc. LT3095IUDD#TRPBF
- Part No.:
- LT3095IUDD#TRPBF
- Manufacturer:
- Analog Devices Inc.
- Category:
- Voltage Regulators - Linear + Switching
- Package:
- 24-WFQFN Exposed Pad
- Datasheet:
-
LT3095IUDD#TRPBF.pdf
- Description:
- IC REG DL BOOST/LINEAR 24QFN
- Quantity:
- Payment:

- Shipping:

Inventory:2,700
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Product details
Overview
LT3095IUDD#TRPBF from Analog Devices (formerly Linear Technology) is a dual-channel, low-noise bias generator IC integrating two independent boost + LDO stages. Each channel delivers up to 50mA with <100µVP-P output ripple, 4µVRMS noise (10Hz–100kHz), and 72dB PSRR at 1MHz. It operates from 3V–20V input and supports programmable 1V–20V outputs-ideal for powering instrumentation amplifiers and RF front-ends in USB-powered test equipment.
For engineers reviewing the LT3095IUDD#TRPBF datasheet, LT3095IUDD#TRPBF pinout, LT3095IUDD#TRPBF application, or LT3095IUDD#TRPBF equivalent, key selection criteria include dual-channel independent enable control, externally programmable 450kHz–2MHz switching frequency, symmetric QFN pinout for layout simplicity, and guaranteed –40°C to 125°C operation with thermal shutdown and current limiting per channel.
Technical Context
The LT3095IUDD#TRPBF implements a two-stage architecture per channel: a peak-current-mode boost regulator followed by a precision linear regulator. The boost stage dynamically tracks the LDO output, maintaining a fixed ~2V differential (VLDOIN – VOUT) to optimize PSRR, transient response, and power dissipation across output voltage settings.
Each LDO uses a buffered unity-gain amplifier with a trimmed 50µA SET-pin reference current, enabling single-resistor output programming (VOUT = 50µA × RSET). Internal frequency compensation, integrated Schottky diodes, and synchronized switching capability eliminate external loop compensation components and reduce EMI sensitivity.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Input Voltage Range | 3V to 20V - supports wide-range industrial and USB-powered inputs without pre-regulation. |
| Output Current per Channel | 50mA - sufficient for biasing op-amps, ADCs, DACs, and RF ICs without external pass devices. |
| LDO Output Noise | 4µVRMS (10Hz–100kHz) - enables high-resolution analog signal chains where supply noise directly impacts SNR. |
| PSRR at 1MHz | 72dB - suppresses high-frequency switching ripple from the boost stage before it reaches sensitive loads. |
| Switching Frequency Range | 450kHz to 2MHz - allows EMI-sensitive designs to avoid critical bands and optimize inductor size. |
| Operating Temperature | –40°C to 125°C - qualified for industrial and automotive under-hood environments with full parameter guarantee. |
| Enable Threshold | 1.23V typical with 125mV hysteresis - ensures clean, glitch-free channel startup/shutdown in noisy systems. |
Pinout & Package
LT3095IUDD#TRPBF is housed in a thermally enhanced 24-lead 3mm × 5mm plastic QFN (UDD package) with exposed pad (Pin 25) soldered to PCB ground for optimal thermal performance (θJA = 38°C/W).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| GND (Pins 1,5,7,14,16,20,25) | Ground reference and thermal path | Multiple GND pins and exposed pad minimize impedance and improve thermal dissipation; all must connect to system ground plane. |
| BSTOUT1 / BSTOUT2 (Pins 2,19) | Boost regulator output | Supplies regulated ~2V above corresponding LDO output to LDOIN1/LDOIN2; requires local 10µF ceramic capacitor to GND. |
| OUT1 / OUT2 (Pins 8,13) | LDO regulated output | Delivers final low-noise bias voltage; requires ≥2.2µF ceramic capacitor (ESR < 0.1Ω) directly to adjacent GND pin. |
| SET1 / SET2 (Pins 9,12) | Voltage setpoint reference | Sinks precise 50µA current; output voltage programmed as VOUT = 50µA × RSET; minimum 10nF bypass capacitor required for noise reduction. |
| EN1 / EN2 (Pins 10,11) | Independent channel enable | Logic-level control (1.23V threshold) allowing per-channel power sequencing or fault isolation without affecting other channel. |
| RT (Pin 17) | Oscillator frequency programming | Single resistor to GND sets switching frequency from 450kHz to 2MHz; enables EMI tuning and inductor optimization. |
| SYNC (Pin 18) | External clock synchronization | Accepts logic-level clock to align switching edges across multiple LT3095s or with system clocks, reducing beat frequencies. |
Key Features
| Feature | Design Value |
|---|---|
| Dual independent boost+LDO channels | Enables simultaneous generation of two different low-noise bias rails (e.g., +5V and +15V) with separate enable and soft-start control. |
| 2V tracking boost regulation | Maintains optimal LDO headroom automatically-no external feedback or voltage dividers needed for boost output setting. |
| 4µVRMS integrated output noise | Eliminates need for post-LDO filtering in precision analog applications such as instrumentation amplifier biasing. |
| Symmetric 24-pin QFN layout | Reduces PCB routing complexity and improves layout symmetry for matched channel performance and EMI cancellation. |
| Internal Schottky diodes & compensation | Reduces BOM count by 4 diodes and eliminates external compensation networks-simplifies design and improves reliability. |
Applications
| Instrumentation Amplifier Bias Supply | RF Front-End Power |
|---|---|
Use Scenario: Providing ultra-low-noise, stable bias to high-gain, low-drift instrumentation amplifiers in portable data acquisition systems. IC Role / Device Role / Timing Role: Dual-channel bias generator delivering independent +5V and ±15V rails with <100µVP-P ripple and 72dB PSRR at RF frequencies. Use Value: Prevents supply-induced offset drift and gain error; enables >100dB CMRR maintenance over temperature and load variation. | Use Scenario: Powering LNAs, mixers, and VCOs in battery-operated spectrum analyzers and handheld RF test equipment. IC Role / Device Role / Timing Role: Generates clean, adjustable bias voltages (e.g., +3.3V LNA core, +12V mixer drain) from a single 5V USB input. Use Value: Suppresses switching noise coupling into RF signal paths-critical for achieving sub-–160dBc/Hz phase noise floor. |
| USB-Powered Precision ADC Reference | Industrial Sensor Signal Conditioning |
Use Scenario: Supplying reference and analog front-end circuitry for 24-bit delta-sigma ADCs in USB-connected sensor nodes. IC Role / Device Role / Timing Role: Delivers low-noise 5V reference rail and 3.3V analog supply with independent enable for power cycling during idle periods. Use Value: Maintains effective resolution >22 bits by limiting supply-induced quantization noise and thermal drift. | Use Scenario: Biasing bridge sensors, RTDs, and thermocouple amplifiers in factory automation controllers operating in harsh industrial environments. IC Role / Device Role / Timing Role: Provides robust, temperature-stable ±10V excitation and signal conditioning rails with thermal shutdown and current limit per channel. Use Value: Ensures continuous operation across –40°C to 125°C ambient with no calibration drift due to supply variation. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-channel low-noise bias generator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| LTC3589IUF#PBF | Quad-output PMIC with buck/boost/LDO; higher integration but no 2V-tracking boost architecture; 12µVRMS noise. | Targets complex multi-rail SoC power; lacks independent per-channel enable and symmetric layout. | Choose LTC3589IUF#PBF only when needing ≥4 rails and digital I²C control-not for pure low-noise analog biasing. |
| TPS65136RGTR | Dual-channel boost-only (no integrated LDO); 120µVRMS noise; requires external LDOs for low-noise performance. | Designed for display bias (VCOM/VPOS); no LDO stage, so external filtering increases board area and cost. | Choose TPS65136RGTR only if system already includes ultra-low-noise LDOs and needs higher boost current (>1A). |
Compared with LTC3589IUF#PBF and TPS65136RGTR, the LT3095IUDD#TRPBF uniquely combines dual-channel 2V-tracking boost regulation with integrated 50mA low-noise LDOs in a single compact QFN-delivering superior PSRR, lower noise, and simpler layout for analog-intensive applications without requiring external compensation or sequencing logic.
Availability
LT3095IUDD#TRPBF is available at Aetrix Electronics and suitable for instrumentation amplifier biasing, RF front-end power, and USB-powered precision ADC reference applications requiring stable component supply, guaranteed –40°C to 125°C operation, and long-term production continuity.
Supply support for LT3095IUDD#TRPBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices acquired Linear Technology in 2017 and maintains its legacy of high-performance analog ICs for precision signal conditioning and power management.
The LT3095IUDD#TRPBF belongs to Linear's ultra-low-noise bias generator product line, designed specifically for powering noise-sensitive analog circuits-including instrumentation amplifiers, precision ADCs/DACs, and RF components-in space-constrained, thermally demanding environments.
FAQ
What is the guaranteed operating temperature range for the LT3095IUDD#TRPBF?
The LT3095IUDD#TRPBF is specified and guaranteed over –40°C to +125°C junction temperature. This rating applies to both electrical performance and reliability parameters, including PSRR, output noise, and current limit, making it suitable for industrial and extended-temperature applications without derating.
How is the output voltage programmed on the LT3095IUDD#TRPBF?
The LT3095IUDD#TRPBF uses a precision 50µA current source at each SET pin (SET1/SET2). Connecting an external resistor RSET from SETx to GND sets the output voltage as VOUT = 50µA × RSET. For example, a 200kΩ resistor yields 10V output. The SET pin must be bypassed with ≥10nF capacitor for stability and noise reduction.
Does the LT3095IUDD#TRPBF require external compensation components?
No. The LT3095IUDD#TRPBF integrates full frequency compensation for both boost regulators and LDOs. No external compensation capacitors or resistors are needed-only mandatory external components are input/output capacitors, SET resistors, boost inductors, and optional SYNC/RT resistors.
Can the two channels of the LT3095IUDD#TRPBF be synchronized to the same external clock?
Yes. The LT3095IUDD#TRPBF features a single SYNC pin (Pin 18) that synchronizes both internal boost regulators to an external logic-level clock. This eliminates beat frequencies between channels and reduces system-level EMI when multiple LT3095IUDD#TRPBF devices are used.
What is the purpose of the 2V tracking between BSTOUT and OUT in the LT3095IUDD#TRPBF?
The LT3095IUDD#TRPBF's boost regulators automatically regulate BSTOUTx to ~2V above the corresponding OUTx voltage. This ensures optimal LDO headroom across all output settings-maximizing PSRR, minimizing thermal stress on the LDO pass device, and eliminating need for manual boost voltage adjustment during dynamic output reprogramming.
LT3095IUDD#TRPBF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 24-WFQFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Topology:
- Step-Up (Boost) (1), Linear (LDO) (1)
- Number of Outputs:
- 2
- Frequency - Switching:
- 450kHz ~ 2MHz
- Voltage/Current - Output 1:
- Adj, 950mA
- Voltage/Current - Output 2:
- 1V ~ 20V, 50mA
- Voltage/Current - Output 3:
- -
- w/LED Driver:
- No
- w/Supervisor:
- No
- w/Sequencer:
- No
- Voltage - Supply:
- 3V ~ 20V
- Operating Temperature:
- -40°C ~ 125°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 24-QFN (3x5)
LT3095IUDD#TRPBF FAQ
1.How can I place an order for LT3095IUDD#TRPBF through Aetrix?
Please submit a Request for Quotation (RFQ) for LT3095IUDD#TRPBF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LT3095IUDD#TRPBF reliable?
The price and inventory of LT3095IUDD#TRPBF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LT3095IUDD#TRPBF is usually 5 days.
3.What payment methods are accepted for LT3095IUDD#TRPBF?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LT3095IUDD#TRPBF transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LT3095IUDD#TRPBF?
LT3095IUDD#TRPBF orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LT3095IUDD#TRPBF order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LT3095IUDD#TRPBF?
For technical support, including LT3095IUDD#TRPBF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LT3095IUDD#TRPBF requirements.
6.How does Aetrix verify that LT3095IUDD#TRPBF is sourced from the original manufacturer or authorized distributors?
All LT3095IUDD#TRPBF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LT3095IUDD#TRPBF meets industry standards.
7.What is the process for return or replacement of LT3095IUDD#TRPBF?
All LT3095IUDD#TRPBF units undergo pre-shipment inspection (PSI). If there is an issue with LT3095IUDD#TRPBF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LT3095IUDD#TRPBF part is unused and in its original packaging.
Return procedure for LT3095IUDD#TRPBF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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