Analog Devices Inc. LT3380EUJM#PBF
- Part No.:
- LT3380EUJM#PBF
- Manufacturer:
- Analog Devices Inc.
- Category:
- Voltage Regulators - Linear + Switching
- Package:
- 40-WFQFN Exposed Pad
- Datasheet:
-
LT3380EUJM#PBF.pdf
- Description:
- IC REG QD BUCK/LNR 2.25MHZ 40QFN
- Quantity:
- Payment:

- Shipping:

Inventory:3,884
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Product details
Overview
LT3380EUJM#PBF from Analog Devices is a multioutput power management IC integrating four synchronous buck DC/DC converters (2.5A, 2.5A, 1.5A, 1.5A) and three 300mA LDO regulators with I²C programmability, designed for portable application processor systems requiring tightly sequenced, dynamically scalable voltage rails.
For engineers reviewing the LT3380EUJM#PBF datasheet, LT3380EUJM#PBF pinout, LT3380EUJM#PBF application, or LT3380EUJM#PBF equivalent, key selection criteria include I²C-configurable dynamic voltage scaling, autonomous power-down sequencing across four time slots, 12µA standby current, and side-wettable 40-lead 6mm × 6mm QFN packaging for automotive-grade optical inspection.
Technical Context
The LT3380EUJM#PBF implements four independent buck regulators with selectable 2.25MHz/1.125MHz switching frequency, 100% duty cycle capability, and programmable soft-start via feedback reference ramping (0.8V/ms for bucks, 10V/ms for LDOs). Each buck features PMOS/NMOS RDS(ON) of 120mΩ/70mΩ (Buck1/Buck2) or 160mΩ/80mΩ (Buck3/Buck4), supporting high-efficiency operation across 2.7V–5.5V input.
Three LDOs include two adjustable (725mV reference, resistor-programmable) and one fixed 1.8V output, each with 300mA capacity, 210–350mV dropout at full load, and independent enable/control via pin-strapping or I²C registers. Fault reporting includes IRQ and PGOOD open-drain outputs with configurable thresholds and status registers.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Input Voltage Range | 2.7V to 5.5V on VIN; supports core, memory, I/O, and SoC rail generation from single supply |
| Buck Output Currents | 2.5A (Buck1/Buck2), 1.5A (Buck3/Buck4); enables high-current digital domain regulation |
| LDO Output Currents | 300mA per LDO; sufficient for low-noise analog sensor, RF, or interface supplies |
| Standby Current | 12µA typical; minimizes battery drain during system sleep states |
| Switching Frequency | Selectable 2.25MHz or 1.125MHz; allows optimization of inductor size vs. efficiency |
| I²C Interface | Standard-mode (400kHz), DVDD-referenced logic; enables real-time DVS, sequencing, and fault monitoring |
| Operating Temperature | –40°C to +125°C junction; qualified for industrial and extended-temperature embedded applications |
Pinout & Package
The LT3380EUJM#PBF is housed in a 40-lead plastic side-wettable QFN package (6mm × 6mm) with exposed thermal pad (Pin 41 = GND), optimized for automated optical inspection and thermal performance (θJA = 33°C/W).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| FB_B1–FB_B4 | Buck feedback inputs | Set output voltage via resistor divider; 725mV reference enables precise regulation across load/temperature |
| FB_L1, FB_L2 | LDO1/LDO2 feedback inputs | Enable resistor-programmable outputs (e.g., VLDO = (1+R1/R2) × 725mV) |
| LDO1–LDO3 | LDO output terminals | LDO3 fixed at 1.8V; LDO1/LDO2 adjustable; all require ≥1µF ceramic output capacitance |
| EN_B1–EN_B4, EN_L1–EN_L3 | Independent regulator enables | Active-high with internal weak pull-down; supports pin-strapped or I²C-controlled sequencing |
| PWR_ON | Master power-on control | Delays enable activation by 3ms after rising edge; inhibits all regulators when low |
| IRQ, PGOOD | Open-drain status outputs | IRQ signals undervoltage, overtemperature, or power-good faults; PGOOD asserts only when all enabled rails are in regulation |
| SDA, SCL, DVDD | I²C interface pins | DVDD sets logic level (1.6V–5.5V); supports standard-mode communication for register read/write |
Key Features
| Feature | Design Value |
|---|---|
| I²C-programmable dynamic voltage scaling | Adjusts buck output voltages in real time via DAC-controlled feedback reference (412.5mV–800mV range) |
| Four-slot autonomous power-down sequencing | Off-sequencing timing controlled via I²C command registers-no external timing components required |
| Side-wettable QFN package | Enables automated optical inspection of solder joints on production PCBs, improving automotive AEC-Q100 compliance confidence |
| 12µA VIN standby current | Reduces quiescent power loss during system suspend, extending battery life in portable applications |
| Configurable operating modes per buck | Per-regulator selection of pulse-skipping, Burst Mode®, or forced continuous mode optimizes light-load vs. full-load efficiency |
Applications
| Mobile Application Processor Power | Automotive Infotainment System |
|---|---|
Use Scenario: Powering ARM-based application processors (e.g., Qualcomm Snapdragon, NXP i.MX) with multiple voltage domains (core, GPU, DDR, I/O). IC Role / Device Role / Timing Role: Centralized PMIC managing startup sequence, dynamic voltage scaling during CPU frequency transitions, and coordinated shutdown. Use Value: Reduces BOM count by consolidating seven rails into one IC; I²C control enables software-defined power policies without hardware changes. | Use Scenario: Supplying head unit SoCs, display drivers, audio codecs, and CAN transceivers in AEC-Q100-compliant infotainment modules. IC Role / Device Role / Timing Role: Automotive-grade power manager delivering sequenced, monitored, and fault-reporting rails under wide temperature and vibration conditions. Use Value: Side-wettable QFN ensures solder joint reliability; 125°C operation and IRQ/PGOOD support ASIL-B functional safety diagnostics. |
| Industrial Edge AI Gateway | High-Density FPGA Power System |
Use Scenario: Powering heterogeneous compute platforms (CPU + FPGA + AI accelerator) in factory-floor gateways with strict thermal and EMI constraints. IC Role / Device Role / Timing Role: Multi-rail regulator providing independently controllable, low-noise supplies with fast transient response for mixed-signal subsystems. Use Value: 2.25MHz switching enables compact 1µH inductors; LDOs deliver clean analog bias for ADCs and sensors without switching noise coupling. | Use Scenario: Generating core (0.85V), auxiliary (1.2V), I/O (1.8V/3.3V), and configuration (1.8V) rails for Xilinx Zynq or Intel Agilex FPGAs. IC Role / Device Role / Timing Role: Configurable PMIC enabling FPGA configuration voltage sequencing, dynamic core voltage adjustment during partial reconfiguration, and rail-specific fault isolation. Use Value: Four-buck architecture matches FPGA rail count; I²C register access allows runtime voltage tuning aligned with bitstream requirements. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar multi-output PMIC applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPS659122YFFR | 6-buck + 8-LDO architecture; 1.8V fixed LDOs only; no side-wettable QFN; max 125°C operation | Targets TI-based Sitara AMx processors; lacks 150°C option and optical inspection support | Preferred where higher LDO count and TI ecosystem integration outweigh package and temp grade needs |
| MAX20029ATI+T | 4-buck + 3-LDO; AEC-Q100 Grade 0 (–40°C to +150°C); 2.2MHz fixed frequency; no I²C DVS | Designed for automotive ADAS cameras; uses SPI instead of I²C; no dynamic voltage scaling capability | Chosen when SPI interface and Grade 0 temp are mandatory, and DVS is not required |
Compared with TPS659122YFFR and MAX20029ATI+T, the LT3380EUJM#PBF uniquely combines I²C-based dynamic voltage scaling, side-wettable QFN for automotive optical inspection, and a balanced 4-buck/3-LDO topology optimized for portable application processors-making it distinct for systems requiring software-defined power policy execution and production traceability.
Availability
LT3380EUJM#PBF is available at Aetrix Electronics and suitable for mobile application processor power, automotive infotainment systems, industrial edge AI gateways, and high-density FPGA power systems requiring stable component supply and long-term design-in support.
Supply support for LT3380EUJM#PBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, serving precision, industrial, communications, and automotive markets.
The LT3380EUJM#PBF belongs to Analog Devices' Power Management IC product line, engineered specifically for advanced portable and automotive application processor platforms needing integrated, I²C-configurable, multi-rail power solutions with robust thermal and reliability specifications.
FAQ
What is the maximum junction temperature rating for the LT3380EUJM#PBF?
The LT3380EUJM#PBF is rated for –40°C to +125°C operating junction temperature and is part of the LT3380E grade. It is not the H-grade (150°C) variant; the #PBF suffix confirms its industrial temperature qualification. The LT3380EUJM#PBF maintains full electrical specifications across this range, with thermal derating applied above 125°C per Analog Devices' reliability guidelines.
Does the LT3380EUJM#PBF support dynamic voltage scaling (DVS) for all four buck regulators?
Yes, the LT3380EUJM#PBF supports independent dynamic voltage scaling for all four buck regulators via I²C-accessible DAC registers that adjust the internal feedback reference from 412.5mV to 800mV. This enables real-time output voltage changes-critical for CPU/GPU frequency scaling-without external component modification. Each buck's DVS is fully configurable through dedicated command registers (BUCK1[7:0]–BUCK4[7:0]).
How does the LT3380EUJM#PBF handle power-on sequencing without external circuitry?
The LT3380EUJM#PBF implements dual sequencing methods: pin-strapped (via interconnect of EN outputs to upstream EN inputs) and I²C-programmable (using SEQx registers). For off-sequencing, it provides four discrete time slots controlled exclusively via I²C commands-eliminating need for RC timers or dedicated sequencer ICs. The PWR_ON pin adds master-level delay (3ms) before any enable activation.
What is the purpose of the side-wettable flanks on the LT3380EUJM#PBF QFN package?
The side-wettable flanks on the LT3380EUJM#PBF's 40-lead 6mm × 6mm QFN package enable automated optical inspection (AOI) of solder fillets along the vertical edges of the leads. This feature is critical for automotive AEC-Q100 compliance, as it verifies solder joint integrity post-reflow-reducing field failure risk in high-reliability applications where X-ray inspection may be impractical or cost-prohibitive.
Can the LT3380EUJM#PBF's LDO3 output be adjusted, or is it strictly fixed at 1.8V?
LDO3 on the LT3380EUJM#PBF is strictly fixed at 1.8V (±3% over temperature and line/load), with no external feedback or I²C adjustment capability. In contrast, LDO1 and LDO2 are resistor-programmable using the 725mV internal reference (VLDO = (1 + R1/R2) × 725mV). This fixed LDO3 simplifies supply design for standardized interfaces like SDIO or USB PHY analog rails.
LT3380EUJM#PBF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 40-WFQFN Exposed Pad
- Packaging:
- Tube
- Product Status:
- Active
- Topology:
- Step-Down (Buck)
- Number of Outputs:
- 4
- Frequency - Switching:
- 1.12MHz, 2.25MHz
- Voltage/Current - Output 1:
- 0.725V ~ 5.5V, 2.5A
- Voltage/Current - Output 2:
- 0.725V ~ 5.5V, 2.5A
- Voltage/Current - Output 3:
- 1.8V, 1.5A
- w/LED Driver:
- No
- w/Supervisor:
- No
- w/Sequencer:
- No
- Voltage - Supply:
- 2.7V ~ 5.5V
- Operating Temperature:
- -40°C ~ 125°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount, Wettable Flank
- Supplier Device Package:
- 40-QFN (6x6)
LT3380EUJM#PBF FAQ
1.How can I place an order for LT3380EUJM#PBF through Aetrix?
Please submit a Request for Quotation (RFQ) for LT3380EUJM#PBF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LT3380EUJM#PBF reliable?
The price and inventory of LT3380EUJM#PBF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LT3380EUJM#PBF is usually 5 days.
3.What payment methods are accepted for LT3380EUJM#PBF?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LT3380EUJM#PBF transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LT3380EUJM#PBF?
LT3380EUJM#PBF orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LT3380EUJM#PBF order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LT3380EUJM#PBF?
For technical support, including LT3380EUJM#PBF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LT3380EUJM#PBF requirements.
6.How does Aetrix verify that LT3380EUJM#PBF is sourced from the original manufacturer or authorized distributors?
All LT3380EUJM#PBF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LT3380EUJM#PBF meets industry standards.
7.What is the process for return or replacement of LT3380EUJM#PBF?
All LT3380EUJM#PBF units undergo pre-shipment inspection (PSI). If there is an issue with LT3380EUJM#PBF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LT3380EUJM#PBF part is unused and in its original packaging.
Return procedure for LT3380EUJM#PBF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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