Analog Devices Inc. LT3380IUJM#TRPBF
- Part No.:
- LT3380IUJM#TRPBF
- Manufacturer:
- Analog Devices Inc.
- Category:
- Voltage Regulators - Linear + Switching
- Package:
- 40-WFQFN Exposed Pad
- Datasheet:
-
LT3380IUJM#TRPBF.pdf
- Description:
- IC REG QD BUCK/LNR 2.25MHZ 40QFN
- Quantity:
- Payment:

- Shipping:

Inventory:1,872
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Product details
Overview
LT3380IUJM#TRPBF from Analog Devices is a multioutput power management IC integrating four synchronous buck DC/DC converters (2.5A, 2.5A, 1.5A, 1.5A) and three 300mA LDO regulators with I²C programmability, designed for portable application processor systems requiring precise sequencing, dynamic voltage scaling, and fault monitoring in automotive-grade environments.
For engineers reviewing the LT3380IUJM#TRPBF datasheet, LT3380IUJM#TRPBF pinout, LT3380IUJM#TRPBF application, or LT3380IUJM#TRPBF equivalent, key selection criteria include I²C-configurable startup sequencing across four time slots, selectable 1.125 MHz / 2.25 MHz switching frequency, 12 µA standby current, –40°C to 125°C operating junction temperature, and side-wettable 40-lead 6mm × 6mm QFN packaging for optical inspection.
Technical Context
The LT3380IUJM#TRPBF implements independent control logic for four buck regulators-two rated at 2.5A (Buck1/Buck2) with 120 mΩ PMOS and 70 mΩ NMOS on-resistance, and two at 1.5A (Buck3/Buck4) with 160 mΩ PMOS and 80 mΩ NMOS-each supporting 100% duty cycle operation and programmable soft-start via feedback reference ramp (0.8 V/ms).
Its three LDOs include two adjustable (LDO1/LDO2, 725 mV reference, 10 V/ms soft-start) and one fixed 1.8 V output (LDO3), all featuring 625 Ω pull-down when disabled, 300 mA output capability, and precision enable thresholds (0.370–0.430 V). I²C interface (400 kHz, 0111100[R/W] address) enables real-time voltage scaling, status reporting, and autonomous power-down sequencing.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Input Voltage Range | 2.7 V to 5.5 V - supports single-cell Li-ion and wide-input industrial rails without external pre-regulation. |
| Buck Output Currents | 2.5 A (Buck1/Buck2), 1.5 A (Buck3/Buck4) - sufficient for core, memory, I/O, and SoC rails in application processors. |
| LDO Outputs | Three 300 mA LDOs: two adjustable (725 mV reference), one fixed 1.8 V - delivers low-noise analog supplies with <0.05% load regulation. |
| Switching Frequency | Selectable 1.125 MHz or 2.25 MHz - enables compact 1 µH inductor use while balancing EMI and efficiency trade-offs. |
| Standby Current | 12 µA (typ.) - minimizes battery drain during system sleep states in portable and automotive applications. |
| Operating Temperature | –40°C to 125°C junction - qualified per AEC-Q100 for under-hood and infotainment systems. |
| I²C Interface | Standard-mode (400 kHz), DVDD-referenced (1.6 V–5.5 V), fixed 0x78 address - enables host MCU coordination of sequencing and DVS without additional GPIOs. |
Pinout & Package
LT3380IUJM#TRPBF uses a 40-lead plastic side-wettable QFN package (6 mm × 6 mm), with exposed thermal pad (Pin 41) required to be soldered to PCB ground plane for thermal and electrical integrity. Pin count and layout match LT3380UJM family; wettable flanks support automated optical inspection (AOI) of solder joints.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| FB_B1–FB_B4 | Buck feedback inputs | Set output voltage via resistor divider; internal 725 mV reference enables 0.4125 V–0.8125 V range with 12.5 mV LSB step. |
| FB_L1, FB_L2 | LDO1/LDO2 feedback inputs | Enable adjustable outputs using same 725 mV reference; LDO3 is fixed 1.8 V and has no feedback pin. |
| EN_B1–EN_B4, EN_L1–EN_L3 | Independent enable inputs | Active-high with weak internal pull-down; allow pin-strapped sequencing or I²C override. |
| PWR_ON | Master enable/disable input | Assert high ≥3 ms to enable downstream EN pins; low for >1 s forces full shutdown regardless of individual enables. |
| IRQ, PGOOD | Open-drain status outputs | IRQ signals undervoltage, overtemperature, or power-good faults; PGOOD asserts only when all enabled rails meet ±6% tolerance. |
| SDA, SCL, DVDD | I²C interface supply & signals | DVDD sets logic level (1.6 V–5.5 V); SDA/SCL tolerate up to DVDD + 0.3 V; internal pull-ups not provided. |
Key Features
| Feature | Design Value |
|---|---|
| Four-time-slot power-down sequencing | I²C-programmable off-sequence across four discrete timing windows eliminates rail collapse-induced latch-up in complex SoCs. |
| Dynamic voltage scaling (DVS) | Real-time I²C DAC control of buck output voltages enables adaptive performance/power tuning for CPU/GPU cores. |
| Autonomous fault response | Hardware-level IRQ assertion on VIN undervoltage (2.35 V rising threshold) or junction temperature >150°C, independent of I²C host activity. |
| Low-noise LDO architecture | 300 mA LDOs with <280 mV dropout at 300 mA (LDO3 @ 1.8 V) and 0.01%/V line regulation ensure stable analog sensor/ADC supplies. |
| Side-wettable QFN package | 40-lead 6 mm × 6 mm footprint with gull-wing–like flank metallization enables AOI verification of solder joint quality in automotive production. |
Applications
| Automotive Infotainment | Industrial Edge Controller |
|---|---|
|
Use Scenario: Powering quad-core application processor, DDR memory, display interface, and audio codec in head-unit systems. IC Role / Device Role / Timing Role: Central power manager coordinating startup order (SoC core → memory → I/O → analog) and runtime DVS based on thermal load. Use Value: Meets AEC-Q100 Grade I (–40°C to 125°C) requirements and reduces BOM count by replacing six discrete regulators with single-chip solution. |
Use Scenario: Supplying FPGA, Ethernet PHY, isolated RS-485 transceiver, and precision ADC in factory automation gateway. IC Role / Device Role / Timing Role: Provides clean, sequenced rails with IRQ-driven fault logging for predictive maintenance and system-level diagnostics. Use Value: 12 µA standby current extends battery backup duration; LDO3's fixed 1.8 V output powers low-jitter clock buffers without external resistors. |
| 5G Small Cell Baseband | Medical Imaging Module |
|
Use Scenario: Delivering multiple voltage domains (1.2 V core, 1.8 V I/O, 3.3 V RF bias, 1.8 V analog) to baseband SoC and transceiver in compact outdoor unit. IC Role / Device Role / Timing Role: Buck regulators operate at 2.25 MHz to minimize EMI near sensitive RF sections; LDOs isolate noise-sensitive analog chains. Use Value: Selectable switching frequency avoids critical bands; side-wettable QFN ensures reliability under thermal cycling in uncontrolled environments. |
Use Scenario: Powering CMOS image sensor array, column ADCs, and digital signal processor in portable ultrasound probe. IC Role / Device Role / Timing Role: LDO1/LDO2 supply ultra-low-noise analog front-end; buck regulators deliver high-current digital domains with tight transient response. Use Value: 10 V/ms LDO soft-start prevents inrush-induced voltage droop on shared battery rail; PGOOD confirms all rails stable before sensor activation. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar multi-rail power management applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPS659122YFFR | 6-buck + 6-LDO, 2.2 MHz max freq, 16 µA standby, 0.8 V–3.3 V I²C voltage, no side-wettable QFN | Targeted at TI ecosystem (AMx/OMAP), lacks AEC-Q100 qualification and 150°C TJ option | Preferred for cost-sensitive industrial designs where automotive qualification is unnecessary and TI toolchain integration is required. |
| MAX20029ATGB/V+T | 4-buck + 3-LDO, 2.2 MHz, 15 µA standby, AEC-Q100 Grade 1, 32-pin 5 mm × 5 mm TQFN, no I²C DVS | Fixed-output bucks (no programmable VOUT), pin-strapped only sequencing, no dynamic voltage scaling | Selected when deterministic, hardware-only sequencing suffices and software-controlled DVS is not needed. |
Compared with TPS659122YFFR and MAX20029ATGB/V+T, the LT3380IUJM#TRPBF uniquely combines AEC-Q100 qualification, side-wettable QFN for automotive AOI, and full I²C-based dynamic voltage scaling-enabling adaptive power optimization in thermally constrained environments where firmware-driven rail control is essential.
Availability
LT3380IUJM#TRPBF is available at Aetrix Electronics and suitable for automotive infotainment, industrial edge controllers, and 5G small cell baseband applications requiring stable component supply, long-term lifecycle support, and AEC-Q100-compliant sourcing.
Supply support for LT3380IUJM#TRPBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices, Inc. is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, serving precision instrumentation, industrial automation, communications, and automotive markets.
The LT3380IUJM#TRPBF belongs to Analog Devices' Power by Linear™ portfolio, engineered specifically for advanced portable and automotive application processor platforms needing integrated, sequenced, and software-controllable multi-rail power solutions.
FAQ
What is the maximum junction temperature rating for the LT3380IUJM#TRPBF?
The LT3380IUJM#TRPBF is rated for –40°C to 125°C operating junction temperature and is qualified per AEC-Q100 for automotive applications. It shares the LT3380UJM die with the H-grade variant (–40°C to 150°C), but the I-grade specification strictly guarantees performance up to 125°C. Thermal design must ensure TJ ≤ 125°C under worst-case load and ambient conditions using θJA = 33°C/W.
Does the LT3380IUJM#TRPBF support dynamic voltage scaling for all four buck regulators?
Yes, the LT3380IUJM#TRPBF supports dynamic voltage scaling (DVS) for all four buck regulators via its I²C interface. Each buck's output voltage is controlled by a dedicated 5-bit DAC register (DVBxA/DVBxB), enabling 12.5 mV steps across a 0.4125 V–0.8125 V feedback range. This allows real-time adjustment of core, memory, I/O, and SoC rail voltages during operation without requiring external components.
How does the PWR_ON pin function in the LT3380IUJM#TRPBF power sequencing scheme?
The PWR_ON pin acts as a master enable for all regulator enable inputs (EN_Bx, EN_Lx) in the LT3380IUJM#TRPBF. When pulled low for >1 second, it forces all regulators into shutdown regardless of individual enable states. When asserted high for ≥3 ms, it releases inhibition and permits pin-strapped or I²C-controlled sequencing. This provides fail-safe control over system power-up/down coordination.
Can the LT3380IUJM#TRPBF's LDO3 output be adjusted, or is it fixed?
LDO3 on the LT3380IUJM#TRPBF is a fixed 1.8 V output with no feedback pin (Pin 4 is LDO3 output; no corresponding FB_L3 pin exists). Its nominal voltage is trimmed to 1.746 V–1.854 V over temperature and load. In contrast, LDO1 and LDO2 are adjustable via external resistor dividers tied to FB_L1 and FB_L2, referencing the internal 725 mV bandgap.
What package-related advantage does the side-wettable QFN offer for the LT3380IUJM#TRPBF in automotive manufacturing?
The side-wettable QFN package of the LT3380IUJM#TRPBF features extended copper flanks on all four sides, enabling automated optical inspection (AOI) of solder fillet quality after reflow-critical for zero-defect automotive production. Unlike standard QFNs, this design allows machine vision systems to verify solder joint integrity without X-ray, reducing test cost and improving process yield in high-reliability assembly lines.
LT3380IUJM#TRPBF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 40-WFQFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Topology:
- Step-Down (Buck)
- Number of Outputs:
- 4
- Frequency - Switching:
- 1.12MHz, 2.25MHz
- Voltage/Current - Output 1:
- 0.725V ~ 5.5V, 2.5A
- Voltage/Current - Output 2:
- 0.725V ~ 5.5V, 2.5A
- Voltage/Current - Output 3:
- 1.8V, 1.5A
- w/LED Driver:
- No
- w/Supervisor:
- No
- w/Sequencer:
- No
- Voltage - Supply:
- 2.7V ~ 5.5V
- Operating Temperature:
- -40°C ~ 125°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount, Wettable Flank
- Supplier Device Package:
- 40-QFN (6x6)
LT3380IUJM#TRPBF FAQ
1.How can I place an order for LT3380IUJM#TRPBF through Aetrix?
Please submit a Request for Quotation (RFQ) for LT3380IUJM#TRPBF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LT3380IUJM#TRPBF reliable?
The price and inventory of LT3380IUJM#TRPBF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LT3380IUJM#TRPBF is usually 5 days.
3.What payment methods are accepted for LT3380IUJM#TRPBF?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LT3380IUJM#TRPBF transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LT3380IUJM#TRPBF?
LT3380IUJM#TRPBF orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LT3380IUJM#TRPBF order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LT3380IUJM#TRPBF?
For technical support, including LT3380IUJM#TRPBF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LT3380IUJM#TRPBF requirements.
6.How does Aetrix verify that LT3380IUJM#TRPBF is sourced from the original manufacturer or authorized distributors?
All LT3380IUJM#TRPBF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LT3380IUJM#TRPBF meets industry standards.
7.What is the process for return or replacement of LT3380IUJM#TRPBF?
All LT3380IUJM#TRPBF units undergo pre-shipment inspection (PSI). If there is an issue with LT3380IUJM#TRPBF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LT3380IUJM#TRPBF part is unused and in its original packaging.
Return procedure for LT3380IUJM#TRPBF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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