My Inquiry
My Account
Analog Devices Inc. LT3463EDD#PBF
- Part No.:
- LT3463EDD#PBF
- Manufacturer:
- Analog Devices Inc.
- Package:
- 10-WFDFN Exposed Pad
- Datasheet:
-
LT3463EDD#PBF.pdf
- Description:
- IC REG BST CHG PUMP ADJ DL 10DFN
- Quantity:
- Payment:
- Shipping:
Inventory:1,255
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
LT3463EDD#PBF from Analog Devices (formerly Linear Technology) is a dual micropower DC/DC converter IC with integrated 42V NPN switches and internal Schottky diodes, delivering regulated +15V and –8V outputs from a 2.4V–15V input. It features 20µA quiescent current per channel, 300ns minimum off-time, and 250mA current limit on both switchers-enabling compact CCD bias supplies in portable imaging systems.
For engineers reviewing the LT3463EDD#PBF datasheet, LT3463EDD#PBF pinout, LT3463EDD#PBF application, or LT3463EDD#PBF equivalent, key selection criteria include dual-output topology, DFN-10 (3mm × 3mm) package constraints, ±40V max output capability, shutdown control per channel, and FB1/FB2 feedback architecture for independent voltage programming.
Technical Context
The LT3463EDD#PBF implements two independent constant off-time switching regulators: Switcher 1 is a boost converter generating positive output (VOUT1), while Switcher 2 is an inverting converter generating negative output (VOUT2). Each uses internal 42V NPN power switches with 180mV VCE(SAT) at 150mA and integrated Schottky diodes rated for 42V reverse voltage.
Feedback is split: FB1 senses VOUT1 via resistive divider to regulate against 1.25V reference; FB2 senses VOUT2 relative to VREF (1.25V) to set negative output magnitude. SHDN1 and SHDN2 provide independent enable/disable control with 0.3V–1.5V logic thresholds and sub-1µA shutdown current.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Input Voltage Range | 2.4V to 15V - supports single-cell Li-ion up to 3S battery inputs without pre-regulation |
| Output Voltage Range | Up to ±40V - enables high-voltage CCD and LCD bias without external transformers |
| Switch Current Limit | 250mA per channel - defines maximum load current before foldback; matches LT3463 (not LT3463A) spec |
| Quiescent Current | 40µA total (20µA per converter) - ensures ultra-low standby power in always-on imaging modules |
| Minimum Off-Time | 300ns - allows use of small inductors (e.g., 4.7µH) and ceramic capacitors for minimal PCB footprint |
| Switch Breakdown Voltage | 42V - supports 12V input → –30V output (42V total stress) in inverting configuration |
| Operating Temperature | –40°C to 85°C - qualified for industrial and portable camera ambient environments |
Pinout & Package
LT3463EDD#PBF is housed in a 10-lead 3mm × 3mm plastic DFN package with exposed thermal pad (Pin 11 = GND), requiring soldering to PCB ground plane for thermal and electrical integrity.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| FB1 (Pin 10) | Positive output feedback | Senses VOUT1; comparator trips at 1.25V to regulate boost output via R1/R2 divider |
| SHDN1 (Pin 9) | Positive converter enable | Active-high control: >1.5V enables Switcher 1; <0.3V disables with <1µA leakage |
| SHDN2 (Pin 8) | Negative converter enable | Independent active-high control for Switcher 2; decouples sequencing in dual-rail systems |
| VREF (Pin 7) | Negative output reference | 1.25V precision reference used with FB2 to set |VOUT2| via R3/R4 divider |
| FB2 (Pin 6) | Negative output feedback | Senses voltage between VREF and VOUT2; trip point near 0V enables inverting regulation |
| VOUT1 (Pin 1) | Positive output node | Cathode of internal Schottky diode; connects directly to boost output capacitor |
| SW1 (Pin 2) | Boost switch collector | High-frequency switching node; requires minimized trace area to reduce EMI |
| VIN (Pin 3) | Power input | Shared input for both converters; must be bypassed locally with ≥1µF ceramic capacitor |
| SW2 (Pin 4) | Inverting switch collector | Carries inverted switching waveform; same EMI layout rules as SW1 |
| D2 (Pin 5) | Inverting diode anode | Anode of internal Schottky; connects to GND, cathode tied to VOUT2 node |
Key Features
| Feature | Design Value |
|---|---|
| Dual independent regulators | Enables simultaneous +V and –V bias generation from single input-eliminates need for separate ICs or discrete charge pumps |
| Integrated 42V Schottky diodes | Removes external diode BOM line and layout area; reduces forward drop (750mV @ 150mA) vs. standard silicon |
| 300ns minimum off-time | Permits use of low-profile, high-frequency inductors (e.g., 4.7µH/0.8mm height) for space-constrained handheld designs |
| 20µA per-channel quiescent current | Extends battery life in always-on optical sensors-critical for surveillance and medical endoscopes |
| Exposed thermal pad (GND) | Provides low-θJA (43°C/W) path to PCB; essential for maintaining 125°C junction temp under 50mA load per rail |
Applications
| CCD Bias Supply | LCD Bias Generation |
|---|---|
Use Scenario: Providing +15V and –8V bias rails to charge-coupled device (CCD) image sensors in digital cameras and machine vision systems. IC Role / Device Role / Timing Role: Dual-output DC/DC converter generating stable, low-noise analog supply rails synchronized to pixel readout timing. Use Value: Eliminates transformer-based bias supplies-reducing size by >40% and enabling single-layer PCB layout for compact camera modules. | Use Scenario: Generating ±20V gate drive voltages for active-matrix LCD panels in handheld computers and portable displays. IC Role / Device Role / Timing Role: High-voltage dual-rail power source supporting fast panel refresh rates without cross-rail coupling. Use Value: Achieves ±20V output from 2.7V input using only two 10µH inductors and ceramic caps-no external diodes or controllers required. |
| Handheld Computer Power | Digital Camera Core Supply |
Use Scenario: Delivering isolated ±12V rails for analog front-end circuitry (e.g., ADC drivers, op-amps) in ruggedized PDAs and data loggers. IC Role / Device Role / Timing Role: Micropower dual converter supplying precision analog subsystems during intermittent wake cycles. Use Value: 40µA total quiescent current extends battery runtime beyond 72 hours in sleep mode-verified per LTC application note 3463 TA02. | Use Scenario: Powering CMOS image sensor analog bias and clock driver circuits in DSLR and mirrorless camera bodies. IC Role / Device Role / Timing Role: Primary high-efficiency bias generator coordinating with shutter and exposure timing signals. Use Value: 75% efficiency at 10mA load (VIN=3.6V) minimizes thermal rise near optical sensor-preserving image SNR and dark current stability. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-output DC/DC converter applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| LT3463AEDD#PBF | Higher negative switch current limit (400mA vs. 250mA); identical pinout and package | Better suited for higher-current –V loads (e.g., >30mA LCD gate drivers) | Select LT3463AEDD#PBF when negative rail load exceeds 25mA; otherwise LT3463EDD#PBF offers cost and thermal advantage |
| LT1945EMS#PBF | MSOP-10 package; 350mA switch limit; wider 1.2V–15V input range; no internal diodes | Requires external Schottky diodes; larger solution size but higher peak current capability | Choose LT1945EMS#PBF only if >300mA negative output current is needed and board space permits external diodes |
Compared with LT3463AEDD#PBF, LT3463EDD#PBF trades negative-rail current headroom for lower thermal dissipation and cost; versus LT1945EMS#PBF, it delivers smaller footprint and simpler BOM at the expense of peak current scalability.
Availability
LT3463EDD#PBF is available at Aetrix Electronics and suitable for CCD bias, LCD bias, and handheld computer power applications requiring stable component supply, long-lifecycle support, and guaranteed traceable sourcing.
Supply support for LT3463EDD#PBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices acquired Linear Technology in 2017 and maintains full technical and manufacturing continuity for legacy Linear power products.
The LT3463EDD#PBF belongs to Linear's micropower DC/DC converter family, designed specifically for space- and power-constrained analog bias generation in portable imaging and display systems.
FAQ
What is the maximum output voltage achievable with LT3463EDD#PBF?
The LT3463EDD#PBF supports up to +40V on VOUT1 and –40V on VOUT2, limited by its 42V internal switch and Schottky diode ratings. For example, a 5V input can generate +35V (boost) and –35V (inverting) simultaneously-provided total switch voltage stress (VIN + |VOUT2|) remains ≤42V. This makes LT3463EDD#PBF suitable for high-voltage CCD and LCD bias without external transformers.
Does LT3463EDD#PBF require external diodes?
No, LT3463EDD#PBF integrates all necessary Schottky diodes: one cathode-connected to VOUT1 (anode to SW1) and one anode-connected to D2 (cathode to GND). This eliminates two external diodes, reduces BOM count, and improves reliability in portable applications. The internal diodes are rated for 42V reverse voltage and 750mV forward drop at 150mA-matching typical requirements for CCD bias circuits.
How is the negative output voltage programmed on LT3463EDD#PBF?
The negative output voltage on LT3463EDD#PBF is set using a resistor divider from VOUT2 to FB2, referenced to the internal 1.25V VREF pin. The formula is |VOUT2| = VREF × (R4 / R3), where R3 connects between FB2 and GND, and R4 connects between VREF and VOUT2. For example, R3 = 61.9kΩ and R4 = 1MΩ yields –16.1V. This architecture avoids error amplifiers and simplifies design versus op-amp-based inverting regulators.
What is the thermal pad requirement for LT3463EDD#PBF?
The exposed pad (Pin 11) of LT3463EDD#PBF must be soldered directly to a solid PCB ground plane to ensure proper thermal dissipation and electrical reference. With θJA = 43°C/W, failure to connect the pad risks junction temperature exceeding 125°C at just 50mA per rail. Recommended layout uses ≥4 thermal vias (0.3mm diameter) under the pad, connected to inner-layer ground planes-per LTC DWG #05-08-1699.
Can LT3463EDD#PBF operate from a single 3.3V supply?
Yes, LT3463EDD#PBF operates from 2.4V to 15V input, making 3.3V fully compatible. At VIN = 3.3V, it efficiently generates +15V (boost) and –8V (inverting) with >70% efficiency at 10mA load per rail, as verified in Typical Application Circuit 3463 TA01a. Input bypassing with ≥1µF X5R/X7R ceramic capacitor close to VIN and GND is mandatory to maintain stability and minimize noise injection.
LT3463EDD#PBF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 10-WFDFN Exposed Pad
- Packaging:
- Tube
- Product Status:
- Active
- Function:
- Step-Up
- Output Configuration:
- Positive and Negative (Dual Rail)
- Topology:
- Boost, Charge Pump
- Output Type:
- Adjustable
- Number of Outputs:
- 2
- Voltage - Input (Min):
- 2.4V
- Voltage - Input (Max):
- 15V
- Voltage - Output (Min/Fixed):
- ±1.25V
- Voltage - Output (Max):
- ±40V
- Current - Output:
- 180mA (Switch), 320mA (Switch)
- Frequency - Switching:
- -
- Synchronous Rectifier:
- No
- Operating Temperature:
- 0°C ~ 70°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 10-DFN (3x3)
LT3463EDD#PBF FAQ
1.How can I place an order for LT3463EDD#PBF through Aetrix?
Please submit a Request for Quotation (RFQ) for LT3463EDD#PBF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LT3463EDD#PBF reliable?
The price and inventory of LT3463EDD#PBF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LT3463EDD#PBF is usually 5 days.
3.What payment methods are accepted for LT3463EDD#PBF?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LT3463EDD#PBF transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LT3463EDD#PBF?
LT3463EDD#PBF orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LT3463EDD#PBF order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LT3463EDD#PBF?
For technical support, including LT3463EDD#PBF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LT3463EDD#PBF requirements.
6.How does Aetrix verify that LT3463EDD#PBF is sourced from the original manufacturer or authorized distributors?
All LT3463EDD#PBF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LT3463EDD#PBF meets industry standards.
7.What is the process for return or replacement of LT3463EDD#PBF?
All LT3463EDD#PBF units undergo pre-shipment inspection (PSI). If there is an issue with LT3463EDD#PBF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LT3463EDD#PBF part is unused and in its original packaging.
Return procedure for LT3463EDD#PBF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
LT3463EDD#PBF Tags
-
TPS562201DDCR
Texas Instruments
-
MC34063ABD-TR
STMicroelectronics
-
TPS561201DDCR
Texas Instruments
-
MC33063ADR
Texas Instruments
-
MC34063ADR
Texas Instruments
-
TPS560200DBVR
Texas Instruments
-
AP3012KTR-G1
Diodes Incorporated
-
TLV61048DBVR
Texas Instruments
-
AZ34063UMTR-G1
Diodes Incorporated
-
TPS562200DDCR
Texas Instruments
-
AP62300TWU-7
Diodes Incorporated
-
MC34063EBD-TR
STMicroelectronics
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…
