Analog Devices Inc. LT3472EDD#PBF
- Part No.:
- LT3472EDD#PBF
- Manufacturer:
- Analog Devices Inc.
- Package:
- 10-WFDFN Exposed Pad
- Datasheet:
-
LT3472EDD#PBF.pdf
- Description:
- IC REG BST CUK ADJ 50MA DL 10DFN
- Quantity:
- Payment:

- Shipping:

Inventory:382
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Product details
Overview
LT3472EDD#PBF from Analog Devices (formerly Linear Technology) is a dual-channel, constant-frequency current-mode DC/DC converter generating independent positive boost and negative inverting outputs for CCD, TFT LCD, and OLED biasing. It delivers 15V at 20mA and –8V at 50mA from a 2.2V–4.2V Li-ion input, integrates Schottky diodes, and operates at 1.1MHz with internal sequencing ensuring VPOS reaches 88% before VNEG starts.
For engineers reviewing the LT3472EDD#PBF datasheet, LT3472EDD#PBF pinout, LT3472EDD#PBF application, or LT3472EDD#PBF equivalent, key selection criteria include dual-rail output capability, capacitor-programmable soft-start per channel, single-resistor output voltage setting, ±34V max output range, and 10-lead 3mm × 3mm DFN package with exposed GND pad.
Technical Context
The LT3472EDD#PBF uses separate current-mode PWM control loops for its boost (SWP/FBP/VPOS) and inverting (SWN/FBN/VNEG) channels, each with dedicated ramp generators and error amplifiers referenced to 1.25V (positive) or ground (negative). Internal sequencing logic monitors FBP voltage and enables the negative channel only after it exceeds 1.1V.
Each channel features independent soft-start via external capacitors on SSP and SSN pins, internally biased at 1.25V through 50kΩ resistors. The device integrates Schottky diodes DP and DN, supports up to 1.1MHz switching, and maintains regulation across –40°C to 85°C with 1.25V ±1.5% feedback reference accuracy over temperature.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VIN Range | 2.2V to 16V - supports single Li-ion cell (3V–4.2V) and wider industrial inputs without external LDO pre-regulation. |
| Positive Output | 15V at 20mA - set by single resistor R1 using VO1 = 1.25V × (1 + R1/50kΩ); typical application for CCD pixel bias. |
| Negative Output | –8V at 50mA - set by single resistor R2 using VO2 = –1.25V × R2/50kΩ; sufficient for TFT gate driver or OLED cathode bias. |
| Switching Frequency | 0.9MHz to 1.4MHz (typ 1.1MHz) - enables use of small 22µH/47µH inductors and low-profile ceramic capacitors while minimizing EMI. |
| Feedback Reference | +1.25V (FBP), 0V (FBN) - precise internal references allow accurate output regulation with minimal external components. |
| Max Output Voltage | ±34V - supports high-voltage imaging sensors and display drivers beyond standard rail requirements. |
| Shutdown Current | 0.1µA to 1µA - ultra-low quiescent draw in shutdown preserves battery life in portable imaging systems. |
Pinout & Package
The LT3472EDD#PBF is housed in a 10-lead, 3mm × 3mm plastic DFN package (DD) with an exposed thermal pad (Pin 11) that must be soldered to the PCB ground plane for thermal and electrical performance.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| SWP (Pin 1) | Boost switch node | Connects to boost inductor; carries high di/dt switching current for positive output generation. |
| VIN (Pin 2) | Main input supply | Accepts 2.2V–16V; requires local X5R/X7R ceramic bypass capacitor for stability and noise suppression. |
| SHDN (Pin 3) | Enable/disable control | Active-high logic: ≥0.8V enables regulator; ≤0.3V disables both channels and reduces IQ to <1µA. |
| SWN (Pin 4) | Inverter switch node | Connects to inverter input inductor and flying capacitor; switches at same frequency as SWP. |
| DN (Pin 5) | Inverter Schottky anode | Internal Schottky diode anode for negative output path; connects to inductor and flying capacitor. |
| FBN (Pin 6) | Negative feedback input | Senses VNEG; regulated to 0V - sets output via resistor divider to ground. |
| SSN (Pin 7) | Negative soft-start | Capacitor-to-ground programs ramp rate of VNEG; open for fast start-up. |
| FBP (Pin 8) | Positive feedback input | Senses VPOS; regulated to 1.25V - sets output via resistor divider to VPOS. |
| SSP (Pin 9) | Positive soft-start | Capacitor-to-ground programs ramp rate of VPOS; open for fast start-up. |
| VPOS (Pin 10) | Positive output | Delivers regulated boost output; requires local 2.2µF ceramic capacitor for filtering and stability. |
Key Features
| Feature | Design Value |
|---|---|
| Dual independent regulators | Simultaneous 15V boost and –8V inverter outputs with no shared power stage - eliminates cross-regulation and simplifies layout. |
| Internal Schottky diodes | Integrated DP and DN diodes eliminate two external components and reduce board area - critical for space-constrained imaging modules. |
| Capacitor-programmable soft-start | Separate SSP and SSN pins allow independent control of VPOS and VNEG ramp rates - prevents inrush-induced system reset during power-up. |
| Output sequencing | Hardware-enforced start order ensures VPOS reaches ≥88% of target before VNEG begins - guarantees VPOS + VNEG remains positive for CCD sensor safety. |
| Single-resistor output setting | Each output configured with one external resistor (R1 or R2) - reduces BOM count and improves design reproducibility vs. multi-resistor dividers. |
Applications
| CCD Imaging Bias Supply | TFT LCD Gate Driver Bias |
|---|---|
Use Scenario: Powering vertical/horizontal CCD shift registers in digital cameras and machine vision sensors. IC Role / Device Role / Timing Role: Dual-rail bias generator delivering isolated +15V and –8V rails synchronized to image capture timing. Use Value: Eliminates need for discrete charge pumps or transformers; 1.1MHz operation allows compact 22µH inductors and avoids audible noise in portable devices. | Use Scenario: Generating gate-on (+15V) and gate-off (–8V) voltages for amorphous silicon TFT backplanes in medical displays. IC Role / Device Role / Timing Role: High-efficiency dual-output DC/DC converter providing stable, sequenced bias rails for active-matrix addressing. Use Value: Integrated sequencing prevents negative gate voltage application before positive rail stabilizes - protects TFT channel integrity and prevents latch-up. |
| OLED Display Cathode Bias | Op-Amp Dual-Rail Generation |
Use Scenario: Supplying cathode bias (–8V) and anode modulation rail (+15V) in small-form-factor OLED microdisplays. IC Role / Device Role / Timing Role: Compact dual-output regulator enabling thin, battery-powered wearable displays with high contrast ratio. Use Value: 3mm × 3mm DFN footprint and <1mm profile meet strict mechanical constraints; internal diodes reduce thermal load vs. external diode solutions. | Use Scenario: Generating ±15V rails for precision op-amps in portable test equipment and signal conditioning front-ends. IC Role / Device Role / Timing Role: Low-noise dual-rail power source supporting rail-to-rail input/output op-amp operation from single-cell input. Use Value: Constant 1.1MHz frequency enables predictable EMI filtering; soft-start prevents op-amp output glitches during power-up. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-output DC/DC converter applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| LT3463EDD#PBF | Lower max output current (250mA per switch), 2.3V–15V VIN, constant off-time control instead of current mode. | Optimized for lower-power TFT bias; lacks hardware sequencing - requires external timing control for safe dual-rail startup. | Choose when lower cost and reduced IOUT suffice, and sequencing can be managed externally. |
| LT1945EMS#PBF | MS10 package (3mm × 3mm), 350mA switch current, 1.2V–15V VIN, no integrated Schottky diodes. | Requires two external Schottky diodes; higher board area and thermal overhead than LT3472EDD#PBF. | Choose if higher output current is required and external diode integration is acceptable. |
Compared with LT3463EDD#PBF and LT1945EMS#PBF, the LT3472EDD#PBF uniquely combines integrated Schottky diodes, hardware-enforced sequencing, and 1.1MHz current-mode control in a 3mm × 3mm DFN - making it optimal for space-constrained, safety-critical CCD and display bias where reliability and minimal BOM are prioritized.
Availability
LT3472EDD#PBF is available at Aetrix Electronics and suitable for CCD imaging modules, TFT LCD driver circuits, OLED display subsystems, and portable instrumentation requiring stable component supply and long-term manufacturability.
Supply support for LT3472EDD#PBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices acquired Linear Technology in 2017 and maintains full product support, documentation, and manufacturing continuity for legacy Linear parts including the LT3472EDD#PBF.
The LT3472EDD#PBF belongs to Linear's high-efficiency, dual-output DC/DC converter family designed specifically for imaging and display bias applications where compact size, sequencing integrity, and integrated power components are essential.
FAQ
What is the recommended inductor value for the LT3472EDD#PBF positive channel?
The LT3472EDD#PBF positive (boost) channel is optimized for a 22µH inductor, such as Murata LQH32CN220. This value balances efficiency, size, and peak current handling (250–350mA switch limit). Using 47µH increases inductor DCR and may reduce efficiency at light loads, while smaller values risk exceeding the 350mA switch current limit under full 15V/20mA output conditions. Always verify saturation current rating exceeds peak inductor current in your specific layout.
How does the LT3472EDD#PBF ensure safe startup sequencing between positive and negative outputs?
The LT3472EDD#PBF implements hardware-based sequencing: the negative channel remains disabled until the positive feedback pin (FBP) voltage reaches approximately 1.1V - corresponding to ~88% of the final VPOS output. This threshold is fixed within the IC and does not require external components. As a result, VPOS stabilizes first, guaranteeing that VPOS + VNEG stays positive during startup - a critical requirement for CCD sensor protection and TFT gate oxide integrity.
Can the LT3472EDD#PBF generate outputs higher than ±15V?
Yes, the LT3472EDD#PBF supports output voltages up to ±34V, limited only by external component ratings and internal switch voltage ratings (SWP/SWN/VPOS = 36V max, DN = –36V max). For example, configuring R1 = 1.1MΩ yields VPOS = 1.25V × (1 + 1.1M/50k) ≈ 29.4V. However, efficiency and regulation degrade above 20V due to increased switch duty cycle and diode forward drop effects - verify loop stability and thermal performance at elevated outputs using the recommended 4.7pF/10pF compensation capacitors (CFBP/CFBN).
What is the purpose of the exposed pad (Pin 11) on the LT3472EDD#PBF DFN package?
The exposed pad (Pin 11) on the LT3472EDD#PBF is electrically and thermally connected to GND. It must be soldered directly to a large PCB copper pour using multiple thermal vias to achieve the specified θJC = 3°C/W and prevent junction temperature exceedance at full load. Leaving the pad unconnected or floating degrades thermal performance by >40°C and risks premature thermal shutdown or parametric drift - especially under continuous 20mA/50mA output conditions.
Does the LT3472EDD#PBF require external Schottky diodes?
No, the LT3472EDD#PBF integrates Schottky diodes DP (for boost) and DN (for inverter), eliminating the need for external diodes in standard applications. These diodes support up to 1A peak inrush current and have typical forward drops of 700–950mV (DP) and 750–1000mV (DN) at 150mA. External diodes are only recommended for high-current inverter applications (>50mA) where efficiency gains justify added board area and complexity - consult Table 4 in the datasheet for compatible low-capacitance Schottky selections.
LT3472EDD#PBF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 10-WFDFN Exposed Pad
- Packaging:
- Tube
- Product Status:
- Active
- Function:
- Step-Up, Step-Up/Step-Down
- Output Configuration:
- Positive and Negative (Dual Rail)
- Topology:
- Boost, Cuk
- Output Type:
- Adjustable
- Number of Outputs:
- 2
- Voltage - Input (Min):
- 2.2V
- Voltage - Input (Max):
- 16V
- Voltage - Output (Min/Fixed):
- ±2.2V
- Voltage - Output (Max):
- ±34V
- Current - Output:
- 50mA
- Frequency - Switching:
- 1.1MHz
- Synchronous Rectifier:
- No
- Operating Temperature:
- 0°C ~ 70°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 10-DFN (3x3)
LT3472EDD#PBF FAQ
1.How can I place an order for LT3472EDD#PBF through Aetrix?
Please submit a Request for Quotation (RFQ) for LT3472EDD#PBF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LT3472EDD#PBF reliable?
The price and inventory of LT3472EDD#PBF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LT3472EDD#PBF is usually 5 days.
3.What payment methods are accepted for LT3472EDD#PBF?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LT3472EDD#PBF transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LT3472EDD#PBF?
LT3472EDD#PBF orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LT3472EDD#PBF order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LT3472EDD#PBF?
For technical support, including LT3472EDD#PBF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LT3472EDD#PBF requirements.
6.How does Aetrix verify that LT3472EDD#PBF is sourced from the original manufacturer or authorized distributors?
All LT3472EDD#PBF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LT3472EDD#PBF meets industry standards.
7.What is the process for return or replacement of LT3472EDD#PBF?
All LT3472EDD#PBF units undergo pre-shipment inspection (PSI). If there is an issue with LT3472EDD#PBF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LT3472EDD#PBF part is unused and in its original packaging.
Return procedure for LT3472EDD#PBF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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